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ICST[Integrated Circuit Systems]
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| Part No. |
ICS8701-01YT ICS8701-01 ICS8701-01Y
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| OCR Text |
...-0.3 Ty pical 3.3 3.3 Maximum 3.465 3.465 3.765 3.765 0.8 1.3 5 Units V V V V V V A A mA V V
TABLE 5A. AC ELECTRICAL CHARACTERISTICS, VDDI = VDDOX = 3.3V5%, TA=0C TO 70C
Sy mbol fMAX tpLH tpHL tsk(b) tsk(o) tsk() tsk(pp) tR tF tPW tEN P... |
| Description |
LOW SKEW ±1, ±2 CLOCK GENERATOR W/POLARITY CONTROL
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| File Size |
175.79K /
10 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS8702BYT ICS8702 ICS8702BY
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| OCR Text |
...5V VDDI = VIN = 3.465V VDDI = 3.465, VIN = 0V VDDI = 3.465, VIN = 0 -150 -5 VDDI = 3.465V VDDI = 3.135V Test Conditions
LOW SKEW 1, 2 CLOCK GENERATOR
Minimum 3.135 3.135 2 -0.3 0.15 1.8 0.31 Ty pical 3.3 3.3 Maximum 3.465 3.465 3.8 0.8 ... |
| Description |
LOW SKEW ±1, ±2 CLOCK GENERATOR
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| File Size |
186.44K /
12 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS87972I ICS87972DYIT
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| OCR Text |
...5 Typical 3.3 3.3 3.3 Maximum 3.465 3.465 3.465 215 20 Units V V V mA mA
NOTE: Special thermal handling may be required in some configura...0.5 Test Conditions Minimum 2 Typical Maximum 3.6 0.8 120 Units V V A V V
TABLE 5. INPUT FREQUENC... |
| Description |
LOW SKEW, 1-TO-12 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
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| File Size |
108.27K /
14 Page |
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Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
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| Part No. |
ICS87973I-147 ICS7973DI147 ICS87973DYI-147 ICS87973DYI-147T ICS87973-147I
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| OCR Text |
...5 Typical 3.3 3.3 3.3 Maximum 3.465 3.465 3.465 225 20 Units V V V mA mA
NOTE: Special thermal handling may be required in some configura...0.3 VDD - 2V 2.4 0.5 1 VDD - 0.6V LVCMOS Inputs LVCMOS Inputs Test Conditions Minimum 2 -0.3 Typical... |
| Description |
From old datasheet system
LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER 低偏移，112个LVCMOS / LVTTL时钟倍频/零延迟缓冲器
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| File Size |
271.75K /
16 Page |
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INTEGRATED DEVICE TECHNOLOGY INC
ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
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| Part No. |
ICS9222-01 ICS9222YG-01LF-T
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| OCR Text |
....3 1.1 0.4 1 40% 300 -
MAX 3.465 40 250 60% 33 0.5 100 0.5 75% 1 7 0.5 10 0.3 0.3 0.3 3.465 3.465 100 3.75 60 100 100 1.8 2 1 2.35 60% 50 500 100 250
UNIT V ns ps t CYCLE kHz % ns tCYCLE,PD tCYCLE,PD ns pF pF pF VDD VDD VDD,IR VDD,IR ... |
| Description |
Dual Memory Clock Generator
9222 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 2 INVERTED OUTPUT(S), PDSO28 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28
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| File Size |
90.07K /
6 Page |
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