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PROMOS TECHNOLOGIES INC
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Part No. |
V58C2256164SCE5B
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OCR Text |
...clock enable cs chip select ras row address strobe cas column address strobe we write enable dqs (udqs, ldqs) data strobe (bidirectional) a 0 ?a 12 address inputs ba0, ba1 bank select dq?s data input/output dm (udm, ldm) data mask v dd powe... |
Description |
16M X 16 DDR DRAM, 0.65 ns, PDSO66
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File Size |
917.36K /
61 Page |
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it Online |
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INTEGRATED SILICON SOLUTION INC
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Part No. |
IS42SM32400E-75EBLI
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OCR Text |
...k edge internal bank for hiding row access and pre - ? charge programmable cas latency: 2, 3 ? programmable burst length: 1, 2, 4, 8, and full ? page programmable burst sequence: ? sequential and interleave ? auto refresh (cbr) ? tcs... |
Description |
4M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90
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File Size |
764.69K /
26 Page |
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it Online |
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Part No. |
K4E151611C-TC50
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OCR Text |
...of memory cells within the same row, so called hyper page mode. power supply voltage (+5.0v or +3.3v), refresh cycle (1k ref. or 4k ref.), access time (-45, -5 0 or -6 0 ), power consumption(normal or low power) and package type(soj or tso... |
Description |
1M X 16 EDO DRAM, 50 ns, PDSO44
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File Size |
558.18K /
35 Page |
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it Online |
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HYNIX SEMICONDUCTOR INC
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Part No. |
HMT325S6BFR6C-H9
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OCR Text |
...8k/64ms 8k/64ms 8k/64ms 8k/64ms row address a0-a13 a0-a13 a0-a14 a0-a14 column address a0-a9 a0-a9 a0-a9 a0-a9 bank address ba0-ba2 ba0-ba2 ba0-ba2 ba0-ba2 page size 2kb 2kb 1kb 1kb b48614/178.104.2.80/2010-07-13 16:20
a pcpcwm_4828539:wp... |
Description |
256M X 64 DDR DRAM MODULE, DMA204
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File Size |
474.71K /
54 Page |
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it Online |
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NANYA TECHNOLOGY CORP
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Part No. |
NT5DS128M4BT-6K
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OCR Text |
...are used to select the bank and row to be accessed. the address bits registered coincident with the read or write command are used to select the bank and the starting column location for the burst access. the ddr sdram provides for progr... |
Description |
128M X 4 DDR DRAM, 0.7 ns, PDSO66
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File Size |
2,500.58K /
80 Page |
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it Online |
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HYNIX SEMICONDUCTOR INC
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Part No. |
HY5DU561622ELTP-L
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OCR Text |
...ii 0.65mm pin pitch (lead free) row and column address table items 32mx8 16mx16 organization 8m x 8 x 4banks 4m x 16 x 4banks row address a0 - a12 a0 - a12 column address a0-a9 a0-a8 bank address ba0, ba1 ba0, ba1 auto precharge flag a10 a1... |
Description |
16M X 16 DDR DRAM, 0.75 ns, PDSO66
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File Size |
235.08K /
29 Page |
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it Online |
Download Datasheet |
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Price and Availability
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