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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
5V993A-5Q
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| OCR Text |
... hard-wired to appropriate high-mid-low levels. when the gnd/ soe pin is held low, all the outputs are synchronously enabled. however, if g...range and resolution table). there are nine skew configurations available for each output pair. thes... |
| Description |
5V SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
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| File Size |
111.90K /
8 Page |
 View
it Online |
Download Datasheet
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDTCSP5991-7JRI
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| OCR Text |
... hard-wired to appropriate high-mid-low levels. the csp5991 maintains cypress cy7b991 compatibility while pro- viding two additional feature...range control ? pll bypass for dc testing ? external feedback, internal loop filter ? 46ma i ol hi... |
| Description |
PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32
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| File Size |
123.52K /
8 Page |
View
it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDT5T940-30NLI8
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| OCR Text |
...he input clock. when selmode is mid, the q out is a multiplied version of the input clock while q reg is q out /4. the idt5t940 features a...range idt5t940 precision clock generator oc-192 applications pin configuration note: 1. stresses bey... |
| Description |
5T SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
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| File Size |
115.10K /
11 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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