| PART |
Description |
Maker |
| DM74ALS109A DM74ALS109AN DM74ALS109AM DM74ALS109AM |
From old datasheet system
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(???杈圭?瑙????-K瑙?????甯??缃??娓??绔?伎
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| HCTS374T HCTS374KTR HCTS374DTR |
Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 20-LCCC -55 to 125
1024 x 18 Synchronous FIFO Memory 68-CPGA -55 to 125
Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered
|
Intersil Corporation
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC74AC109 |
Dual JK Positive Edge Triggered Flip-Flop
|
ON Semiconductor
|
| DV74AC109 DV74ACT109 |
Dual JK Positive Edge-triggered Flip-Flop
|
AVG Semiconductors(HITEK)
|
| MC74AC109-D |
Dual JK Positive Edge-Triggered Flip-Flop
|
ON Semiconductor
|
| DM7474 |
Dual Positive-Edge-Triggered D-Type Flip-Flops
|
Fairchild
|
| HD74AC74 |
Dual D-Type Positive Edge-Triggered Flip-Flop
|
HITACHI[Hitachi Semiconductor]
|
| 74LVX74 |
Low Voltage Dual D-Type Positive Edge-Triggered
|
Fairchild
|
| AMS285-1.2AL AMS285-1.2AN AMS285-1.2AS AMS385-1.2C |
MICROPOWER VOLTAGE REFERENCE DIODE 微功耗电压基准二极管
Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-PDIP -55 to 125
Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-SOIC -55 to 125
1.2V Micropower voltage reference diode
|
Advanced Monolithic Systems, Inc.
ADMOS[Advanced Monolithic Systems]
|
| 74F50109 N74F50109N N74F50109D |
Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
