| PART |
Description |
Maker |
| 74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation
Intersil, Corp.
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| MC74VHCT574A MC74VHCT74A ON1761 MC74VHCT74AD MC74V |
From old datasheet system
Dual D-Type Flip-Flop with Set and Reset
OCTAL D-TYPE FLLP-FLOP WITH SET AND RESET
|
ON Semiconductor
Motorola
|
| IN74HCT109 |
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
INTEGRAL[Integral Corp.]
|
| CD54AC113A CD54ACT112 CD54AC112 CD54ACT113A |
Dual J-K Flip-Flop with Set and Reset
Dual “J-K” Flip-Flop with Set and Reset
Dual “J-K?/a> Flip-Flop with Set and Reset
Dual “J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
| 74LVC74A |
Dual D-type flip-flop with set and
|
Philips
|
| MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| SN54_74LS76A ON2955 |
DUAL JK FLIP-FLOP WITH SET AND CLEAR
From old datasheet system
|
ON Semi
|
