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CY7C12461KV18 - 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

CY7C12461KV18_5049025.PDF Datasheet
 
Part No. CY7C12461KV18 CY7C12501KV18 CY7C12501KV18-400BZC CY7C12481KV18 CY7C12571KV18 CY7C12481KV18-400BZC
Description 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
File Size 608.41K  /  29 Page  

Maker

Cypress Semiconductor

Homepage http://www.cypress.com/
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 Full text search : 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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