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DATA SHEET
SAA7818HL DVD and CD playback IC
Product specification 2003 Sep 23
Philips Semiconductors
Product specification
DVD and CD playback IC
CONTENTS 1 2 3 4 5 6 7 8 9 10 11 11.1 11.2 11.3 11.4 11.5 12 13 14 15 FEATURES GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING REGISTER/MEMORY MAP LIMITING VALUES CHARACTERISTICS PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS PURCHASE OF PHILIPS I2C COMPONENTS
SAA7818HL
2003 Sep 23
2
Philips Semiconductors
Product specification
DVD and CD playback IC
1 FEATURES
SAA7818HL
* Host interface: - Supports ATAPI interface - Configurable as generic DMA interface; for use with external host interface devices - Automatic determination of block length for mode 2; Form 1 and Form 2 sectors; block length transferred is programmable - Supports synchronous UDE interface - Supports bufferless mode. * Block decoder: - Supports CD-ROM, CDr, CD-DA, VCD, SVCD, CD-I, photo CD and DVD video formats - Supports real-time error detection and correction in hardware for CD-ROM mode - CD-ROM error corrector switchable between single or dual pass; both with Error Detection/Correction (EDC) - Internal registers are memory mapped - Embedded DVD video authentication module. * Buffer memory controller: - Support for up to 64 Mbit external SDRAM memory - Block based sector addressing. * Channel decoder: - Selectable differential and single-ended HF inputs; compatible with the TZA1033 and TZA1035; single-ended input has bypassable AGC - Internal 8-bit ADC - Digital PLL and slicer for HF clock regeneration - Supports EFM and EFM+ demodulation - Full CD error correction strategy; t = 2 and e = 4 - On-chip CD error corrector memory with 8 frame jitter margin - Built-in hardware for double pass DVD error corrector; can correct 5 errors in C1 frame; 16 errors in C2 frame - Error corrector monitor signal available - I2S-bus output available via programmable vampire pins - Programmable frame sync loss indication - Increased tap settings for PLL equalizer compared with SAA7816 - Enhanced playability of black dots and scratches with improved defect detector; it enables the HF PLL frequency, slicer, high-pass filter, AGC and offset loops to be held when a defect is detected - Improved tolerance to continuity errors in DVD play mode - Limit equalizer - Two extra motor gain settings compared to SAA7816 - Support for copyright protection strategy for games applications - Hardware AGC loop, in combination with front-end IC (TZA1035) - Hardware automatic offset compensation loop, in combination with front-end IC (TZA1035) - Average jitter can be read back - Internal digital high-pass filter on HF input, with programmable cut-off frequencies - Run Length 3 (RL3) pushback feature - PLL monitor signal available - Interpolate and hold on audio output. * Spindle motor control: - Advanced motor control loop allows CAV, CLV and pseudo-CLV playback - Support for 3-pin and 1-pin tacho control - Motor control via incoming bitstream or tacho. * Speed operation: - Supports 18x CD-ROM playback - Supports 6x DVD-ROM playback. * Multimedia functions: - Supports audio playback via DRAM buffer; allows audio discs to be played at higher speeds - IEC 60958 (SPDIF, AES/EBU and DOBM) output with Q-W subcode and programmable category code; output at n = 1 rate - Audio output via I2S-bus vampire interface: 4 x oversampling filter, digital volume control, attenuator and mute.
2003 Sep 23
3
Philips Semiconductors
Product specification
DVD and CD playback IC
* Microcontroller interface: - Embedded microcontroller can operate as 33 or 67 MHz equivalent 80C51 - Embedded co-processor for fast multiply, divide, shift and normalize instructions; supported by C-compilers - Co-processor for MSF calculations - Memory mapped interfaces to sub functions - External microcontroller support - Embedded SRAM: 1.5 kbytes Xdata, 512 bytes Idata, 224 bytes data and registers - 4 banks; on Idata and registers, for better multi-tasking support - External flash EPROM programming support: serial boot possible with empty flash EPROM and internal program upload support - Code space support up to 1 Mbyte through built-in bank switching - Debug interface for embedded microcontroller. * Servo processor: - Switched current Analog-to-Digital Converters (ADCs) for diode and error signal inputs - Selectable servo error or servo diode inputs - Focus and radial servo loops - Automatic closed-loop gain control available for focus and radial loops - Built-in access procedure with fast track count input - High-speed track crossing velocity measurement (>350 kHz) for CD and DVD - Special DVD track crossing support - Fast radial brake circuitry - Eight-to-Fourteen Modulation (EFM) actuator damping circuitry - Sledge motor servo loop with enhanced PCS support - Sledge stepper motor support - Adaptive Repetitive Control (ARC) - Debug interface for servo - DC offset compensation for servo - White and black dot defect detection and handling - Integrated envelope detection. * Clock multiplier: - On-chip clock multipliers allows the use of 8.4672 MHz crystal. 2 GENERAL DESCRIPTION
SAA7818HL
The SAA7818HL is a device for 6x DVD and 18x CD playback applications. This device contains an embedded microcontroller which can operate as a 33 or 67 MHz equivalent 80C51 and interfaces to the channel decoder, block decoder and servo processor. New features enable superior playability in both CD and DVD modes. The block decoder has an embedded DVD video authentication module and supports up to 64 Mbit of external SDRAM memory. The data can be fed out in a number of different configurations including I2S-bus, ATAPI and UDE. This device also includes the option to bypass the external memory altogether, creating a bufferless ATAPI or UDE data path solution. The channel decoder has selectable differential and single-ended HF inputs, which are compatible with the TZA1033 and TZA1035 devices. There is an option to output the data as raw I2S-bus via some programmable data I/O pins. With increased tap setting for the PLL equalizer compared with the SAA7816 device and enhanced playability of black dots and scratches, overall playability has been greatly improved. There are also benefits due to a new defect detector that allows holding the HF PLL frequency and slicer settings over a defect. These, together with an additional limit equalizer lead to improved tolerance to continuity errors in DVD playback mode. There are also two extra motor gain settings compared to the SAA7816 device and support for copyright protection strategies in games applications. The servo processor has been upgraded to include an improved defect detection and handling process, an integrated envelope detection circuit and also DC offset compensation on the diode inputs.
2003 Sep 23
4
Philips Semiconductors
Product specification
DVD and CD playback IC
3 QUICK REFERENCE DATA SYMBOL VDDD(C) VDDD(P) VDDA IDDA IDDD(P) IDDD(C) fxtal Tamb Tstg 4 PARAMETER digital supply voltage for the core digital supply voltage for the pad cells (3 V) analog supply voltage analog supply current digital supply current for the pad cells digital supply current for the core crystal frequency ambient temperature storage temperature MIN. 1.65 3.0 3.0 - - - 7 -40 -55 TYP. 1.8 3.3 3.3 65 135 55 8.4672 - -
SAA7818HL
MAX. 1.95 3.6 3.6 - - - 9 +85 +125 V V V
UNIT
mA mA mA MHz C C
ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION SOT459-1 LQFP208 plastic low profile quad flat package; 208 leads; body 28 x 28 x 1.4 mm
SAA7818HL
2003 Sep 23
5
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CHANNEL DECODER CD/DVD ERCO ADC BIT DETECTOR AND DEMODULATOR DRIVE INTERFACE MEMORY PROCESSOR ERCO INTERFACE MULTIMEDIA INTERFACE MEMORY PROCESSOR HOST INTERFACE MOTOR/TACHO INTERFACE SUBCODE INTERFACE CSS MODULE CONTROL REGISTERS
5
Philips Semiconductors
handbook, full pagewidth
DVD and CD playback IC
BLOCK DIAGRAM
BLOCK DECODER DRAM INTERFACE
6
CPU INTERFACE MICROCONTROLLER SERVO ADC PCS ACCELERATOR RAM SERVO PROCESSOR SERVO ACCELERATOR ADDRESS DECODER CPU ADC 1.5 kbytes AUXILLIARY RAM 1.5 kbytes ROM 736 bytes RAM SFRs PORT REGISTER
SAA7818HL
Product specification
MDB204
Fig.1 Block diagram.
Philips Semiconductors
Product specification
DVD and CD playback IC
6 PINNING SYMBOL POR_NEG BCA MOTO1 T1 T2 T3 VDDD(P1) VSSD(P1) TEST1 TEST2 VDDA1 HFIN_DN HFIN_DP HFIN_SE VSSA1 VCOM VDDA2 ALPHA0 CRIN CROUT VSSA2 IREF UOPT SIN_PHI COS_PHI XDET ACT_EMFP ACT_EMFN VDDA3 UOPB VSSA3 D1 D2_TLN D3_REN D4_FEN S1_MIRN S2 VRIN FTCH 2003 Sep 23 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 TYPE(1) I I O I I I P P I I P AI AI AI P AO P AO AI AO P AO AI AI AI AI AI AI P AI P AI AI AI AI AI AI AI/O AI M T T T DRIVE/ THRESHOLD DESCRIPTION Power-on reset input; active LOW
SAA7818HL
BCA input (mode 2 = SCCLK; mace_debug = opc_int) motor control output tacho 1 input tacho 2 input tacho 3 input digital supply voltage 1 for the pad cells (3.3 V) digital ground 1 for the pad cells test input 1 (internal pull-down resistor) test input 2 (internal pull-down resistor) analog supply voltage 1 (3.3 V) negative differential HF input positive differential HF input single-ended HF input (AGC) analog ground 1 common mode reference output (TZA1035) analog supply voltage 2 (3.3 V) DAC output clock input clock output analog ground 2 reference current output upper reference input voltage for ADC ladder sine input from hall detectors cosine input from hall detectors auxiliary ADC input EMF of the actuator; positive input EMF of the actuator; negative input analog supply voltage 3 (3.3 V) decoupling point for ADC ladder analog ground 3 diode input 1 diode input 2/normal track-loss signal diode input 3/normal radial error signal diode input 4/normal focus error signal satellite diode input 1/normal mirror signal satellite diode input 2 I/O reference voltage for servo ADC track count input 7
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL VSSD(P2) VDDD(P2) P5_7_DEFO_N P5_6_DEFI_N P5_5_TL P5_4_RP_FOK P5_3_CE1 P5_2_CLO P5_1_SDA P5_0_SCL SCCLK VDDD(P3) VSSD(P3) RA FO SL RAC_SW REF_SIN REF_COS VDDD(P4) VSSD(P4) P4_7_PXT2EN P4_6_PXT2 P4_5_PXT0 P4_4_PXT P4_3_A19 P4_2_A18 VDDD(C1) VSSD(C1) UA0_P1_0 UA1_P1_1 UA2_P1_2 UA3_P1_3 UA4_P1_4 UA5_P1_5
PIN 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74
TYPE(1) P P B B B B B B B B O P P O O O O O O P P B B B B B B P P B B B B B B
DRIVE/ THRESHOLD
DESCRIPTION digital ground 2 for the pad cells digital supply voltage 2 for the pad cells (3.3 V)
M/T M/T M/T M/T M/T M/T M/T M/T
defect output/general purpose I/O defect input/general purpose I/O track-loss measure output/general purpose I/O radial polarity/focus OK/general purpose I/O CS external SRAM/general purpose I/O servo clock output/general purpose I/O I2C-bus data/general purpose I/O I2C-bus clock/general purpose I/O internal/external microcontroller clock [mace_debug = int1 (PLUM)] digital supply voltage 3 for the pad cells (3.3 V) digital ground 3 for the pad cells
M M M M M M
radial output (3-state during reset) focus output (3-state during reset) sledge output (3-state during reset) disconnects radial actuator (1 = disconnect) PDM reference signal output; removes DC offset from sin_phi PDM reference signal output; removes DC offset from cos_phi digital supply voltage 4 for the pad cells (3.3 V) digital ground 4 for the pad cells
M/T M/T M/T M/T M/T M/T
timer 2 input enable/SILD for TZA1035 timer 2 clock input/SICL for TZA1035 timer 1 clock input/SIDA for TZA1035 timer 0 clock input/CS2 for external device general purpose I/O general purpose I/O digital supply voltage 1 for the core (1.8 V) digital ground 1 for the core
M/T M/T M/T M/T M/T M/T
Port 1; demultiplexed lower microcontroller address lines; bit 0 Port 1; demultiplexed lower microcontroller address lines; bit 1 (mode 3 = SCCLK) Port 1; demultiplexed lower microcontroller address lines; bit 2 (mode 3 = OTD) Port 1; demultiplexed lower microcontroller address lines; bit 3 (mode 3 = DEB_OUT) Port 1; demultiplexed lower microcontroller address lines; bit 4 (mode 3 = MON_A) Port 1; demultiplexed lower microcontroller address lines; bit 5 (mode 3 = MON_D) 8
2003 Sep 23
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL UA6_P1_6 UA7_P1_7 VDDD(P5) VSSD(P5) EAN_WAITN DSDEN_SRST PSENN_CS ALE_ASTB VDDD(C2) VSSD(C2) UA12 UA15 P4_0_A16 P4_1_A17 UA14 UA13 UA8 UA9 UA11 UA10 VDDD(P6) VSSD(P6) UDA7 UDA6 UDA5 UDA4 UDA3 UDA2 UDA1 UDA0 VDDD(P7) VSSD(P7) P3_7_RDN P3_6_WRN P3_5_TXD2 P3_4_RXD2 P3_3_INT1 2003 Sep 23
PIN 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111
TYPE(1) B B P P B O B B P P B B B B B B B B B B P P B B B B B B B B P P B B B B B
DRIVE/ THRESHOLD M/T M/T
DESCRIPTION Port 1; demultiplexed lower microcontroller address lines; bit 6 (mode 3 = vampire 6 to SYNC) Port 1; demultiplexed lower microcontroller address lines; bit 7 (mode 3 = vampire 7 to V4) digital supply voltage 5 for the pad cells (3.3 V) digital ground 5 for the pad cells
M/T M M/T M/T
address input/wait output (internal pull-up resistor) microcontroller reset output [mace_debug = int0 (HDR66/PLUM)] programmable strobe enable/output; enable for external device (internal pull-up resistor) address latch/chip select (internal pull-up resistor) digital supply voltage 2 for the core (1.8 V) digital ground 2 for the core
M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T
Port 2; upper microcontroller address line; bit 12 Port 2; upper microcontroller address line; bit 15 A16 to EPROM A17 to EPROM Port 2; upper microcontroller address line; bit 14 Port 2; upper microcontroller address line; bit 13 Port 2; upper microcontroller address line; bit 8 Port 2; upper microcontroller address line; bit 9 Port 2; upper microcontroller address line; bit 11 Port 2; upper microcontroller address line; bit 10 digital supply voltage 6 for the pad cells (3.3 V) digital ground 6 for the pad cells
M/T M/T M/T M/T M/T M/T M/T M/T
Port 0; multiplexed microcontroller data/lower address line; bit 7 Port 0; multiplexed microcontroller data/lower address line; bit 6 Port 0; multiplexed microcontroller data/lower address line; bit 5 Port 0; multiplexed microcontroller data/lower address line; bit 4 Port 0; multiplexed microcontroller data/lower address line; bit 3 Port 0; multiplexed microcontroller data/lower address line; bit 2 Port 0; multiplexed microcontroller data/lower address line; bit 1 Port 0; multiplexed microcontroller data/lower address line; bit 0 digital supply voltage 7 for the pad cells (3.3 V) digital ground 7 for the pad cells
M/T M/T M/T M/T M/T
read signal input/general purpose I/O write signal output/general purpose I/O UART 2 transmit line output/general purpose I/O UART 2 receive line input/general purpose I/O interrupt 1 input/general purpose I/O 9
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL P3_2_INT0 P3_1_TXD1 P3_0_RXD1 VDDD(C3) VSSD(C3) HRESET DD7 DD8 DD6 DD9 DD5 DD10 DD4 DD11 VDDD(P8) VSSD(P8) DD3 DD12 DD2 DD13 DD1 DD14 DD0 DD15 VDDD(C4) VSSD(C4) DMARQ_GACK DIOW DIOR IORDY DMACK_GRQ INTRQ IOCS16 DA1_GWR VDDD(P9) VSSD(P9) PDIAG DA0 DA2_GRD CS0 2003 Sep 23
PIN 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151
TYPE(1) B B B P P I B B B B B B B B P P B B B B B B B B P P O I I O I O O B P P B B B B
DRIVE/ THRESHOLD M/T M/T M/T
DESCRIPTION interrupt 0 input/general purpose I/O UART 1 transmit line output/general purpose I/O UART 1 receive line input/general purpose I/O digital supply voltage 3 for the core (1.8 V) digital ground 3 for the core host reset input
AL/T AL/T AL/T AL/T AL/T AL/T AL/T AL/T
host interface/generic DMA; bit 7 host interface/generic DMA; bit 8 (mode 1 = MEAS_CFLG) host interface/generic DMA; bit 6 host interface/generic DMA; bit 9 (mode 1 = MEAS1) host interface/generic DMA; bit 5 host interface/generic DMA; bit 10 (mode 1 = MON_A) host interface/generic DMA; bit 4 host interface/generic DMA; bit 11 (mode 1 = MON_D) digital supply voltage 8 for the pad cells (3.3 V) digital ground 8 for the pad cells
AL/T AL/T AL/T AL/T AL/T AL/T AL/T AL/T
host interface/generic DMA; bit 3 host interface/generic DMA; bit 12 (mode 1 = DEB_OUT) host interface/generic DMA; bit 2 host interface/generic DMA; bit 13 (mode 1 = OTD) host interface/generic DMA; bit 1 host interface/generic DMA; bit 14 (mode 1 = SCCLK) host interface/generic DMA; bit 0 host interface/generic DMA; bit 15 (mace_debug = servo_int) digital supply voltage 4 for the core (1.8 V) digital ground 4 for the core
AL T T AH T AH AH AL/T
host DMA request/generic DMA acknowledge host interface input write strobe host interface input read strobe host interface ready output host DMA acknowledge/generic DMA request input host interface interrupt request output host interface 8/16-bit Port output host address bit 1/generic write digital supply voltage 9 for the pad cells (3.3 V) digital ground 9 for the pad cells
AL/T AL/T AL/T AL/T
host interface passed test input/output (mode 1 = SYNC) host address bit 0 input/output host address bit 2/generic read host interface chip select 0 input/output 10
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL CS1 DASP IECO_CL1 VDDD(P10) VSSD(P10) XDA3 XDA2 XDA1 XDA0 XDA10 VDDD(P11) VSSD(P11) XDD2 XDD1 XDD0 XDD3 XDD4 XDD5 XDD6 XDD7 VDDD(C5) VSSD(C5) LDQM XWR XRAS SDCS XCAS XDA12 XDA13 SDCK UDQM VDDD(P12) VSSD(P12) XDD8 XDD9 XDD10 XDD11 XDD12 XDD15 XDD14 2003 Sep 23
PIN 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191
TYPE(1) B B O P P O O O O O P P B B B B B B B B P P O O O O O O O O O P P B B B B B B B
DRIVE/ THRESHOLD AL/T AL/T M
DESCRIPTION host interface chip select 1 input/output host interface active slave present input/output (mode 1 = V4) IEC 60958 output/CL1 output from HDR66 digital supply voltage 10 for the pad cells (3.3 V) digital ground 10 for the pad cells
L L L L L
DRAM address output; bit 3 DRAM address output; bit 2 DRAM address output; bit 1 DRAM address output; bit 0 DRAM address output; bit 10 digital supply voltage 11 for the pad cells (3.3 V) digital ground 11 for the pad cells
M/T M/T M/T M/T M/T M/T M/T M/T
DRAM data bus input/output; bit 2 DRAM data bus input/output; bit 1 DRAM data bus input/output; bit 0 DRAM data bus input/output; bit 3 DRAM data bus input/output; bit 4 DRAM data bus input/output; bit 5 DRAM data bus input/output; bit 6 DRAM data bus input/output; bit 7 digital supply voltage 5 for the core (1.8 V) digital ground 5 for the core
M M M M M M M L M
SDRAM data mask output LOW DRAM write strobe output DRAM RAS strobe output SDRAM chip select output DRAM CAS strobe output DRAM address output; bit 12 DRAM address output; bit 13 SDRAM clock output SDRAM data mask output HIGH digital supply voltage 12 for the pad cells (3.3 V) digital ground 12 for the pad cells
M/T M/T M/T M/T M/T M/T M/T
DRAM data bus input/output; bit 8 DRAM data bus input/output; bit 9 DRAM data bus input/output; bit 10 DRAM data bus input/output; bit 11 DRAM data bus input/output; bit 12 DRAM data bus input/output; bit 15 DRAM data bus input/output; bit 14 11
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL XDD13 VDDD(C6) VSSD(C6) XDA11 XDA9 XDA8 XDA7 XDA6 XDA5 XDA4 VDDD(P13) VSSD(P13) FLAG MCK DATA_SDI WCLK_WSI BCLK_SCKI Note
PIN 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208
TYPE(1) B P P O O O O O O O P P B B B B B
DRIVE/ THRESHOLD M/T
DESCRIPTION DRAM data bus input/output; bit 13 digital supply voltage 6 for the core (1.8 V) digital ground 6 for the core
M M M M M M M
DRAM address output; bit 11 DRAM address output; bit 9 DRAM address output; bit 8 DRAM address output; bit 7 DRAM address output; bit 6 DRAM address output; bit 5 DRAM address output; bit 4 digital supply voltage 13 for the pad cells (3.3 V) digital ground 13 for the pad cells
M/T M/T M/T M/T M/T
I2S-bus flag input/output (mode 2 = DEB_OUT) multimedia master clock input/output (mode 2 = MEAS_CFLG) I2S-bus data input/output (mode 2 = MON_A) I2S-bus word clock input/output (mode 2 = MEAS1) I2S-bus bit clock input/output (mode 2 = MON_D)
1. See Table 1 for the pin type definition. Table 1 Pin type definition DEFINITION input output open-drain bidirectional 3-state output analog input analog output power connection; all supply pins must be connected to the same external power supply voltage
TYPE I O OD B T AI AO P
2003 Sep 23
12
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
201
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handbook, full pagewidth
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104
MDB276
SAA7818HL
99 100
101
102
Fig.2 Pin configuration.
2003 Sep 23
13
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Philips Semiconductors
Product specification
DVD and CD playback IC
7 REGISTER/MEMORY MAP
SAA7818HL
The internal registers are SFRs within the address space of the internal microcontroller. They are accessed in the same way as standard 80C51 SFRs. The external registers and memory spaces make up the external memory map of the internal microcontroller. Some of the memory spaces are on-chip and some are in the external DRAM. All registers are addressed as external memory space with respect to the internal microcontroller. Table 2 ADDR (HEX) 0080 0088 0090 0098 00A0 00A8 00B0 00B8 00C0 00C8 00D0 00D8 00E0 00E8 00F0 00F8 Internal registers 0/8 P0 TCON P1 SCON P2 - P3 - SCON2 T2CON SSR ACC PORT4 - P5 1/9 SP TMOD - SBUF P2SFR - - - SBUF2 T2MOD SCR - MD0 - DDR1 2/A DPL TL0 - - - INTLATCH - - - RCAP2L CSWAIT - - MD1 DDR5 DDR4 3/B DPH TL1 - - - INTEN - - - RCAP2H - - - MD2 - DDR0 4/C - TH0 - - - - - - - TL2 - - - MD3 DACDEB DDR2 5/D - TH1 - - - - - - - TH2 - - - MD4 CONFIG4 DDR3 6/E - - - CLK_GEN - - - - - - - - - MD5 CONFIG3 CONFIG 7/F PCON - - DIV17 - - - - - - - - - ARCON - CONFIG2
TLS_CNTL CSCNTRL
2003 Sep 23
14
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Table 3 ADDR (HEX) 0000 : 05F8 0600 : BFF8 C000 C008 C010 C018 C020 15 TIME_KEEPER RAD_INT_LO FOCUS_INT_ HI RAMP_ HEIGHT RAD_OFFSET _LO RAD_CTRL_1_ MEM STACK0 MEM_SLEDGE 2_LO_LO INTERRUPT REG reserved SLEDGE_PUL SE_HEIGHT AGCGAINMEM PCS_STAT FOC_STAT RAD_OFFSET _HI FOCUS_INT_ LO FE_LEVEL RAD_ERROR_ GAIN_MEM_ LO reserved OLDCOM reserved reserved reserved FOCUS_ INJECT AGCGAINLO START_LO RAD_STAT RAD_ERROR_ GAIN_MEM_HI DROP_OUT_ CODE TIMER TPI_GAIN_LO MEM_ SLEDGE1_HI TPI_GAIN_HI FOC_PROP_ MEM reserved SP_MEM_LO DIST_LO FOCUS_ ERROR_MEM FOCUS_PROP _MULT RAD_PROP_ MULT_MEM SP_MEM_HI DIST_HI RAD_ERROR_ MEM FOC_INT_ GAIN RAD_ERROR_ ACC_MEM SPEED_ SETPOINT STACK3 RAMP_INCR reserved SPEED_DREM PEL_MEM reserved INJECTLEVEL 1 MEM_ SLEDGE1_LO SPEED_HI RAD_INT_HI SPEED_LO external DRAM (PLUM subpage 1) External registers/memory space 2003 Sep 23 Philips Semiconductors
DVD and CD playback IC
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
auxiliary RAM (internal)
RAMP_MEAN_ SLEEP_MULT_ VALUE MEM RAD_INT_ GAIN_MEM TPI_SIGNAL_ MEM STACK2 SLEDGE_ MULT_MEM2 reserved HOLD_MULT_ MEM SLEDGE_ POWER_MEM INJECTLEVEL 2 OFFTRACK_ LO ACT_FF SPEED_MULT _MEM RAD_CTRL_1_ MEM2 STACK1 FAST_SPEED FOCUS_INT_ MEM1 XTRA_ PRESET RAD_MEM_ PART1
C028 C030 C038 C040 C048 C050 C058 C060
RAD_GAIN_ MEM
STACK5
STACK4
STATE_MULT_ MEM_SLEDGE MEM_SLEDGE MEM 2_LO 2_HI reserved reserved reserved RADIAL_ INJECT FOCUS_ OFFSET_AGC START_HI SLEDGE_OUT _MEM SLEDGE_PUL SE_MEM reserved DET_PHASE INJECT_LO LOC_LO reserved reserved SLEDGE_ LONG_BRAKE AGCFREQ
SAA7818HL
Product specification
OSC MIRN_MEM PCS_FF_ STROKE
OFFTRACK_HI OFFTRACK_MI LOC_MI LOC_HI
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 2003 Sep 23 16 Philips Semiconductors ADDR (HEX) C068 C070 C078 C080 : C0A8 C0B0 C0B8 C0C0 C0C8 C0D0 C0D8 C0E0 C0E8 C0F0 C0F8 C100 : CFF8 D000 : DFF8 external DRAM (PLUM subpage 2) ARC_STAT DEFECTCNTR L1 MIR_FIL_ BLACK_HI CALF_PROBE _HI TLSLICECNTR PP_TPI_ PROBE OPC_STAT ARC_FOC_IN DEFECTCNTR L2 MIR_FIL_ BLACK_LO CALF_PROBE _LO DECAY_RATE reserved OPC_CTRL1 ARC_RAD_IN DEFECTCNTR L3 MIR_FIL_ WHITE_HI reserved ARC_FOC_ OUT HF_ ENVELOPE MIR_FIL_ WHITE_LO reserved ARC_RAD_ OUT ALPHA0_DAC REG_FBK_ BLACK_HI reserved AUX_ADC reserved OPC_DELAY OPC_DEL_ ACT reserved reserved ARC_FOC_ DIFF CONTROL_ REG REG_FBK_ BLACK_LO reserved PCS_HALL_ PH reserved OPC_ADR_ START OPC_TIML reserved reserved ARC_RAD_ DIFF CALF_ FORMAT REG_FBK_ WHITE_HI reserved PEAK_PROBE DEFECT_ COUNTER OPC_ADR_ STOP OPC_TIMH reserved reserved ARC_ANG CNF_TEST_ VALUE REG_FBK_ WHITE_LO reserved BOTTOM_ PROBE DEFECT_ SIGNALS OPC_ALPHA0 _START reserved reserved reserved
DVD and CD playback IC
0/8 PCS_SPEED_ GAIN PCS_ACC_ STEP RE_FILTER_ MEM
1/9 SPEED_SETP OINT_LO PCS_ACC_ JUMP FE_FILTER_ MEM
2/A SPEED_SETP OINT_HI VEL_ROOT_HI RE_DET_ LEVEL
3/B reserved VEL_ROOT_ LO FE_DET_ LEVEL
4/C reserved PCS_STP_ POS EMFREAD_ MEM
5/D PCS_PD PCS_STP_ NEG EMF_DAMP_ MEM
6/E PCS_PD_INT FOCUS_ OFFSET RACSWITCH_ MEM
7/F PCS_PD_INT_ LO PROT_STAT PCS_SEN
reserved
ACTUAL_DIFF FORCED_DIFF PP_TPI_FIL_ PROBE_HI OPC_CTRL2 OPC_EMFH DEBUG2 reserved PP_TPI_FIL_ PROBE_LO OPC_REPEAT OPC_EMFL DEBUG3 reserved
OPC_ALHPA0_ OPC_PW_LPF STEP DEBUG0 reserved DEBUG1 reserved
inaccessible
SAA7818HL
Product specification
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 2003 Sep 23 17 Philips Semiconductors ADDR (HEX) E000 : FCF8 FD00 FD08 FD10 FD18 FD20 FD28 : FD50 FD58 reserved DRAM_MODE/ DRAM_FEAT/ DRAM_COLW reserved CAM_CMD/ CAM_STAT AGCBW DEFIRA1 SIFCONTROL OFFSET_LVL GLUE1 CAM_DAT reserved AGCTHR_HI DEFIRA2 SERIF1 HFMAX_PEAK PORTADATA/P ORTAREAD AGCTHR_LO DEFIRA3 SERIF2 HFMIN_PEAK PORTAMODE AGCTHR_HI2 HIGHPASS SERIF3 HF_DETECT4 reserved AGC_TIMHI OFFSETCONT HF_DETECT1 DECSTATUS3 DC_CONTROL HF_ AMPLITUDE OFFSETDATA HF_DETECT2 HF_DETECT5 DC_VALUE AGC_SET DEFIRA0 reserved reserved BUFFERBASE ACQ_AUTO_ CTRL ACQAUTO_ INTEN BYTESPERSE CTOR(H) MATHPROC TAGSCAN_ MASK TAGSCAN_ CNTL BUFFERTOP STRMSTRTADDR NXTXFR_ADDR TAGSCAN_ VALUE TAGSCAN_ OFFS_H TAGSCAN_ OFFS_L TAGGED_CNT/TAGGED_CNT_ UPD STRMSTOPADDR ENDXFR_ADDR/REM_CNT MHEAD MATCHED_ COUNT ACQMISS_ STAT reserved UNTAGGED_CNT/UNTAGGED_ CNT_UPD ACQAUTO_INT BYTESPERSE CTOR(L) HOST_AUTO_ CTRL
DVD and CD playback IC
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
external DRAM (PLUM subseg n)
reserved
FD60 FD68 FD70 FD78 FD80 FD88 FD90 FD98 FDA0
OFFSETBOUN OFFSETSETTI D NG HF_DETECT3 HF_DETECT6 D1_OFFSET AGCDAC_DIV OFFSETBW D2_OFFSET
SAA7818HL
Product specification
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 2003 Sep 23 18 Philips Semiconductors ADDR (HEX) FDA8
DVD and CD playback IC
0/8 D3_OFFSET
1/9 D4_OFFSET
2/A S1_OFFSET
3/B S2_OFFSET
4/C DEMOD_ DCOD_ CONTROL
5/D ENVELOPE_ CONTROL
6/E CLIPLEVEL_ LE
7/F GAIN_LE
FDB0 FDB8 FFC0
SWITCH_LE
LAST_GOOD_ HEADER CHPLL_SET/C HPLL_ASYM SEMA2 MOTOR6 TACHO3 HFDEFECTST ATUS C1BLER
CONTROL_AD _STORAGE
LAST_GOOD_ ADDRESS reserved CHPLL_F_ME AS/CHPLL_ AVG_JIT MOTOR1/ SLICE1 HFPLLMINMA X/SUB_C_END CHPLL_SET_2 HFDEFECTDA TA reserved
reserved
CHPLL_LOCK/ PLL_FREQ_R CLOCKPRE2 MOTOR5 TACHO2 reserved
CHPLL_FREQ/ CHPLL_EQU/C CHPLL_JIT HPLL_LOCK_ IN MEAS_OUT_E N/AGC_GAIN CLOCKPRE1/ SUB_C_STAT BCASET INT_EN/INT_ STAT DECOMODE/ SUB_C_DATA SRESET
OUTPUT1
reserved
OUTPUT3
FFC8 FFD0 FFD8 FFE0 FFE8 FFF0 FFF8
MOTOR2/ EYE_OPEN ANASET/ FIFOFILL MOTOR7 HFDEFECTDA TAEND reserved
MOTOR3/ TACHO4 VITSET/ BCASTAT reserved
MOTOR4 TACHO1/ BCADATA ANASET2
reserved reserved reserved
reserved
C2BLER
SAA7818HL
Product specification
Philips Semiconductors
Product specification
DVD and CD playback IC
8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDDD(P) VDDD(C) VDDA VI(max) VO IO IIK Tstg Vesd PARAMETER digital supply voltage for the pad cells (3 V) digital supply voltage for the core (1.8 V) analog supply voltage input voltage on any input output voltage on any output output current DC input diode current storage temperature electrostatic discharge voltage machine model; note 4 Notes 1. All pad supply connections [VDDD(P)] must be made externally to the same power supply. 2. All VSS pins must be connected to the same external voltage. continuous continuous note 2 note 2 CONDITIONS notes 1 and 2 MIN. -0.5 1.65 -0.5 -0.5 -0.5 - - -55
SAA7818HL
MAX. +4.0 1.95 +4.0 VDD + 0.5 +6.5 20 20 +125 +2000 +200
UNIT V V V V V mA mA C V V
human body model; note 3 -1000 -200
3. Equivalent to discharging a 100 pF capacitor via a 1.5 k series resistor with a rise time of 15 ns. 4. Equivalent to discharging a 200 pF capacitor via a 2.5 H series inductor. 9 CHARACTERISTICS VDDD(P) = 3.0 to 3.6 V; VDDD(C) = 1.65 to 1.95 V; VDDA = 3.0 to 3.6 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL Supplies VDDD(C) VDDD(P) VDDA IDDD(C) IDDD(P) IDDA digital supply voltage for the core digital supply voltage for the pad cells analog supply voltage digital supply current for the core digital supply current for the pad cells analog supply current VDDD(C) = 1.8 V VDDD(P) = 3.3 V VDDA = 3.3 V 1.65 3.0 3.0 - - - 1.8 3.3 3.3 55 135 65 1.95 3.6 3.6 - - - V V V mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Analog blocks (VDDD(P) = 3.3 V, VDDD(C) = 1.8 V, VDDA = 3.3 V, VSS = 0 and Tamb = 25 C) PIN: IREF VIREF RIREF IIREF PIN: VCOM VVCOM Zo Cext 2003 Sep 23 common mode reference voltage output impedance external capacitor on pin VCOM 19 1.08 - 47 1.2 - - 1.32 10 - V nF reference voltage on pin IREF external resistor on pin IREF (1%) output current from pin IREF 1.16 - 47 1.26 24 50 1.36 - 53 V k A
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL
PARAMETER
CONDITIONS - 1/3 Nyquist at 100 MHz - -
MIN.
TYP. - 46.6 7 2.0 - - - 7 3 - - 35 - - 50 1.4 7 8.6 - - VVRIN 0
MAX.
UNIT
PINS: HFIN_DN AND HFIN_DP fclk B ENOB Vi(dif)(p-p) Vdif(offset) Vcm(offset) VADC(offset) Ci(stat) Ri td(g) PIN: HFIN_SE fclk B G THD S/N Vi(se)(p-p) Ci(stat) Ri td(g) IIO(max) Vi Gtol G clock sample rate recovered bandwidth AGC gain range total harmonic distortion signal-to-noise and distortion of AGC single-ended input signal (peak-to-peak value) static input capacitance input resistance group delay flatness 0 to 35 MHz 0 dB; depends on VDDA1 input to ground 32 steps fsig = 25 MHz; at Vdif = 1.4 V (p-p) - - -2.1 - - - - - - 1 - -20 100 - +11.4 -35 - 1.4V DDA ---------------------3.3 - - 600 MHz MHz dB dB dB V pF k ps A V % clock sample rate recovered bandwidth effective number of bits differential input signal (peak-to-peak value) differential offset voltage common mode offset voltage ADC offset voltage static input capacitance input resistance group delay input to ground input to input 100 - - 2.0V DDA ---------------------3.3 +100 +100 +60 - - 100 V mV mV mV pF pF k ps MHz MHz
0 dB; depends on VDDA - VHFIN_DP to VHFIN_DN -100 -200 -60 - - - -
infinite -
PINS: D1, D2_TLN, D3_REN, D4_FEN, S1_MIRN AND S2 maximum input/output current input voltage gain tolerance variation of gain between channels pins D1 to D2_TLN and D3_REN to D4_FEN pins S1_MIRN to S2 Cpcb(max) fclk B maximum parasitic capacitance connected to input sample rate recovered bandwidth -4.5 -6 - - - - - - +4.5 +6 25 % % pF MHz kHz selectable via gain; note 1 16 - +20
8.4672 - 20 -
2003 Sep 23
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Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL (THD+N)/S
PARAMETER total harmonic distortion-plus-noise to signal ratio dynamic range
CONDITIONS Isink or Isource = 6 A -
MIN.
TYP. -
MAX. -40
UNIT dB
DR PIN: VRIN Vo(VRIN) Vi(VRIN) PIN: FTCH VFTC(offset) VFTC(hys) Vcm fclk Ci(stat) Ri Vi(UOPB) Vi(UOPT) Vi Vcm G B Ri Ci(stat) Vi G Ri Ci(stat) Ci(dyn) fclk B ENOB CODEmin(Vin)
Isink or Isource = 6 A
50
- 1.2 -
- 0.5VDDA2 + 0.1 0.5VDDA2 + 0.1
dB
voltage on VRIN driving output input voltage on VRIN
1.0 1.0
V V
comparator FTC offset voltage comparator FTC hysteresis common mode voltage clock sample rate static input capacitance input resistance input to ground
-20 -10 - - - 100 - - 0 - note 2 - - 80 - 0 -1 - - - - 5 at 1.05 MHz - 0 251
- - 1.67 7 - 1 2.6 - 0 5 265 100 7 - - 7 5 1.05 - 7.2 5 253
+20 +10 - - - - - VUOPT - - - 120 - VUOPT +1 - - - - - - 10 255
mV mV V MHz pF k
8.4672 -
PINS: UOPB AND UOPT input voltage on pin UOPB input voltage on pin UOPT V V
PINS: ACT_EMFP AND ACT_EMFN input voltage common mode voltage gain bandwidth input resistance input capacitance (static) V V V kHz k pF
PINS: SIN_PHI, COS_PHI, XDET AND ACT_EMFP; NOTE 3 input voltage gain matching between channels input resistance static input capacitance dynamic input capacitance sample rate recovered bandwidth effective number of bits output code for minimum VUOPB input V % k pF pF MHz kHz
CODEmax(Vin) output code for maximum VUOPT input
2003 Sep 23
21
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL PIN: ALPHA0 fclk Vo CL RL fref MULT fout Jclk(rms) tset Digital input
PARAMETER
CONDITIONS - 0 - 10
MIN.
TYP. -
MAX.
UNIT
sample rate output voltage load capacitance load resistance
1.05 - - -
MHz V pF k
VUOPT 25 30
CLOCK MULTIPLIERS reference frequency multiplication ratios valid output frequencies clock jitter (RMS value) settling time of clock 8 5 42.336 - - 8.4672 17 - - - - 24 203.2128 150 60 MHz ps s MHz
INPUT: PORE_NEG, HRESET AND BCA (SCHMITT-TRIGGER INPUTS); TTL INPUT WITH HYSTERESIS Vth(r) Vth(f) Vhys Ci VIL VIH ILI Ci Digital output OUTPUTS: DESIGNATED BY `L' (CMOS LEVELS) VOL VOH CL to(r) to(f) LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 20% to 80% levels; CL = 10 pF 80% to 20% levels; CL = 10 pF IOL = 4 mA IOH = -4 mA 20% to 80% levels; CL = 10 pF 80% to 20% levels; CL = 10 pF Vi = 0 to VDDD(P) 22 IOL = 2 mA IOH = -2 mA - - - - - - 1.0 1.0 0.4 - 20 - - V V pF ns ns 0.85VDDD(P) - switching threshold rising switching threshold falling hysteresis voltage input capacitance 1.4 0.9 0.4 - - 2.0 Vi = 0 - VDDD(P); note 4 -10 - - - - - - - - - 1.9 1.45 0.7 10 V V V pF
INPUT: DESIGNATED BY `T'; TTL INPUT LOW-level input voltage HIGH-level input voltage input leakage current input capacitance 0.8 - +10 10 V V A pF
OUTPUTS: DESIGNATED BY `M' (CMOS LEVELS) VOL VOH CL to(r) to(f) ILO 2003 Sep 23 LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 3-state leakage current - - - - -10 - - 0.9 0.9 - 0.4 - 20 - - +10 V V pF ns ns A 0.85VDDD(P) -
Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL
PARAMETER
CONDITIONS - - 20% to 80% levels; CL = 10 pF 80% to 20% levels; CL = 10 pF Vi = 0 to VDDD(P) IOL = 4 mA IOH = -4 mA 0.5 V to 0.9VDDD(P); CL = 100 pF 0.9VDDD(P) to 0.5 V; CL = 100 pF IOL = 12 mA IOH = -4 mA 0.5 V to 0.9VDDD(P); CL = 100 pF 0.9VDDD(P) to 0.5 V; CL = 100 pF - -
MIN.
TYP. - - 0.8 0.8 - - - - - -
MAX.
UNIT
OUTPUTS: DESIGNATED BY `H' (CMOS LEVELS) VOL VOH CL to(r) to(f) ILO VOL VOH CL to(r) to(f) LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 3-state leakage current IOL = 6 mA IOH = -6 mA 0.4 - 20 - - +10 V V pF ns ns A V V pF ns ns 0.85VDDD(P) -
-10 - 0.9VDDD(P) - 5 5
OUTPUTS: DESIGNATED BY `AL' (ATA DATA BUS LEVELS) LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 0.5 - 100 - -
OUTPUTS: DESIGNATED BY `AH' (ATA LEVELS) VOL VOH CL to(r) to(f) LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time - 0.9VDDD(P) - 5 5 - - - - - 0.5 - 100 - - V V pF ns ns
INPUT: CRIN (EXTERNAL CLOCK) VIL VIH tIH ILI Ci LOW-level input voltage HIGH-level input voltage input high time input leakage current input capacitance relative to period -0.3 2.0 45 -10 - - - - - - +0.5 55 +10 7 V % A pF VDDA + 0.3 V
2003 Sep 23
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Philips Semiconductors
Product specification
DVD and CD playback IC
SAA7818HL
SYMBOL OUTPUT: CROUT fxtal gm Cfb Co Rbias Notes
PARAMETER
CONDITIONS - - - - -
MIN.
TYP. 8.4672 - 17 - - 200 - 2 7 -
MAX.
UNIT
crystal frequency mutual conductance at start-up feedback capacitance output capacitance internal bias resistor
note 5
MHz mA/V pF pF k
1. Clips at maximum gain setting; input can handle 2 x the maximum signal amplitude. 2. Gain depends on application components. 3. Operating in bypass mode. 4. Input leakage does not apply to EAN_WAITN, PSENN_CS and ALE_STB, as these pins have internal pull-up resistors. 5. It is recommended that the nominal running series resistance of the crystal or ceramic resonator is 60 .
2003 Sep 23
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Philips Semiconductors
Product specification
DVD and CD playback IC
10 PACKAGE OUTLINE LQFP208; plastic low profile quad flat package; 208 leads; body 28 x 28 x 1.4 mm
SAA7818HL
SOT459-1
c
y X
A
156 157 105 104
ZE
e E HE
A A2 A1
(A 3) Lp L detail X
wM bp pin 1 index
208 53 1 52
e
bp D HD
wM
ZD B
vM A
vM B
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT459-1 REFERENCES IEC 136E30 JEDEC MS-026 JEITA EUROPEAN PROJECTION A max. 1.6 A1 0.15 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.20 0.09 D (1) 28.1 27.9 E (1) 28.1 27.9 e 0.5 HD HE L 1 Lp 0.75 0.45 v 0.12 w 0.08 y 0.08 ZD 1.43 1.08 ZE 1.43 1.08 7 0o
o
30.15 30.15 29.85 29.85
ISSUE DATE 00-02-06 03-02-20
2003 Sep 23
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Philips Semiconductors
Product specification
DVD and CD playback IC
11 SOLDERING 11.1 Introduction to soldering surface mount packages
SAA7818HL
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 11.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 11.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferably be kept: * below 220 C for all the BGA packages and packages with a thickness 2.5mm and packages with a thickness <2.5 mm and a volume 350 mm3 so called thick/large packages * below 235 C for packages with a thickness <2.5 mm and a volume <350 mm3 so called small/thin packages. 11.3 Wave soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
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Philips Semiconductors
Product specification
DVD and CD playback IC
11.5 Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP Notes not suitable not suitable(3)
SAA7818HL
SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable
suitable not not recommended(4)(5) recommended(6)
1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2003 Sep 23
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Philips Semiconductors
Product specification
DVD and CD playback IC
12 DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
SAA7818HL
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 13 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 14 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Sep 23
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Philips Semiconductors
Product specification
DVD and CD playback IC
ICs with CD functionality Purchase of a Philips IC with CD functionality does not convey an implied license under any patent right to use this IC in any CD application. A license under the Philips CD patents can be obtained via Philips Intellectual Property & Standards (Internet at URL http://www.ip.philips.com; e-mail info.licensing@philips.com). 15 PURCHASE OF PHILIPS I2C COMPONENTS
SAA7818HL
ICs with DVD functionality Purchase of a Philips IC with DVD functionality does not convey an implied license under any patent right to use this IC in any DVD application. A license under the Philips DVD patents can be obtained via Philips Intellectual Property & Standards (Internet at URL http://www.ip.philips.com; e-mail info.licensing@philips.com).
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2003 Sep 23
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Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/01/pp30
Date of release: 2003
Sep 23
Document order number:
9397 750 11111

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