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The Universal Driver TLE 5208-6 G
M
6 * High-Side TLE5208-6G
=
Hex Half Bridge Driver 6 * Low-Side
Power Double Six
=
TLE5208-6G
Figure 1 Features * * * * * * * * * * * * * * Six High-Side and six Low-Side-Drivers Free configurable as switch, halfbridge or H-bridge Optimized for DC motor management applications 0.6 A continuous, 1 A peak current per switch RDS ON; typ. 1 , @ 25 C per switch Output: short circuit protected and diagnosis Overtemperature-Protection with hysteresis and diagnosis Standard SPI-Interface Very low current consumption (typ. 20 A, @ 25 C) in stand-by (Inhibit) mode Over- and Undervoltage-Lockout CMOS/TTL compatible inputs with hysteresis No crossover current Internal clamp diodes Enhanced power P-DSO-Package
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1998-02-01
TLE 5208-6 G
Introduction There is a growing requirement for flexible driver ICs up to 1 A in the increasingly complex electronic systems used for automobile electronics, industrial electronics and consumer electronics. The interface for these ICs has to be "bus-capable", so that the complex control signals can be processed easily. The TLE 5208-6 G is a Smart Power IC, developed specially for this fast-growing market. The TLE 5208-6 G contains 6 high-side (HS) drivers and 6 low-side (LS) drivers, which can be configured as required. These 12 switches are controlled via a 16-bit SPI interface. As a result, parallel or serial connections can be used to implement any switch applications required, and any motor controls in full-bridge or halfbridge configurations. This tristate functionality for motor halfbridges saves a complete halfbridge driver in the case of "multimotor applications", since the motors can simply be connected in series (see Figure 15). The IC is protected against short-circuits and overtemperatures. The SPI interface allows full diagnosis of overload and underload, overvoltage and undervoltage. In the event of serious overheating, the IC sends an overtemperature warning signal, so that the intelligent control system can intervene to reduce the dissipated power accordingly. This additional feature is designed for applications with increased safety requirements. It is also possible to mask the overload current cut-off threshold via software, so that power-on current spikes such as those occurring with motor and lighting loads can be managed. The overvoltage cut-off can likewise be disabled via software. This means that the IC can also be used for industrial electronics with supply voltages up to 40 V. The TLE 5208-6 G has a separate inhibit input for standby running if required (or as a "safety disable"), which switches the module into sleep mode with an extremely low current consumption. All of these functions are incorporated in a P-DSO-28 package, thanks to the latest Siemens Power Technology (SPT). The special leadframe design "enhanced power" reduces thermal resistance to such an extent that intelligent distribution of dissipated power allows nearly all loads to be handled simultaneously on the driver chip. In summary: Where there is a requirement to switch an increasing number of loads, the TLE 5208-6 G will often provide the most cost-effective and technically elegant solution.
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TLE 5208-6 G
Functions of the TLE 5208-6 G Figure 2 shows a block schematic diagram of the IC.
VCC
19 DRV1 Bias Charge Pump DRV2 INH 17 Inhibit FaultDetect DRV3 18 DO 26 DI 25 CLK 24 CSN 16 Bit Logic and Latch 12 OUT H3 11 OUT L3 DRV4 3 OUT H4 4 OUT L4 DRV5 2 OUT H5 1 OUT L5
_ <1
VS
5, 10 15 OUT H1 16 OUT L1 13 OUT H2 14 OUT L2
SPI
UV
TLE 5208-6 G
OV
DRV6 28 OUT H6 27 OUT L6 6, 7, 8, 9, 20, 21, 22, 23 GND
TSD
AEB02175
Figure 2
Block Schematic Diagram of the TLE 5208-6 G
There are 6 halfbridge drivers on the right-hand side. An HS driver and an LS driver are combined to form a halfbridge driver in each case. The drivers communicate via the internal data bus with the logic and the other control and monitoring functions: undervoltage (UV), overvoltage (OV), overtemperature (TSD), charge pump and fault detect. Two pins are provided for supply to the IC: All power drivers are connected to the supply voltage VS. These are monitored by overvoltage and undervoltage comparators with hysteresis, so that the correct function can be checked in the application at any time. The logic is supplied by the VCC voltage, typ. with 5 V. The VCC voltage uses an internally generated Power-on Reset (POR) to initialize the IC at power-on. The advantage of this system is that information stored in the logic remains intact in the event of short-term
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TLE 5208-6 G
failures in the supply voltage VS. The system can therefore continue to operate following VS undervoltage, without having to be reprogrammed. The "undervoltage" information is stored, and can be read out via the interface. The same logically applies for overvoltage. "Interference spikes" on VS are therefore effectively suppressed. The situation is different in the case of undervoltage on the VCC connection pin. If this occurs, then the internally stored data is deleted, and the output levels are switched to high-impedance status (tristate). The IC is initialized by VCC following restart (Power-on Reset = POR) The 16-bit wide programming word or control word is read in via the DI data input, and this is synchronized with the clock input CLK. The status word appears synchronously at the DO data output. The transmission cycle begins when the chip is selected with the CSN input (H to L). If the CSN input changes from L to H then the word which has been read in becomes the control word. The DO output switches to tristate status at this point, thereby releasing the DO bus circuit for other uses. The INH inhibit input can be used to cut off the complete IC. This reduces the current consumption to just a few A, and results in the loss of any data stored. The output levels are switched to tristate status. The module is reinitialized with the internally generated POR (Power-on Reset) at restart. This feature allows the use of this module in battery-operated applications (vehicle body control applications).
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TLE 5208-6 G
Figure 3 shows an overview of the chip layout:
Figure 3
The TLE 5208-6 G Chip
There are 6 power semiconductor switches on both the right-hand and left-hand sides. This represents the optimum system of power distribution in terms of heating the other ICs. The analog levels which are sensitive to temperature gradients (e.g. the bandgap reference) are located at the exact center of the chip, i.e. the farthest possible from the power levels. These in turn can use the surface under the allocated driver levels to drain the dissipated heat. Optimum heat distribution on the chip is achieved using the Finite Element Method (FEM) for different cases. The FEM model for the P-DSO-28-6 package, consisting of chip, glue, bonding wires, leadframes and molding compound, is shown in Figure 4.
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TLE 5208-6 G
Figure 4
Finite Element Model (FEM): Half-Symmetrical View of P-DSO-28-6 Leadframe and TLE 5208-6 G Chip
The "enhanced power" leadframe is easy to identify, where the 4 central connections on each side (Pins 6 to 9 and 20 to 23) provide a metal bridge to the leadframe itself. These 8 pins on the leadframe therefore provide a very effective lateral heat drain. The "worst-case" dissipated power occurs when all switches are loaded. Figure 5 shows the temperature distribution for this scenario. Only a quarter of the layout is shown, since the rest is symmetrical.
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TLE 5208-6 G
Figure 5
Temperature Distribution with Full Loading of all Switches with TLead = 85 C (358K) and PHS = 6 by 0.5 W, PLS = 6 by 0.5 W
The greatest temperature difference in this case is approx. 75 C. The static thermal resistance Rthj-Lead- is therefore only approx. 13 K/W. Therefore: With a maximum permitted chip temperature of Tj = 150 C, the TLE 5208-6 G works up to an environmental temperature of 85 C. These values can be counted on for short periods, i.e. for applications with switching times of a few 100 ms, since the startup time constants of motors and the power-on time constants (inrush) of lights are normally less than 100 ms. Since the thermal capacity of the PCB is not infinite, thermal resistance RthPCB-A for the PCB layout must be added to thermal resistance Rthj-Lead in order to ascertain the environment for continuous operation. In the case of assembly on a 1.5 mm thick FR4 PCB without cooling surfaces in addition to Pins 6 to 9 and 20 to 23, it can be assumed that RthPCB-A = 30 K/W. This value can be reduced to approx. 20 K/W with cooling areas on the PCB. Figure 6 shows another, particularly interesting scenario. In this case, the chip is placed under maximum asymmetric thermal load. All of the switches on one side of the chip generate 0.5 W dissipated power. Half-symmetry must therefore be used to illustrate this.
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TLE 5208-6 G
Figure 6
Temperature Distribution for Asymmetrical Operation with TLead = 85 C (358K) and PHS = 3 by 0.5 W, PLS = 3 by 0.5 W
The greatest temperature difference is now only approx. 45 C. The static thermal resistance Rthj-Lead has risen to an acceptable 15 K/W. It is easy to see the lateral heat flow, firstly towards the center of the chip and then at right angles along the "cooling connections" out of the package. As in the previous case, the temperature peaks are significantly lower for pulsed operation. For estimating purposes, the dyn. thermal resistance Zthj-Lead for single-pulse operation under load was calculated as per Figure 6 and shown in Figure 7.
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Z th-J-Lead
10 2 K/W 10 1
AED02444
10 0
10 -1
10 -2
10 -3 -5 10 10 -4 10 -3 10 -2 10 -1 10 0 s 10 1 tP
Figure 7
Transient Thermal Resistance of the TLE 5208-6 G for Single-Pulse Operation
Output Driver Levels Every driver block from DRV 1 to 6 contains a low-side driver and a high-side driver. The output connections have been selected so that each HS driver and LS driver pair can be combined to form a halfbridge by short-circuiting adjacent connections. The full flexibility of the configuration can be achieved by dissecting the halfbridges into "quarter-bridges". Figure 8 shows examples of possible applications. When commutating inductive loads, the dissipated power peak can be significantly reduced by activating the transistor located parallel to the internal freewheeling diode. A special, integrated "timer" for power ON/OFF times ensures there is no crossover current at the halfbridge.
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TLE 5208-6 G
VS
HS Driver Load Load High-side switch and low-side switch with internal freewheeling for slow commutating
OUTH1 to 6 1/6 TLE 5208-6 G OUTL1 to 6 LS Driver Load Load Full-bridge motor control; motors connected in series; (saves a complete halfbridge driver) M M
GND
High-side switch with external freewheeling for slow commutating
Low-side switch with external freewheeling for fast commutating
AES02176
Figure 8
Configuration Examples for "Quarter" Bridges on the TLE 5208-6 G
The following detailed block schematic diagrams of the output levels are provided for further clarification. The low-side driver connection is shown in Figure 8.
Internal Supply OUTL1...6 Input Output Switch-ON-Delay LS-Driver MOC MOL MOUT
Control Input
To Status Latches
Gate Status Over Current Open Load 50 s Delay
GND
Current Limit
+ -
VOC VOL
R Sense Over Curent
R Sense Open Load
+ -
Power GND
AES02445
Figure 9
The Low-Side Driver Connection on the TLE 5208-6 G
The output transistor MOUT, a power MOS (D-MOS) transistor, has an RDSON of typ. 1 at 25 C.
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TLE 5208-6 G
Its source connection is linked to the Power-GND connection. The drain connection provides the output OUTL1 to OUTL6. Two sense devices (transistor, resistor and comparator) are used to detect overloads and underloads. In the event of overcurrent, the gate voltage is also restricted. Following a specified dead time of typ. 50 s, the logic cuts off the output transistor, and stores the information "Overcurrent at Switch X" in the status register. It is possible to override the cut-off after 50 s by resetting the overcurrent ON/OFF bits. However, the current continues to be restricted. This function allows the power-on of e.g. lights, motors, and heavy capacitive loads, which have high inrush currents and relatively short conducting periods. Furthermore, delayed power-on allows the low-side drivers to be adapted to the switching times of the HS switch. In the case of halfbridge operation, this ensures that the HS switch is turned off before the LS switch starts to conduct (suppression of crossover current). In order to ensure reliable underload detection in the case of commutating, inductive loads, an identical underload dead time has been integrated for all channels (including the high-side switches). The timer for this dead time (typ. 300 s is started with the positive edge of the CSN. Explanation: All commutation processes start with this edge (e.g. to drive a motor in reverse mode), if inductance is present. Commutation processes must be interpreted as underload by the underload detection system, since the current requires a finite period firstly to change the polarity and then to exceed the underload threshold. This dead time allows this "false information" to be suppressed, and its storage in the status register is prevented. Like the LS driver, the high-side driver circuit shown in Figure 10 contains an overcurrent read-out, an undercurrent read-out and a current limit. Only the sense resistors are now in the drain branch. The comparator inputs therefore have supply voltage VS as a fixed reference potential.
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TLE 5208-6 G
VCHP VS
HS-Driver 1 MOC Control Input
To Status Latches
R Sense Over Curent
MOL
R Sense Open Load
MOUT
OUTH1...6 HS-Driver 2 Gate Status Over Current Open Load 50 s Delay Current Limit
VOC VOL
Figure 10 The High-Side Driver Circuit on the TLE 5208-6 G The signal processing which takes place in logic is similar to that of the LS switch. However, gate control is now supplied by the internal charge pump voltage VCP, which is approx. 12 V greater than VS. Special circuit technology is used to provide "tristate-compatible" output levels. This characteristic is particularly important in the case of halfbridge/full bridge operation, e.g. if independent control is required for motors which are connected in series. The start-up configuration of the TLE 5208-6 G also ensures that no uncontrolled switching of the output levels occurs in the whole of the undervoltage range for VS and VCC. All output transistors are switched to tristate status. The functional range of the supply voltages is therefore specified up to 0 V. The most important data for the output drivers is summarized again in Table 1.
Semiconductor Group
+ + -
AES02446
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TLE 5208-6 G
Table 1 Parameter
The Main Parameters of the Output Driver Symbol Value for Tj = - 40 to 150 C min. typ. 1 - - - 3.0 - - max. 2.5 1 2.0 80 5 100 400 mA A s A mA s - - 1.0 25 - 10 200 Unit
ON resistance Tristate leak current Cutoff current threshold Cutoff dead time Current limit Underl. curr. threshold Underload dead time
RDSON IQL ISD tdSD IOCL IOCD tdOC
Programming the TLE 5208-6 G The SPI interface is used to control the module or read out the status word. Figure 11 shows a typical read/write cycle in the form of an oscillogram.
CH1 CH2 RF1 RF2 RF3 RF4 CSN CH2gnd CLK RF3gnd DI RF4gnd DO Previous Status CH1gnd VOUTL1 V 10 Bit 1 = Low-side SW1 ON Bit 13 = Overcurrent SD ON 5V 5V 5.00 V A 50 s 50 s 1.95 V CH2
AED02447
55.5 s = t dSD (overcurrent shut down delay time)
10.0 mV 50 s 5.00 V 50 s 5.00 V 50 s Bit 0 = Status Register Reset
Bit 13 = Overcurrent detected
t dSD
1.8 A
5 RF2gnd
Bit 1 = L SW1 had been switched OFF by overcurrent protection
OUTL1 A 2
1
Figure 11 TLE 5208-6 G Read/Write Cycle
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TLE 5208-6 G
Read-in of the 16-bit long control word begins after the H-L edge of the CSN signal. Read-in of the control word at the DI input is synchronized with the CLK clock. The status word for the previous control word appears at the data output DO. When the CSN signal changes from L to H, the data which has been read in takes effect. The module is programmed. This is shown in Figure 11 where the two lower lines represent the voltage and the current of LS Switch 1 (was programmed with Bit 1 = H at power-on; Bit 0 = H has also been read in). After approx. 50 s the module cuts off the output because it is overloaded with more than 2 A, and Bit 13 = H (current cutoff active) was programmed at the same time. The exact timing is not detailed here. This data is specified in the TLE 5208-6 G Data Sheet. Special software has been developed to provide simple control of an application board. This can be run under Windows(R) on any standard PC. The printer interface LPT1 or LPT2 can be used as an "SPI interface with inhibit". Further details are provided below. Figure 12 and Figure 13 show the allocation of functions and switches to the control and diagnostics word
.
Bit 15
14
13 Overcurrent SD on/off
12
11
10
9
8
7
6
5
4
3
2
1
0 Status Register Reset
1998-02-01
OVLO on/off
HS-Switch 6
HS-Switch 5
HS-Switch 4
HS-Switch 3
HS-Switch 2
HS-Switch 1
LS-Switch 6
LS-Switch 5
LS-Switch 4
LS-Switch 3
LS-Switch 2
H = ON L = OFF
Figure 12 The TLE 5208-6 G Control Word Details are as follows: * Bit 0: Status Register Reset Bit 0 Bit 0 =L All data remains stored in the status register. = H The status register is reset after every programming cycle.
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LS-Switch 1
not used
TLE 5208-6 G
* Bits 1 to 12: Driver control: Bit 1 Bit 1 Bit 2 Bit 2 Bit 12 Bit 12 Bit 13 Bit 13 =L =L LS Switch 1 HS Switch 1 OFF ON OFF ON OFF ON = H LS Switch 1 = H HS Switch 1 =L HS Switch 6
and so on until = H HS Switch 6 =L
* Bit 13: Overcurrent lockout: Overcurrent lockout after 50 s is not active; the current is limited to typ. 3 A.
= H Overcurrent lockout after 50 s is active.
* Bit 14: Not used * Bit 15: Overvoltage lockout Bit 15 Bit 15
.
=L
Overvoltage lockout (OVLO) is not active. The module can be operated up to VS = 40 V.
= H Overvoltage lockout is active. All outputs are cut off if VS = min. 34 V.
Bit 15 Power Supply failf
14
13
12 Status HS-Switch 6
11 Status LS-Switch 6
10 Status HS-Switch 5
9 Status LS-Switch 5
8 Status HS-Switch 4
7 Status LS-Switch 4
6 Status HS-Switch 3
5 Status LS-Switch 3
4 Status HS-Switch 2
3 Status LS-Switch 2
2 Status HS-Switch 1
1 Status LS-Switch 1
0 Temp. Prewarning
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Underload
High Means Switch is ON Low Means switch is OFF
Figure 13 The TLE 5208-6 G Status Word
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Overload
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TLE 5208-6 G
The status word transmits the following information: * Bit 0: Overtemperature warning If the chip temperature rises above typ. Tj = 145 C, then Bit 0 is set to H. The information is stored in the status register. At typ. Tj = 175 C, all output levels are cut off (emergency off). The data remains stored in all registers. If the chip temperature drops below typ. Tj = 125 C, then Bit 0 is set to L. The information in the status register is overwritten (all-clear). * Bits 1 to 12: ON/OFF status indicator of the driver levels Status bits of the switches; assigned in the same way as the control word. This has the advantage that a simple EX-OR comparison of the control and status word after two read-ins is sufficient to check the transmission path and the application. The driver status is inserted in the status word. Analysis is performed by measuring the gate voltage at the output transistors. L means: H means: Output level is deactivated (inhibited) Output level is active (conducting)
* Bit 13: Overload/short-circuit indicator "Overload" information is output here. H means that one or more of the 12 switches is or was overloaded. Status Bits 1 to 12 can be used to identify the switch concerned. * Bit 14: Underload/broken wire indicator "Underload" information is output here. H means that underload has been detected on one or more of the 12 switches. The exact identification of the switch concerned is likewise given by status bits 1 to 12. * Bit 15: Supply voltage fault "Overvoltage or undervoltage at VS" information is output here. H means that overvoltage or undervoltage has been or is still being detected at VS. Overvoltage is also indicated if Bit 15 of the control word has been set to L (OVLO not active). All information is stored, unless Bit 0 of the control word is set and a new control cycle has been initiated (see Bit 0 of the control word). In the same way, the status register is deleted by turning VCC on or off, or by deactivating the IC via the inhibit input (INH = L).
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Applications The following section is concerned with possible applications of the IC. The most important information is the pin configuration (pinning) and the package dimensions, and these are shown in Figure 14 and Figure 15.
OUT L5 OUT H5 OUT H4 OUT L4
1 2 3 4 5 6 7 Chip 8 9 Leadframe
28 27 26 25 24 23 22 21 20
OUT H6 OUT L6 DI CLK CSN GND GND GND GND
VS
GND GND GND GND
VS 10
OUT L3 OUT H3 OUT H2 OUT L2 11 12 13 14
AEP02174
19 VCC 18 17 16 15 DO INH OUT L1 OUT H1
Figure 14 Pin Configuration
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P-DSO-28-6 (Plastic Dual Small Outline Package)
2.65 max
0.35 x 45
+0.09
2.45 -0.2
0.2 -0.1
1.27 0.35 +0.15 2) 0.2 28x 28 15 0.1
0.4 +0.8 10.3 0.3
1 Index Marking
18.1 -0.4 1)
14
1) Does not include plastic or metal protrusions of 0.15 max rer side 2) Does not include dambar protrusion of 0.05 max per side
Figure 15 Package Outlines The 4 connections of the serial interfaces (DI, DO, CLK and CSN) and the inhibit input are located close to each other on the same side of the package. This considerably simplifies PCB design. In order to use the PCB as a heat sink, as many copper-clad surfaces as possible should be located beside the GND connections. Thermal resistance can also be significantly reduced by using through holes next to the IC. Of the wide range of possible applications, the one shown in Figure 16 and featuring a series of five motors is particularly interesting. Five motors are required e.g. for vehicle air conditioning. Quasi-synchronous control of all 5 motors can be achieved via software, although only one motor is driven at any time, in a sort of time-slicing operation. The dissipated power is limited to very low values in this way. Even the requirement to maintain a continuous brake on the "air intake motor" due to dynamic pressure (caused by the relative wind), can be satisfied by means of suitable software control.
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0.23
GPS05123
8 ma
x
7.6 -0.2 1)
TLE 5208-6 G
Watchdog Reset Q
TLE 4268G
D
D01 1N4001 D02 Z39
VS = 12 V
CQ 22 F
WD R
CD 100 nF VCC
19
CS 10 F
VCC
VS
5, 10 DRV1 Charge Pump DRV2 15 OUT H1 16 OUT L1 13 OUT H2 14 OUT L2 DRV3 12 OUT H3 11 OUT L3 DRV4 3 OUT H4 4 OUT L4 DRV5 2 OUT H5 1 OUT L5 DRV6 28 OUT H6 27 OUT L6 6, 7, 8, 9, 20, 21, 22, 23, GND
AES02182
Bias
M1
INH 17
Inhibit
FaultDetect
M2
P
DO DI CLK CSN
18 26 25 24
SPI
16 Bit Logic and Latch
M3
UV
M4
TLE 5208-6 G
OV
_ <1
M5
TSD
GND
Figure 16 Application Circuit with TLE 5208-6 G and TLE 4268 G for Vehicle Air Conditioning The SIEMENS low-drop voltage regulator TLE 4268 G can be used for the VCC power supply. It has additional functions such as reset and watchdog for integrated controller management, and features excellent EMC stability. If this voltage regulator does not meet the application requirements, there is a wide range of different SIEMENS low-drop voltage regulators available.
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TLE 5208-6 G
The external configuration of the TLE 5208-6 G is extremely simple. Only one blocking capacitor CS to VS and one reverse-connection protected diode are required. The capacitor CS has to store any reverse inductive energy, since the reverse-connection protected diode prevents the backflow to the power supply. For this reason CS should not be too small. If a Zener diode of e.g. 36 V is connected from VS to GND then this rule no longer applies. CS can be considerably smaller in this case (a few F). The slew rate of the supply voltage dVS/dt is now the determining parameter. CS should be selected so that dVS/dt remains clearly below 10 V/s. Another application for the TLE 5208-6 G could be in door control equipment. A single driver could be used to switch the two mirror motors, the window winder relay, and other loads with the remaining circuits (1 LS + 3 HS). Multichannel light switches are often required in industrial electronics for large displays or power management functions with a large number of channels. High power-on peak currents frequently occur in these applications. These may be up to an order of magnitude higher than the rated current. The TLE 5208-6 can switch load currents of up to 2 A per channel if the overcurrent lockout has been deactivated by setting Bit 13 to L. Once the power-on procedure has been completed, the overcurrent lockout can be reactivated via software control (Bit 13 to H), in order to protect the load (blocked motor etc.) and the IC against overload. If the current now rises above the cutoff threshold of typ. ISD = 1.5 A during nominal operation, then the channel is disconnected after a dead time of typ. tdSD = 50 s. Figure 11 shows a typical cutoff process: Shortly after the CSN control signal changes from L to H, the OUTL1 output is switched to overload and disconnected after the time tdSD. The VS operating voltage range can be extended up to 40 V by setting the overvoltage Bit 15 to L. This therefore satisfies all the main industrial requirements.
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TLE 5208-6 G
Application Board and Control Software For the purposes of laboratory testing and as a development system, an application board is available with various loads switched by a TLE 5208-6 G, together with Windows(R) control software. Application Board Configuration * * * * 2 motors in series 1 relay - slow commutating 1 relay - fast commutating (LS switch with Z-diode) A sub-application (5 V regulator TLE 5208-6 G) which can be switched by means of an HS switch on the TLE 5208-6 G * A lighting load to demonstrate overcurrent programming For this lamps have been selected in a way that the TLE 5208-6 G can switch on just one lamp when overcurrent shut down is activated (OCSD-Bit 13 = H). By switching on the second lamp the overcurrent shut down is working. If the OCSD-Bit 13 is now set to `L' the second lamp can be switched on too without any problem. After having performed this "inrush", the overcurrent shut down can by again activated by seting the OCSD-bits * An HS switch and an LS switch extending directly. An external load can be connected here for testing purposes. Figure 16 shows the schematic circuit diagram and Figure 18 shows the associated PCB for the application board.
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TLE 5208-6 G
Power 2 3 TLE 4268 1 5 8 22 F 100 nF OFF ON 1N4001 Power ON 1.5 k + VS GND
10 F ZPD 38 100 nF
VCC
19
VS
5, 10 OUT H1 15 OUT L1 16 M 13 14 OUT H2 OUT L2 CW OUT H3 OUT L3 OUT H4 OUT L4 OUT H5 OUT L5 ON Rel. ON M 1.5 k CCW 1.5 k 1N4001 1.5 k Rel. ON
CW 1.5 k
CCW 1.5 k 12 V / 5 A
10 k 47 nF INH
INH
17
DO 6.8 V
1 k DO
18
12 11 3 4
CS4 CS3 CS2 CS1
CS-Code 10 k CS
TLE 5208 - 6
24 2 1
V LDD-Regulator V O Appl.-Board Lamp 2 TLE 4269 C
1.5 k ZPD 39 Rel. ON
12 V / 5 A 1.5 k
CLK DI
10 k CLK 10 k DI
25 26 28
OUT H6 1.5 k H6 ON 1N4001
OUT H6
27 6, 7, 8, 9, 20, 21, 22, 23
OUT L6 L6 ON 1N4001
OUT L6
AES02448
Figure 17 Schematic Circuit Diagram of the TLE 5208-6 Application Board
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TLE 5208-6 G
5208LPr1S 10
CS1
CS4 CS DI CLK
C D + 100 F Z6.3 D INHDO
Z39
+ VS
GND
CS Code
C 22 F C 22 F
Power OFF ON Power ON
4MT HL LH HL LH TM4 TLE 5208-6 Demoboard
H4 OUT L1/H1 OUT L2/H2 OUT L3/H3 OUT H4 CCW CCW Relaise CW MotorRotation Motor Motor CW ON
12 V / 5 A Relaise 12 V / 5 A Relaise
L4
H5 OUT L4 Relaise ON
TLE 5208-6
OUT H5 LDD Regulator OUT L5 Lamp 2 OFF
Lamp 1 12 V / 0.25 A Lamp 2 12 V / 0.25 A
OUT H6
OUT L6
VQ (+5 V)
ON
ON
OUT L6
ON
draobomeD 6-8025 ELT
AEA02449
Figure 18 Layout of the TLE 5208-6 Application Board The standard parallel interface on a PC is used to control and read the status word. Software running under Windows allows the simple definition of macros, which can be combined to create a sequence program. The standard screen masks are shown in Figure 19.
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OUT H6
1998-02-01
TLE 5208-6 G
Figure 19 Standard Masks for the TLE 5208-6 G Control Software The control software can address four boards via corresponding chip select lines. A small bus system can easily be constructed in this way. The complete system can be disconnected via the INH button on the PC. The only additional hardware required is a 12 V supply voltage and a standard PC with a printer interface. The documentation supplied with the application board contains lots of additional information to provide a better understanding of the IC. The application board and the control software can be obtained from SIEMENS sales offices. Conclusion The TLE 5208-6 G module has successfully bridged the gap between single switches and motor bridge applications. The breakdown of the H bridge circuit into "quarter bridges", i.e. individual low-side and high-side switches, was achieved for the first time with the high-current bridge driver IC BTS 770/1 (TrilithIC), which is already in mass production. Today, this IC is often used in mixed switch/motor bridge applications. This is actually a multichip IC consisting of 3 chips (hence the name TrilithIC). In contrast, the TLE 5208-6 G is a monolith, offering the only "double-six" combination of high-side and low-side switches in the world today. This unique combination allows all possible loads to be controlled easily, and therefore sets a new standard in the field of power electronics.
Semiconductor Group 24 1998-02-01

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