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STS5PF30L
P - CHANNEL 30V - 0.053 - 5A SO-8 STripFETTM POWER MOSFET
PRELIMINARY DATA
TYPE STS5PF 30L
s s
V DSS 30 V
R DS(on) < 0.060
ID 5A
s
TYPICAL RDS(on) = 0.053 STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE
DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique "Single Feature SizeTM " strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS BATTERY MANAGMENT IN NOMADIC EQUIPMENT s POWER MANAGMENT IN CELLULAR PHONES
s
SO-8
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symb ol V DS V DGR V GS ID Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Single O peration Drain Current (continuous) at Tc = 100 o C Single O peration Drain Current (pulsed) T otal Dissipation at Tc = 25 C
o o
Value 30 30 20 5 3 20 2.5
Un it V V V A A A W
I DM (*) P tot
(*) Pulse width limited by safe operating area Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed
November 1999
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STS5PF30L
THERMAL DATA
R thj -amb Tj
Ts tg
*Thermal Resistance Junction-ambient Maximum O perating Junction Temperature Storage T emperature
50 150 -55 to 150
o o
C/W C/W o C
(*) Mounted on FR-4 board (t 10sec) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA
V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 20 V
T c = 125 oC
ON ()
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10 V V GS = 4.5 V Test Con ditions ID = 250 A ID = 3 A ID = 3 A 5 Min. 1 Typ. 1.6 0.053 0.067 Max. 2.5 0.060 0.075 Unit V A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz ID = 3 A V GS = 0 V Min. Typ. 10 1350 490 130 Max. Unit S pF pF pF
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STS5PF30L
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V ID = 2 A R G = 4.7 V GS = 4.5 V (Resistive Load, see fig.3) V DD = 24 V ID = 4 A V GS = 5 V Min. Typ. 25 35 12.5 5 3 16 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbo l t d(of f) tf Parameter Turn-off Delay T ime Fall T ime Test Con ditions V DD = 24 V I D = 2 A R G = 4.7 VGS = 4.5 V (Resistive Load, see fig.3) Min. Typ. 125 35 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 5 A V GS = 0 tbd tbd tbd I SD = 5 A di/dt = 100 A/s T j = 150 oC V r = 20 V (see test circuit, fig.5) Test Con ditions Min. Typ. Max. 5 20 1.2 Unit A A V ns nC A
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
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STS5PF30L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STS5PF30L
SO-8 MECHANICAL DATA
DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
0016023
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STS5PF30L
Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
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