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| BUZ72A Data Sheet June 1999 File Number 2262.2 9A, 100V, 0.250 Ohm, N-Channel Power MOSFET This is an N-Channel enhancement mode silicon gate power field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. Formerly developmental type TA17401. Features * 9A, 100V * rDS(ON) = 0.250 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Ordering Information PART NUMBER BUZ72A PACKAGE TO-220AB BRAND BUZ72A NOTE: When ordering, use the entire part number. Symbol D G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 4-23 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 BUZ72A Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified BUZ72A 100 100 9 36 20 40 0.32 -55 to 150 E 55/150/56 300 260 UNITS V V A A V W W/oC oC Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG DIN Humidity Category - DIN 40040 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IEC Climatic Category - DIN IEC 68-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications PARAMETER Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0V VGS = VDS, ID = 1mA (Figure 9) TJ = 25oC, VDS = 100V, VGS = 0V TJ = 125oC, VDS = 100V, VGS = 0V VGS = 20V, VDS = 0V ID = 5A, VGS = 10V (Figure 8) VDS = 25V, ID = 5A (Figure 11) VCC = 30V, ID 2.9A, VGS = 10V, RGS = 50, RL = 10 MIN 100 2.1 2.7 VDS = 25V, VGS = 0V, f = 1MHz (Figure 10) TYP 3 20 100 10 0.23 3.8 20 45 70 55 450 150 80 3.1 75 MAX 4 250 1000 100 0.250 30 70 90 70 600 240 130 UNITS V V A A nA S ns ns ns ns pF pF pF oC/W oC/W Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient IGSS rDS(ON) gfs td(ON) tr td(OFF) tf CISS COSS CRSS RJC RJA Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulsed Source to Drain Current Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovery Charge NOTES: 2. Pulse Test: Pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). SYMBOL ISD ISDM VSD trr QRR TJ = 25oC, ISD = 18A, VGS = 0V, (Figure 12) TJ = 25oC, ISD = 9A, dISD/dt = 100A/s, VR = 30V TC = 25oC TEST CONDITIONS MIN TYP 1.5 170 0.30 MAX 9 36 2 UNITS A A V ns C 4-24 BUZ72A Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 ID, DRAIN CURRENT (A) Unless Otherwise Specified 12 VGS 10V 10 8 6 0.6 0.4 4 2 0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 0 0 50 100 TC, CASE TEMPERATURE (oC) 150 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZJC, TRANSIENT THERMAL IMPEDANCE 0.5 1 0.2 0.1 0.05 0.02 0.1 0.01 0 PDM NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 0.01 10-5 10-4 10-1 10-3 10-2 t, RECTANGULAR PULSE DURATION (s) 100 101 t1 t2 FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 102 20 TJ = MAX RATED, TC = 25oC, SINGLE PULSE 1.5s ID, DRAIN CURRENT (A) 15 PD = 40W TJ = 25oC VGS = 20V 10V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 8.0V VGS = 7.5V VGS = 7.0V ID, DRAIN CURRENT (A) 101 10s 100s OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1ms 10ms 100ms DC 10 VGS = 6.5V VGS = 6.0V 100 5 VGS = 5.5V VGS = 5.0V VGS = 4.5V 10-1 100 101 102 VDS, DRAIN TO SOURCE VOLTAGE (V) 103 0 VGS = 4.0V 0 4 8 VDS, DRAIN TO SOURCE VOLTAGE (V) 12 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS 4-25 BUZ72A Typical Performance Curves IDS(ON), DRAIN TO SOURCE CURRENT (A) 25 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 25V, TJ = 25oC Unless Otherwise Specified (Continued) 0.8 VGS = 5V 5.5V 6V 6.5V 7V 7.5V 8V 20 rDS(ON), DRAIN TO SOURCE ON RESISTANCE () 0.6 15 0.4 9V 10V 0.2 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 0 5 10 15 ID, DRAIN CURRENT (A) 20 20V 10 5 0 0 5 VGS, GATE TO SOURCE VOLTAGE (V) 10 0 FIGURE 6. TRANSFER CHARACTERISTICS FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT rDS(ON), DRAIN TO SOURCE ON RESISTANCE () 0.6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID = 5A VGS = 10V VGS(TH), GATE THRESHOLD VOLTAGE (V) 0.8 4 VDS = VGS, ID = 1mA 3 0.4 2 0.2 1 0 -50 0 50 100 150 0 -50 0 50 100 150 TJ, JUNCTION TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE FIGURE 9. GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 101 5 gfs, TRANSCONDUCTANCE (S) 40 VGS = 0, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGS PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 25V, TJ = 25oC 4 C, CAPACITANCE (nF) 100 CISS COSS CRSS 3 10-1 2 1 10-2 0 10 20 30 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 0 5 10 ID, DRAIN CURRENT (A) 15 FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT 4-26 BUZ72A Typical Performance Curves 102 ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX Unless Otherwise Specified (Continued) 15 VGS, GATE TO SOURCE VOLTAGE (V) ID = 14A 101 TJ = 150oC TJ = 25oC 10 VDS = 20V VDS = 80V 100 5 10-1 0 0.5 1.0 1.5 2.0 2.5 VSD, SOURCE TO DRAIN VOLTAGE (V) 3.0 0 0 5 10 15 20 25 Qg, GATE CHARGE (nC) FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms tON td(ON) tr RL VDS + tOFF td(OFF) tf 90% 90% RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 14. SWITCHING TIME TEST CIRCUIT VDS (ISOLATED SUPPLY) FIGURE 15. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS 12V BATTERY 0.2F 50k 0.3F G DUT 0 Ig(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR Ig(REF) 0 FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORMS 4-27 BUZ72A All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 4-28 |
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