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Features * * * * * * * * 12-bit Resolution 500 Msps Sampling Rate Full Power Input Bandwidth (-3 dB) > 1.5 GHz 1.1 Vpp Analog Input (Differential Only) AC or DC Coupled Analog Input with External Control Differential 100 or Single-ended 50 PECL/LVDS Compatible Clock Inputs LVDS Output Compatibility (100) 3-wire Serial Bus Programming Interface - 16-bit Data, 3-bit Address - Gain (1.5 dB Full-scale) Digital Control - Offset Digital Control ( 40 LSB) - Standby Mode - Internal Static Built-In Test (BIST) * * * * Synchronous Reset Input Low Power Consumption: 2.3W Power Supply: 5V (Analog), 3.3V (Digital, Output) EBGA 192 Package 12-bit 500 Msps ADC AT84AS001 Summary Performances * * * * * Band Flatness (0.5 dB) from DC up to 250 MHz 10-bit ENOB (at FIN = 250 MHz) SFDR = 72 dBc, SNR = 62 dBc, at FS = 500 Msps, FIN = 250 MHz, -1 dB Input Level 2-tone IMD: -70 dBc (240 MHz, 250 MHz) at 500 Msps DNL = 0.8 LSB; INL = 2 LSB (Typical) For more information, please contact hotline-bdc@gfo.atmel.com Screening * Temperature range: - Commercial C grade 0C < Tamb < 70C - Industrial V grade -40C < Tamb < 85C Applications * * * * * Test and Measurement Instrumentation Radar and Satellite Receiver Subsystems Wireless and Wired Communications Receivers High Speed Data Acquisition Medical Imaging 5412BS-BDC-04/06 1. Description The AT84AS001 is a high performance 12-bit, 500 Msps ADC featuring low power consumption and true 12-bit linearity for IF sampling applications. By using its on-chip S/H circuity and advanced high speed process technology, it allows for sampling rates up to 500 Msps at a center frequency of 150 MHz and IF band of 100 MHz. Its electrical performance is coupled with ease of integration into new or existing designs by such features as AC or DC coupled analog input, differential LVDS compatible output, 3-wire serial programming interface (gain control, offset control, standby mode and Built-In-Test), Double Data Rate clock output and synchronous reset input. Figure 1-1. Block Diagram SDATA SCLK SLDN SMODE 3-wire Serial Interface STBY 8-bit DAC 8 - bit DA C RESET RESETN CLKI CLKIN 2 2 Offset control Gain control Buffer Clock LVDS Clock Buffer 2 CLKO CLKON IR VIN VINN + S/H Analog Core Digital core 12 LVDS / BUFFER 24 D DN VCS H T 2 5412BS-BDC-04/06 AT84AS001 2. Functional Description The AT84AS001 is a monolithic 12-bit 500 Msps ADC. The circuit includes an on-chip Sample and Hold (S/H), and a 12-bit analog-to-digital converter core. The output data is LVDS (100) compliant. A 3-wire serial interface (3-bit address, 16-bit data) is included to provide several adjustments and controls: * * * Gain: 1.5 dB full-scale digital control (8-bit-control) Offset: 40 LSB digital control (8-bit control) Standby mode for power saving The AT84AS001 features a full-power input bandwidth of 1.5 GHz Table 2-1. Name VCCA VCCD VCCO GND VIN, VINN CLKI, CLKIN Functional Description Function Positive analog power supply 5V Positive digital power supply 3.3V Positive output power supply 2.5V or 3.3V Ground Differential analog inputs Differential clock inputs Differential data ready output Positive output data mode LVDS Negative output data mode LVDS Synchronous reset input signal Diode for die junction temperature monitoring 3-wire serial bus interface Common sample and hold voltage 3-wire serial bus interface selection GND VIN, VINN CLKI CLKIN SMODE 3WSI VDIODE RESET 2 RESETN VCSH 3 AT84AS001 2 , CLKO CLKON 2 24 2 D0, D0N D11, D11N VC CA VCCD VCCO CLKO, CLKON 3 5412BS-BDC-04/06 3. AT84AS001 Pinout Table 3-1. Pin Number A1, A7, A10, A16, B8, B9, C3, C4, C5, C6, C8, C9, C11, C12, C13, C14, D3, D4, D5, D6, D8, D9, D11, D12, D13, D14, E3, E4, E13, E14, G1, G2, H2, H3, H4, H13, H14, J2, J3, J4, K1, K13, K14, L3, L4, M3, M4, M13, M14, N3, N5, N7, N8, N9, N10, N12, N14, P3, P5, P7, P8, P9, P10, P12, P14, R2, R4, R6, R8, R9, R11, R13, R15, T1, T2, T4, T6, T7, T10, T11, T13, T15, T16 N4, N6, N11, N13, P4, P6, P11, P13, R1, R3, R5, R12, R14, R16, T3, T5, T12, T14 B7, C7, D7, F3, F4, F13, F14, J13, J14, K3, K4 B10, C10, D10, G3, G4, G13, G14, L13, L14 Inputs H1, J1 T9 T8 R10 R7 Outputs G16, F16, E16, A15, A14, A12, A11, A6, A4, A3, E1, F1 G15, F15, E15, B15, B14, B12, B11, B6, B4, B3, E2, F2 A9, A8 N1 Function Inputs L1, L2 K2 P15 P16 N16 N15 Other A2, A5, A13, B1, B2, B5, B13, B16, C1, C2, C15, C16, D1, D2, D15, D16, H15, H16, J15, J16, M1, M2 K15, K16, L15, L16, M15, M16, N2, P1, P2 Not connected pins NC They can be used as thermal pads when connected to ground Atmel Internal Test Pins They must be left unconnected (floating) RESET, RESETN VDIODE SMODE SLDN SDATA SCLK Differential Synchronous RESET signal Diode for die junction temperature monitoring Selection Bit for 3WSI (SMODE = 1) or normal mode (SMODE = 0) Beginning and End of register line for 3WSI Input data for 3WSI Input clock for 3WSI D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11 D0N, D1N, D2N, D3N, D4N, D5N, D6N, D7N, D8N, D9N, D10N, D11N CLKO, CLKON VCSH In-phase digital output data (D11 is the MSB) Out-of-phase digital output data (D11N is the MSB) Output clock Input common mode CLKI, CLKIN VIN VINN VIN VINN Input clock In-phase Analog input (Signal) Out-of-phase Analog input (Signal) In-phase Analog input (50 reverse termination) Out-of-phase Analog input (50 reverse termination) Pinout Table Symbol Function GND Ground VCCA VCCD VCCO Analog power supply 5V Digital power supply 3.3V Output and 3WSI power supply 3.3V or 2.5V TEST T 4 5412BS-BDC-04/06 AT84AS001 Figure 3-1. Pinout Diagram (Bottom View) 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P R T 5 5412BS-BDC-04/06 4. Implementing the AT84AS001 ADC 4.1 Analog Input Implementation in AC Coupled Mode The analog inputs of the ADC were designed with a double pad implementation as illustrated in the following schema, Figure 4-1. The reverse pad for each input should be tied to ground via a capacitor of 10 nF and a 50 resistor. In this mode, the VSCH output pin is left open. Figure 4-1. AC Analog Inputs Termination Methods ADC Analog Input Buffer 0.42 x VCCA Reverse Termination 10 nF 50 L GND 10 nF VI N Double PADs VCCA 2 K 2 K Z = 50 50 Source Z = 50 10 nF L GND 50 10 nF VINN VCSH GNDA Reverse Termination T 6 5412BS-BDC-04/06 AT84AS001 4.2 Analog Input implementation in DC Coupled Mode In order to set the DC analog input, voltage the VCSH output pin must be used as described in Figure 4-2. The impedance Zout//R1 must be lower than 2 k and equal to 50 to guarantee good impedance matching and to apply correct analog input level. Figure 4-2. DC Analog Inputs Termination Methods R1 Zout//R1= 50 R2 IN + Zout VIN R1 Zout//R1= 50 R2 INN + Zout VINN VCSH Note: The VCSH is equal to 0.42 x VCCA 7 5412BS-BDC-04/06 5. Package Information Figure 5-1. Cross Section of TBGA 192 21.0 mm2 0.400 mm 0.050 mm 0.380 mm 0.350 mm Copper Heat Spreader Black Overcoat Silicon Die 0.55 mm Typical Board Reflowed Sn/Pb/Ag 62/36/2 Eutectic Solder Balls Due to package weight, the balls "collapse" somewhat during reflow, and the height of the balls is reduced by approximately 0.10 mm. The balls increase simultaneously in diameter to compensate. Notes: 1. The copper heat spreader is connected to the ADC circuit GND through a conductive low resistivity die attach. 2. For RoHS version, please contact your local Atmel Sales Office. T 8 5412BS-BDC-04/06 3.0 mm Figure 5-2. 11 D -A10 -B16 15 14 13 12 11 10 9 A B C D E F G 8 7 6 5 4 3 2 1 5412BS-BDC-04/06 0.10 CORNER * 4 45 deg 0.5mm chamfer e E E1 J K L M N P R T H MAX. 1.65 0.70 21.20 21.20 0.85 0.95 DIMENSIONAL REFERENCES MIN. NOM. 1.45 1.55 0.60 0.65 20.80 21.00 19.05 (BSC.) 20.80 21.00 19.05 (BSC.) 0.65 0.75 0.85 0.90 16 192 0.15 0.15 1.27 TYP. 0.15 Mechanical Drawings of TBGA 192 REF. A A1 D D1 E E1 b c M N aaa ccc e P DETAIL B D1 BOTTOM VIEW DETAIL A e TOP VIEW b 0.30 0.10 S S CA SB S C SIDE VIEW DETAIL B 4 NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS 2. "e" REPRESENTS THE BASIC SOLDER BALL GRID PITCH 3. "M" REPRESENTS THE BASIC SOLDER BALL MATRIX SIZE, AND SYMBOL "N" IS THE MAXIMUM ALLOWABLE NUMBER OF BALLS AFTER DEPOPULATING. 4. "b" IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER PARALLEL TO PRIMARY DATUM -C5. DIMENSION "aaa" IS MEASURED PARALLEL TO PRIMARY DATUM -C6. PRIMARY DATUM -C- AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 7. PACKAGE SURFACE SHALL BE BLACK OXIDE 8. CAVITY DEPTH VARIOUS WITH THICKNESS 9. SUBSTRATE MATERIAL BASE IS COPPER 10. BILATERAL TOLERANCE ZONE IS APPLIED TO EACH SIDE OF PACKAGE BODY 11. 45DEG. 0.5MM CHAMFER CORNER AND WHITE DOT FOR PIN IDENTIFICATION c A1 A ccc C P -C5 aaa C 6 Packaging Development Department TBGA 192 - 21*21mm -Outline Drawing DETAIL A AT84AS001 9 6. Ordering Information Part Number AT84XAS001TP AT84AS001CTPY Package TBGA 192 EBGA 192 Temperature Range Ambient RoHS compliant Commercial C grade 0C < Tamb < 70C RoHS compliant Industrial V grade -40C < Tamb < 85C Ambient Screening Level Prototype Standard Comments For availability please contact your local Atmel sales office For availability please contact your local Atmel sales office Evaluation board AT84AS001VTPY AT84AS001TP-EB EBGA 192 TBGA 192 Standard Prototype T 10 5412BS-BDC-04/06 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL'S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL'S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel's products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. (c) 2006 Atmel Corporation. All rights reserved. Atmel (R), logo and combinations thereof, Everywhere You Are (R) and others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. 5412BS-BDC-04/06 |
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