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 STS5PF20V
P-CHANNEL 20V - 0.065 - 5A SO-8 2.5V-DRIVE STripFETTM II POWER MOSFET
TYPE STS5PF20V
s s s s
VDSS 20 V
RDS(on) < 0.080 (@4.5V) < 0.10 (@2.5V)
ID 5A
TYPICAL RDS(on) = 0.065 (@4.5V) TYPICAL RDS(on) = 0.085 (@2.5V) ULTRA LOW THRESHOLD GATE DRIVE (2.5V) STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY
SO-8
DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely extremely low on-resistance when driven at 2.5V.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s POWER MANAGEMENT IN CELLULAR PHONES s DC-DC CONVERTERS s BATTERY MANAGEMENT IN NOMADIC EQUIPMENT
ORDER CODES
PART NUMBER STS5PF20V MARKING S5PF20V PACKAGE SO-8 PACKAGING TAPE & REEL
March 2004
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ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Value 20 20 8 5 3.1 20 2.5 Unit V V V A A A W
( ) Pulse width limited by safe operating area
Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed
THERMAL DATA
Rthj-amb Tj Tstg Thermal Resistance Junction-ambient Max Max. Operating Junction Temperature Storage Temperature 50 -55 to 150 -55 to 150 C/W C C
ELECTRICAL CHARACTERISTICS (TJ = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 8V Min. 20 1 10 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 4.5V, ID = 2.5 A VGS = 2.5V, ID = 2.5 A Min. 0.45 0.065 0.085 0.080 0.10 Typ. Max. Unit V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V , ID = 2.5 A VDS = 15 V, f = 1 MHz, VGS = 0 Min. Typ. 6.6 412 179 42.5 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 10 V, ID = 2.5 A RG = 4.7 VGS = 2.5 V (see test circuit, Figure 1) VDD = 10 V, ID = 5 A, VGS = 2.5V (see test circuit, Figure 2) Min. Typ. 11 47 4.5 0.73 1.75 6 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions VDD = 10 V, ID = 2.5 A, RG = 4.7, VGS = 2.5 V (see test circuit, Figure 1) Min. Typ. 39 20 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 5 A, VGS = 0 ISD = 5 A, di/dt = 100A/s, VDD = 16 V, Tj = 150C (see test circuit, Figure 3) 32 12.8 0.8 Test Conditions Min. Typ. Max. 5 20 1.2 Unit A A V ns nC A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
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Safe Operating Area Thermal Impedence
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
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Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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Fig. 1: Switching Times Test Circuit For Resistive Load Fig. 2: Gate Charge test Circuit
Fig. 3: Test Circuit For Diode Recovery Behaviour
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SO-8 MECHANICAL DATA
DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
0016023
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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