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 ML1565
ML1565
Step-Up-Down DC-DC Converts
Digital Still camera Power Supply High-Efficiency, 5-channel
General Description
The ML1565 provides a complete power-supply solution for digital still and video cameras through the integration of ultra-high-efficiency step-up/step-down DC-to-DC converters along with three auxiliary step-up controllers. The ML1565 is targeted for applications that use either 2 or 3 alkaline or NiMH batteries as well as those using a single lithium-ion (Li+) battery. The step-up DC-to-DC converter accepts inputs from 0.7V to 5.5V and regulates a resistor-adjustable output from 2.7V to 5.5V. It uses internal MOSFETs to achieve 95% efficiency. Adjustable operating frequency facilitates design for optimum size, cost, and efficiency. The step-down DC-to-DC converter can produce output voltages as low as 1.25V and also utilizes internal MOSFETs to achieve 95% efficiency. An internal softstart ramp minimizes surge current form the battery. The converter can operate from the step-up output providing buck-boost capability with up to 90% compound efficiency, or it can run directly from the battery if buck-boost operation is not needed. The ML1565 features auxiliary step-up controllers that power CCD, LCD, motor actuator, and backlight circuits. The ML1565 is available in a space-saving QFN-32 thin package.
Features
Step-up DC-to-DC Converter: 95% Efficient 3.3V (Fixed) or 2.7V to 5.5V (Adjustable) Output Voltage Step-Down DC-to-DC Converter: Operate form Battery for 95% Efficient Buck Combine with Step-Up for 90% Efficient Buck-Boost Adjustable Output Down to 1.25V Three Auxiliary PWM Controllers Up to 1MHz Operating Frequency 1A Shutdown Mode Internal Soft-Start control Overload Protection Compact 32-Pin, 5mmx5mm Thin QFN Package
Ordering Information
Item ML1565QFNG Package Mark QFN-32 ML1565 Shipping 160pcs/ Tray
Applications
Digital Still Cameras Digital video Cameras PDAs
Pin Configuration Typical operating Circuit
ML1565
ML1565
--
P1/21
Rev. C, Sep 2005
ML1565
Function Diagram
Absolute Maximum Ratings (VOUTSU=3.3V, TA=0
Parameter OUTSU_, INSD, SDOK, ON_, FB_, FBSEL_ to GND PGND to GND DL_ to PGND LXSU Current(Note 1) LXSU Current(Note 1) REF, OSC, COMP_ to GND Continuous Power Dissipation(TA = +70) 32-Pin Thin QFN (derate 22mW/above +70) Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (soldering, 10s) Ratings
to + 85unless otherwise noted.)
Unit V V V A A V mW
-0.3V to +6V -0.3V to +0.3V -0.3V to OUTSU + 0.3V 3.6A 2.25A -0.3V to OUTSU + 0.3V 1700mW -40to + 85 +150 -65 to + 150 +300
Note 1: LXSU has internal clamp diodes to OUTSU and PGND, and LXSD has internal clamp diodes to INSD and PGND. Applications that forward bias these diodes should take care not to exceed the devices power dissipation limits.
P2/21
Rev. C, Sep 2005
ML1565
Electrical Characteristics (VOUTSU = 3.3V, TA = 0
General Parameter Input Voltage Range Minimum Startup Voltage Overload Protection Fault Interval Thermal Shutdown Thermal Shutdown Hysteresis Shutdown Supply Current into OUTSU Step-Up DC-to-DC Supply Current into OUTSU Step-Up Plus 1 AUX Supply Current into OUTSU Step-Up Plus Step-Down Supply Current into OUTSU Reference Output Voltage Reference Load Regulation Reference Line Regulation OSC Discharge Trip Level OSC Discharge Resistance OSC Discharge Pulse Width OSC Frequency Condition
to +85,unless otherwise noted.)
Min 0.7
Typ.
Max 5.5
Unit V V OSC cycles
(Note 2) ILOAD <1mA, TA = +25 startup voltage tempco is -2300ppm/ (typ) (Note 3)
0.9 100k 160 20
1.1
ONSU=ONSD=ON1=ON2=ON3=0; OUTSU=3.6V ONSU=3.35V, FBSU=1.5V (does not include switching losses) ONSU=ON_=3.35V, FBSU=1.5V, FB_=1.5V (does not include switching losses) ONSU=ONSD=3.35V, FBSU=1.5V, FBSD=1.5V (does not include switching losses) IREF = 20A 10A<1REF<200A 2.70.1 290 420 470 1.23 1.25 4.5 1.3 1.25 52 300 400
5 400 600 650 1.27 10 5 1.275 80
A A A A V mV mV V ns kHz
1.225
Step-Down DC-DC Converter Parameter FBSD Regulation Voltage OUTSD Regulation Voltage FBSD to COMPSD Transconductance FBSD Input Leakage current Burst Mode Trip Level Current-Sense Amplifier Transresistance LXSD Leakage Current Switch On-Resistance P-channel Current Limit N-channel Turn-off Current Soft-Start Interval SDOK Output Low Voltage SDOK Operating Voltage Range FBSD = 0.4V; 0.1mA into SDOK pin 1.0 Condition FBSELSD = GND FBSD = COMPSD FBSD = 1.25V (Note 6) Min 1.231 1.48 80 -100 110 Typ. 1.25 1.5 135 +1 160 0.60 XLXSD = 5.5V, OUTSU = 5.5V VLXSD = 0V, OUTSU = 5.5V N-channel P-channel 0.7 0.01 0.01 95 150 0.79 20 4096 0.002 0.1 5.5 20 20 150 250 1.0 Max 1.269 1.52 185 +100 190 Unit V V S nA mA V/A A m A mA OSC cycles V V
P3/21
Rev. C, Sep 2005
ML1565
Step-Up DC-DC Converter Parameter Step-Up Startup-to-Normal Operating Threshold Step-Up Startup-to-Normal Operating Threshold Hysteresis Step-Up Voltage Adjust Range FBSU Regulation Voltage OUTSU Regulation Voltage FBSU to COMPSU Tranconductance FBSU Input Leakage Current Burst Mode Trip Level Current-Sense Amplifier Transresistance Step-Up Maximum Duty Cycle OUTSU Leakage Current LXSU Leakage Current Switch On-Resistance N-Channel Current limit P-Channel Turn-Off Current Startup Current Limit Startup tOFF Startup Frequency Condition Rising or falling edge (Note 4) Min 2.30 Typ. 2.5 80 2.7 1.231 3.296 80 -100 150 5.5 1.269 3.404 185 +100 265 Max 2.60 Unit V mV V V V S nA mA V/A 90 20 20 150 250 2.4 % A A m A mA mA ns kHz
FBSELSU = GND FBSU = COMPSU FBSU = 1.25V (Note 6)
1.25 3.35 135 +1 200 0.3
FBSU = 1V VLXSD = 0V, OUTSU = 5.5V VLXSU = VOUT = 5.5V N-channel P-channel
80
1.6 OUTSU = 1.8V (Note 5) OUTSU = 1.8V OUTSU = 1.8V
85 0.01 0.01 95 150 2 20 800 700 200
Auxiliary DC-DC Controllers (Aux 1, 2, and 3) Parameter Maximum Duty Cycle FB_ Regulation Voltage FB_ to COMP_ Transconductance FB_ Input Leakage Current AUX1 Output Regulation Voltage DL_ Driver Resistance DL_ Drive Current Soft-Start Interval Logic Inputs (ON_, FBSEL_) Parameter Input Low Level Condition 1.1V < OUTSU < 1.8V (ONSU only) 1.8V < OUTSU < 5.5V 1.1 < OUTSU < 1.8V (ONSU only) 1.8 < OUTSU < 5.5V FBSEL = 3.6V, OUTSU = 3.6V FBSEL = GND, OUTSU = 3.6V ON_ = 3.35V VOUTSU -0.2 1.6 -100 -100 Min Typ. Max 0.2 0.4 Unit V Condition FB_ = 1V FB_ = COMP_ FB_ = COMP_ FB_ = 1.25V FBSEL1 = GND. FB1 connected to AUX1 output Output high Output low Sourcing or sinking Min 80 1.231 80 -100 4.93 Typ. 85 1.25 135 +1 5 3 2 0.5 4096 Max 90 1.269 185 +100 5.07 10 5 Unit % V S nA V A OSC cycle
Input High Level
V 0 0 330 +100 +100
FBSEL_ Input Leakage Current ON_ Impedance to GND
nA k
P4/21
Rev. C, Sep 2005
ML1565
Electrical Characteristics (VOUTSU = 3.3V, TA = -40, to + 85 unless otherwise specified)
General Parameter Input Voltage Range Minimum Startup Voltage Shutdown Supply current into OUTSU Step-Up DC-to-DC Supply Current into OUTSU Step-Up Plus 1AUX Supply Current into OUTSU Step-Up Plus Step-Down Supply Current into OUTSU Reference Output Voltage Reference Load Regulation Reference Line Regulation OSC Discharge Trip Level OSC Discharge Resistance Condition (Note 2) ILOAD < ImA, TA = +25 startup voltage tempco is -2300ppm/ (typ) (Note 3) ONSU=ONSD=ON1=ON2=ON3=0; OUTSU=3.6V ONSU=3.35V, FBSU=1.5V (does not include switching losses) ONSU=ON_=3.35V, FBSU=1.5V, FB_=1.5V (does not include switching losses) ONSU=ONSD=3.35V, FBSU=1.5V, FBSD=1.5V (does not include switching losses) IREF = 20A 10A1.225
Step-Down DC-DC Converter Parameter FBSD Regulation Voltage OUTSD Regulation Voltage FBSD to COMPSD Transconductance FBSD Input Leakage Current Burst Mode Trip Level LXSD Leakage Current Switch On-Resistance P-Channel Current Limit SDOK Output Low Voltage SDOK Operating Voltage Range Condition FBSELSD = GND FBSD = COMPSD FBSD = 1.25V (Note 6) VLXSD = 5.5V, OUTSU = 5.5V VLXSD = 0V, OUTSU = 5.5V N-channel P-channel FBSD = 0.4V; 0.1mA into SDOK pin 1.0 Min 1.225 1.47 80 -100 110 Typ. Max 1.275 1.53 185 +100 195 20 20 150 250 1.0 0.1 5.5 Unit V V S nA mA A A m m A V V
0.7
P5/21
Rev. C, Sep 2005
ML1565
Step-Up DC-DC Converter Parameter Step-Up Startup-to-Normal Operating Threshold Step-Up Voltage Adjust Range FBSU Regulation Voltage OUTSU Regulation Voltage FBSU to COMPSU Transconductance FBSU Input Leakage Current Burst Mode Trip Level Step-Up Maximum Duty Cycle OUTSU Leakage Current LXSU Leakage Current Switch On-Resistance N-Channel Current limit Auxiliary DC-DC Controllers (Aux 1, 2, and 3) Parameter Maximum Duty Cycle FB_ Regulation Voltage FB_ to COMP_ Transconductance FB_ Input Leakage Current AUX1 Output Regulation Voltage DL_ Driver Resistance Condition FB_ = 1V FB_ = COMP_ FB_ = COMP_ FB_ = 1.25V
FBSEL1 = GND. FB1 connected directly to AUX1 output
Condition Rising or falling edge (Note 4)
Min 2.30 2.7 1.225 3.283 80 -100 150 80
Typ.
Max 2.60 5.5 1.275 3.417 185 +100 275 90 20 20 150 250 2.4
Unit V V V V S nA mA % A A m A
FBSELSU = GND FBSU = COMPSU FBSU = 1.25V (Note 6) FBSU = 1V VLX = 0V, OUTSU = 5.5V VLXSU = VOUT = 5.5V N-channel P-channel
1.6
Min 80 1.225 80 -100 4.90
Typ.
Max 90 1.275 185 +100 5.10 10 5
Unit % V S nA V
Output high Output low
Logic Inputs (ON_, FBSEL) Parameter Input Low Level Condition 1.1V < OUTSU < 1.8V (ONSU only) 1.8V < OUTSU < 5.5V 1.1V < OUTSU < 1.8V (ONSU only) VOUTSU -0.2 1.6 -100 -100 Min Typ. Max 0.2 0.4 Unit V
V 1.8V < OUTSU < 5.5V FBSEL = 3.6V, OUTSU = 3.6V +100 FBSEL_ Input Leakage Current nA FBSEL = GND, OUTSU = 3.6V +100 Note 2: The IC is powered from the OUTSU output. Note 3: Since the part is powered from OUTSU, a Schottky rectifier, connected from the input battery to OUTSU, is required for low-voltage startup. Note 4: The step-up regulator operates in startup mode until this voltage is reached. Do not apply full load current during startup. Note 5: The step-up current limit in startup refers to the LXSU switch current limit, not an output current limit. Note 6: The burst mode current threshold is the transition point between fixed-frequency PWM operation and burst mode operation (where switching rate varies with load). The spec is given in terms of inductor current. In terms of output current, the burst mode transition varies with input/output voltage ratio and inductor value. For step-up, the transition output current is approximately 1/3 the inductor current when stepping from 2V to 3.3V. For step-down, the transition current in terms of output current is approximately 3/4 the inductor current when stepping down from 3.3V to 1.8V.
Input High Level
P6/21
Rev. C, Sep 2005
ML1565
Pin Description
Pin1 Pin2 COMP1 FB1 Auxiliary Controller 1 Compensation Node. Connect a series RC from COMP1 To GND to compensate the control loop. COMP1 is actively driven to GND in shutdown and thermal limit. Auxiliary Controller 1 Feedback Input. For 5V output, short FBSEL1 to GND and connect FB1 to the output voltage. For other output voltages, connect FBSEL1 to OUTSU and connect a resistive voltage divider from the step-up converter output to FB1 to GND. The FB1 feedback threshold is then 1.25V. This pin is high impedance in shutdown. Power Ground. Connect PGNDA and PGNDB together and to GND with short trace as close to the IC as possible. Step-Down Converter Power-Switching Node. Connect LXSD to the step-down converter inductor. LXSD is the drain of the P-channel switch and N-channel synchronous rectifier. LXSD is high impedance in shutdown. Step-Down Converter Input. INSD can connect to OUTSU, effectively making OUTSD a buck-boost output from the battery. Bypass to GND with a 1F ceramic capacitor if connected to OUTSU. INSD may also be connected to the battery, but should not exceed OUTSU by more than a Schottky diode forward voltage. Bypass INSD with a 10F ceramic capacitor when connecting to the battery input. A 10k internal resistance connects OUTSU and INSD. Step-Down Converter On/Off Control Input. Drive ONSD high to turn on the step-down converter. This pin has an internal 330k pulldown resistor. ONSD does not start until OUTSU is in regulation. Step-Down Converter Compensation Node. Connect a series RC from COMPSD to GND to compensate the control loop. COMPSD is pulled to GND in normal shutdown and during thermal shutdown (see the Step-Down Compensation section). Step-Down Converter Feedback Input. For a 1.5V output, short FBSELSD to GND and connect FBSD to OUTSD. For other voltages, short FBSELSD to OUTSU and connect a resistive voltage-divider from OUTSD to FBSD to GND. The FBSD feedback threshold is 1.25V. This pin is high impedance in shutdown. Auxiliary Controller 1 On/Off control Input Drive ON1 high to turn on. This pin has an internal 330k pulldown resistor. ON1 cannot start until OUTSU is in regulation. Auxiliary Controller 2 On/Off control Input Drive ON2 high to turn on. This pin has an internal 330k pulldown resistor. ON2 cannot start until OUTSU is in regulation. Auxiliary Controller 3 On/Off control Input Drive ON3 high to turn on. This pin has an internal 330k pulldown resistor. ON3 cannot start until OUTSU is in regulation. Step-up Converter On/Off Control. Drive ONSU high to turn on the step-up converter. All other control pins are locked out until 2ms after the step-up output has reached its final value. This pin has an internal 330k resistance to GND. Reference Output. Bypass REF to GND with a 0.1F or greater capacitor. The maximum allowed load on REF is 200A. REF is actively pulled to GND when all converters are shut down. Step-Up Converter Feedback Input. To regulate OUTSU to 3.35V, connect FBSELSU to GND. FBSU may be connected to OUTSU or GND. For other output voltages, connect FBSELSU to OUTSU and connect a resistive voltage-divider from OUTSU to FBSU to GND. The FBSU feedback threshold is 1.25V. This pin is high impedance in shutdown. Step-Up Converter Compensation Node. Connect a series RC from COMPSU to GND to compensate the control loop. COMPSD is pulled to GND in normal shutdown and during thermal shutdown (see the Step-Down Compensation section).
Pin3 Pin4
PGNDA LXSD
Pin5
INSD
Pin6 Pin7
ONSD COMPSD
Pin8
FBSD
Pin9 Pin10 Pin11 Pin12
ON1 ON2 ON3 ONSU
Pin13
REF
Pin14 FBSU
Pin15
COMPSU
P7/21
Rev. C, Sep 2005
ML1565
Pin Description
Pin16 FBSELSU Step-Up Feedback Select Pin. With FBSELSD = GND, OUTSU regulates to 3.35V. With FBSELSD = OUTSU, FBSU regulates to a 1.25V threshold for use with external feedback resistors. This pin is high impedance in shutdown. Step-Down Feedback Select Pin. With FBSELSD = GND, FBSD regulates to 1.5V. With FBSELSD = OUTSU, FBSD regulates to a 1.25V for use with external feedback resistors. This pin is high impedance in shutdown. Auxiliary Controller 1 Feedback Select Pin. With FBSEL1 = GND and FB1 regulates to 5V. With FBSEL1=OUTSU, FB1 regulates to 1.25V for use with external feedback resistors. This pin is high impedance in shutdown. Oscillator Control. Connect a timing capacitor from OSC to GND and a timing resistor from OSC to OUTSU to set the oscillator frequency between 100kHz and 1MHz. This pin is high impedance in shutdown. Power Ground. Connect PGNDA and PGNDB together and to GND with short trace as close to the IC as possible. Step-Up Converter Power-Switching Node. Connect LXSU to the step-up converter inductor. LXSU is high impedance in shutdown. Step-Up Converter Output. OUTSUA is the power output of the step-up converter. Connect OUTSUA to OUTSUB at the IC. This open-drain output goes high impedance when the step-down has successfully completed soft-start. Auxiliary Controller 3 Compensation Node. Connect a series resistor-capacitor form COMP3 to GND to compensate the control loop. COMP3 is actively driven to GND in shutdown and thermal limit. Auxiliary Controller 3 Feedback Input. Connect a resistive voltage-divider from the output voltage to FB3 to GND. The FB3 feedback threshold is 1.25V. This pin is high impedance in shutdown. Step-Up Converter Output. OUTSUB powers the ML1565 and is the sense input when FBSELSU is GND and the output is 3.3V. Connect OUTSUA to OUTSUB. Auxiliary Controller 3 Gate-Drive Output. Connect the gate of an N-channel MOSFET to DL3. DL3 swings from GND to OUTSU and supplies up to 500mA. DL3 is driven to GND in shutdown and thermal limit. Auxiliary Controller 2 Gate-Drive Output. Connect the gate of an N-channel MOSFET to DL2. DL2 swings from GND to OUTSU and supplies up to 500mA. DL2 is driven to GND in shutdown and thermal limit. Auxiliary Controller 1 Gate-Drive Output. Connect the gate of an N-channel MOSFET to DL1. DL1 swings from GND to OUTSU and supplies up to 500mA. DL1 is driven to GND in shutdown and thermal limit. Quiet Ground. Connect GND to PGND as close to the IC as possible. Auxiliary Controller 2 compensation Node. Connect a series resistor-capacitor from COMP2 to GND to compensate the control loop. COMP2 is actively driven to GND in shutdown and thermal limit. Auxiliary Controller 2 Feedback Input. Connect a resistive voltage-divider form the output voltage to FB2 to GND to set the output voltage. The FB2 feedback threshold is 1.25V. This pin is high impedance in shutdown. Exposed Underside Metal Pad. This pad must be soldered to the PC board to achieve package thermal and mechanical ratings. The exposed pad is electrically connected to GND.
Pin17 FBSELSD
Pin18 FBSEL1
Pin19
OSC
Pin20 PGNDB Pin21 LXSU Pin22 OUTSUA
Pin23 SDOK Pin24 COMP3
Pin25 FB3 Pin26 Pin27 OUTSUB DL3
Pin28
DL2
Pin29
DL1
Pin30 Pin31
GND COMP2
Pin32 FB2
Exposed EP Pad
P8/21
Rev. C, Sep 2005
ML1565
Typical Application Circuit
ML1565
P9/21
Rev. C, Sep 2005
ML1565 Detailed Description (1)
The ML1565 is a complete digital still camera power conversion IC. It can accept input from a variety of sources including single-cell Li+ batteries, 2-cell alkaline or NiMH batteries, as well as systems designed to accept both battery types. The ML1565 includes five DC-to-DC converter channels to generate all required voltages. 1) Synchronous rectified step-up DC-to-DC converter with on-chip MOSFETs--This typically supplies 3.3V for main system power. 2) Synchronous rectified step-down DC-to-DC converter with on-chip MOSFETs ---Powering the stepdown from the step-up output provides efficient (up to 90%) buck-boost functionality that supplies a regulated output when the battery voltage is above or below the output voltage. The step-down can also be powered from the battery. 3) Auxiliary DC-to-DC Controller 1 -- Typically used for 5V output for motor, strobe, or other functions as required. 4) Auxiliary DC-to-DC Controller 2--Typically supplies LCD bias voltages with either a multi-output flyback transformer, or boost converter with charge pump inverter. Alternately may power white LEDs for LCD backlighting. 5) Auxiliary DC-to-DC Controller 3 Typically supplies CCD bias voltages with either a multi-output flyback transformer, or boost converter with charge pump inverter. All ML1565 DC-to-DC converter channels employ fixed frequency PWM operation. In addition to multiple DC-to-DC channels, the ML1565 also includes overload protection, soft-start circuitry, adjustable PWM operating frequency, and a power-OK(POK) output to signal when the step-down converter output voltage (for CPU core) is in regulation. Step-up DC-to-DC Converter The step-up DC-to-DC converter channel generates a 2.7V to 5.5V output voltage range from a 0.9V to 5.5V battery input voltage. An internal switch and synchronous rectifier allow conversion efficiencies as high as 95% while reducing both circuit size and the number of external components. Under moderate to heavy loading, The converter operates in a low-noise PWM mode with constant frequency. Switching harmonics generated by fixed-frequency operation are consistent and easily filtered. The step-up is a current-mode PWM. An error signal (at COMPSU) represents the difference between the feedback voltage and the reference. The error signal programs the inductor current to regulate the output voltage. At light loads (under 75mA when boosting from 2V to 3.3V), efficiency is enhanced by burst mode in which switching occurs only as needed to service the load. In this mode, the inductor current peak is limited to typically 200mA for each pulse. Step-Down DC-to-DC Converter The step-down DC-to-DC converter channel is optimized for generating output voltages down to 1.25V. Lower output voltages can be set by adding an additional resistor (see the Applications Information section). An internal switch and synchronous rectifier allow conversion efficiencies as high as 95% while reducing both circuit size and the number of external components. Under moderate to heavy loading, the converter operates in a low-noise PWM mode with constant frequency. Switching harmonics generated by fixed-frequency, operation are consistent and easily filtered. The step-down is a current-mode PWM. An error signal (at COMPSD) represents the difference between the feedback voltage and the reference. The error signal programs the inductor current to regulate the output voltage. At light loads (under 120 mA), efficiency is enhanced by burst mode in which switching occurs only as needed to service the load. In this mode, the inductor current peak is limited to 150mA (typ) for each pulse. The step-down remains inactive until the step-up DC-to-DC is in regulation. This means that the step-down DC-to-DC on/off pin (ONSD) is overridden by ONSU. The soft-start sequence for the step-down begins 1024 OSC cycles after the step-up output is in regulation. If the step-up, step-down, or any of the auxiliary controllers remains faulted for 200ms, all channels turn off. The step-down also features and open-drain SDOK output that goes low when the output is in regulation.
P10/21
Rev. C, Sep 2005
ML1565
Detailed Description (2)
Buck-Boost Operation The step-down input can be powered from the output of the step-up. By cascading these two channels, the step-down output can maintain regulation even as the battery voltage falls below the step-down output voltage. This is especially useful when trying to generate 3.3V from 1-cell Li+ inputs, or 2.5V from 2-cell alkaline or NiMH inputs, or when designing a power supply that must operate from both Li+ and alkaline/NiMH inputs. Compound efficiencies of up to 90% can be achieved when the step-up and step-down are operated in series. Note that the step-up output supplies both the step-up load and the step-down input current when the step-down is powered from the step-up. The step-down input current reduces the available step up output current for other loads. Direct Battery Step-down Operation The step-down converter can also be operated directly from the battery as long as the voltage at INSD does not exceed OUTSU by more than a Schottky diode forward voltage. When using this connection, connect a Schottky diode from the battery input to OUTSU to INSD, which adds a small additional current drain (of approximately (VOUTSU - VINSD) / 10k from OUTSU when INSD is not connected directly to OUTSU. Step-down direct battery operation improves efficiency for the step-down output (up to 95%), but limits the upper limit of the output voltage to 200mV less than the minimum battery voltage. In 1-cell Li+ designs (with a 2.7V min), the output can be set up to 2.5V. In 2-cell alkaline or NiMH designs, the output may be limited to 1.5V or 1.8V, depending on the minimum allowed cell voltage. The step-down can only be briefly operated in dropout since the ML1565 fault protection detects the out-of-regulation condition and activates after 100,000 OSC cycles, or 200ms at 500kHz. At that point, all ML1565 channels shut down. Auxiliary DC-to-DC Controllers The three auxiliary controllers operate as fixed-frequency voltage-mode PWM controllers. They do not have internal MOSFETs, so output power is determined by external components. The controllers regulate output voltage by modulating the pulse width of the DL_ drive signal to an external N-channel MOSFET switch. Figure 3 shows a functional diagram of an AUX controller channel. A sawtooth oscillator signal at OSC governs timing. At the start of each cycle, DL_ goes high, turning on the external N-FET switch. The switch then turns off when the internally level-shifted sawtooth rises above COMP_ or when the maximum duty cycle is exceeded. The switch remains off until the start of the next cycle. A transconductance error amplifier forms an integrator at COMP_ so that DC high-loop gain and accuracy can be maintained. The auxiliary controllers do not start until the step-up DC-to-DC output is in regulation. If the step-up, step-down or any of the auxiliary controllers remains faulted for 100,000 OSC cycles, the all ML1565 channels latch off.
P11/21
Rev. C, Sep 2005
ML1565
Detailed Description (3)
Maximum Duty Cycle The ML1565 auxiliary PWM controllers have a guaranteed maximum duty cycle of 80%. That is to say that all controllers can achieve at least 80% and typically reach 85%. In boost designs that employ continuous current, the maximum duty cycle limits the boost ratio such that: 1-VIN / VOUT 80% With discontinuous inductor current, no such limit exists for the input/output ratio since the inductor has time to fully discharge before the next cycle begins. Fault Protection The ML1565 has robust fault and overload protection. After power-up, the device is set to detect an out-of regulation state that could be caused by an overload or short, If any DC-to-DC converter channel (step-up. Step-down, or any of the auxiliary controllers) remains faulted for 100,000 clock cycles, then ALL outputs latch off until the step-up DC-to-DC converter is reinitialized by the ONSU pin, or by cycling of input power. The fault-detection circuitry for any channel is disabled during its initial turn-on soft-start sequence. Note that output of the step-up, or that of any auxiliary channel set up in boost configuration, does not fall to 0V during shutdown or fault. This is due to the current path from the battery to the output that remains even when the channel is off. This path exists through the boost inductor and the synchronous rectifier body diode. An auxiliary boost channel falls to the input voltage minus the rectifier drop during fault and shutdown. OUTSU falls to the input voltage minus the synchronous rectifier body diode drop during shutdown, and also during fault if the input voltage exceeds 2.5V. If the input voltage is less than 2.5V, OUTSU remains at 2.5V due to operation of the startup oscillator, but can source only limited current. Reference The ML1565 has internal 1.250V reference. Connect a 0.1F ceramic bypass capacitor from REF to GND within 0.2in (5mm) of the REF pin. REF can source up to 200A and is enabled whenever ONSD is high and OUTSD is above 2.5V. If the application requires that REF be loaded beyond 200A, it may be buffered with a unity-gain amplifier or op amp. Oscillator All ML1565 DC-to-DC converter channels employ fixed frequency PWM operation. The operating frequency is set by an RC network at the OSC pin, The range of usable setting is 100kHz to 1MHz. The oscillator uses a comparator, a 300ns one-shot, and an internal N-FET switch in conjunction with an external timing resistor and capacitor (Figure 4). When the switch is open, the capacitor voltage exponentially approaches the step-up output voltage from zero with a time constant given by the Rosc Cosc product. The comparator output switches high when the capacitor voltage reaches VREF(1.25V). In turn, the one-shot activates the internal MOSFET switch to discharge the capacitor within a 300ns interval, and the cycle repeats. Note that the oscillation frequency changes as the main output voltage ramps upward following startup. The oscillation frequency is constant once the main output is in regulation.
ML1565
Figure 4 Master Oscillator
P12/21
Rev. C, Sep 2005
ML1565
Detailed Description (4)
Low-Voltage Startup Oscillator The ML1565 internal control and reference-voltage circuitry receive power from OUTSU and do not function when OUTSU is less than 2.5V. To ensure low-voltage startup, the step-up employs a low-voltage startup oscillator that activates at 0.9V. The startup oscillator drives the internal N-channel MOSTFET at LXSU until OUTSU reaches 2.5V, at which point voltage control is passed to the current-mode PWM circuitry. Once in regulation, the ML1565 operates with inputs as low as 0.7V since internal power for the IC is supplied by OUTSU. At low input voltages, the ML1565 can have difficulty starting into heavy loads. Soft-Start The ML1565 step-down and AUX_ channels feature a soft-start function that limits inrush current and prevents excessive battery loading at startup by ramping the output voltage to the regulation voltage. This is achieved by increasing the internal reference inputs to the controller transconductance amplifiers from 0V to the 1.25V reference voltage over 4096 oscillator cycles (8ms at 500kHz) when initial power is applied or when a channel is enabled. Soft-start is not included in the step-up converter in order to avoid limiting startup capability with loading. Shutdown The step-up converter is activated with a high input at ONSU. The step-down and auxiliary DC-to-DC converters1, 2, and 3 activate with a high input at ONSD, ON1, ON2, and ON3, respectively. The auxiliary controllers and step-down cannot be activated until OUTSU is in regulation. For automatic startup, connect ON_ to OUTSU or a logic level greater than 1.6V.
Design Procedure (1)
Setting the Switching Frequency Choose a switching frequency to optimize external component size or circuit efficiency for any particular ML1565 application. Typically, switching frequencies between 300kHz and 600kHz offer a good balance between component size and circuit efficiency. Higher frequencies generally allow smaller components and lower frequencies give better conversion efficiency. The switching frequency is set with an external timing resistor (Rosc) and capacitor (Cosc). At the beginning of a cycle, the timing capacitor charges thought the resistor until it reaches VREF. The charge time, t1, is: t1 = -Rosc Cosc In [ 1 - 1.25 / VOUTSU ] Table 1. Voltage Setting Summary Channel FB THRESHOLD FB THRESHOLD FB_ (FBSEL_LOW) (FBSEL_HIGH) FBSU 3.35V 1.25V FBSD 1.5V FB1 5V Always 1.25V FB2 (FBSEL is not provided for these FB2 channels) The capacitor voltage is then given time (t2 = 300ns) to discharge. The oscillator frequency is fOSC = 1 / (t1 + t2) fOSC can operate from 100kHz to 1MHz. Choose Cosc between 47pF and 470pF. Determine Rosc from the equation: Rosc = (300ns - 1 / fOSC) / ( Cosc In [ 1-1.25/VOUTSU] ) See the Typical operating Characteristics for fOSC versus ROSC using different values of COSC.
P13/21
Rev. C, Sep 2005
ML1565
Design Procedure (2)
Setting Output voltages The ML1565 step-up / step-down converters and the AUX1 controllers have both factory-set and adjustable output voltages. These are selected by FBSEL_ for the appropriate channel. When FBSEL_ is low, the channel output regulates at its preset voltage. When FBSEL_ is high, the channel regulates FB_ at 1.25V for use with external feedback resistors. When setting the voltage for auxiliary channels 2 and 3, or when using external feedback at FBSU, FBSD, or FB1, connect a resistive voltage-divider from the output voltage to the corresponding FB_ input. The FB_ input bias current is less than 100nA, so choose the low-side (FB_-to-GND) resistor (RL), to be 100k or less. Then calculate the high-side (output-to-FB_) resistor (RH) using: RH = RL [ (VOUT / 1.25) -1 ] General Filter Capacitor Selection The input capacitor in DC-to-DC converter reduces current peaks drawn from the battery, or other input power source, and reduces switching noise in the controller. The impedance of the input capacitor at the switching frequency should be less than that of the input source so that high-frequency switching currents do not pass through the input source. The output capacitor keeps output ripple small and ensure control-loop stability. The output capacitor must also have low impedance at the switching frequency. Ceramic, polymer, and tantalum capacitors are suitable, with ceramic exhibiting the lowest ESR and high-frequency impedance. Output ripple with a ceramic output capacitor is approximately: VRIPPLE = IL( PEAK ) [ 1 / (2fOSCCOUT) ] If the capacitor has significant ESR, the output ripple component due to capacitor ESR is: VRIPPLE = IL( PEAK ) ESR Output capacitor specifics are also discussed in the Step-Up Compensation section and the Step-Down Compensation section. Step-Up Component Selection The external components required for the step-up are an inductor, input and output filter capacitor, and compensation RC. Typically, the inductor is selected to operate with continuous current for best efficiency. An exception might be if the step-up ratio, (VOUT / VIN ), is greater than 1/(1 - DMAX), where DMAX is the maximum PWM duty factor of 80%. When using the step-up channel to boost from a low input voltage, loaded startup is aided by connecting a Schottky diode from the battery to OUTSU. See the Minimum Startup Voltage vs. Load Current graph in the Typical Operating characteristics. Step-Up Inductor
In most step-up designs, a reasonable inductor value (LIDEAL) can be derived from the following equation. Which sets continuous peak-to-peak inductor current at one-half the DC inductor current: LIDEAL = [ 2 VIN(MAX) D (1-D) ] / (IOUT fOSC) where D is the duty factor given by: D = 1 - ( VIN / VOUT ) Given LIDEAL , the consistent peak-to peak inductor current is 0.5IOUT / (1-D).The peak inductor current, IIND(PK)=1.25IOUT / (1-D). Inductance values smaller than LIDEAL can be used to reduce inductor size. However, if much smaller values are used, the inductor current rises and a larger output capacitance may be required to suppress output ripple.
P14/21
Rev. C, Sep 2005
ML1565
Design Procedure (3)
Step-Up Component Selection Step-Up compensation The inductor and output capacitor are usually chosen first in consideration of performance, size, and cost. The compensation resistor and capacitor are then chosen to optimize control-loop stability. In some cases it may help to readjust the inductor or output capacitor value to get optimum results. For typical designs, the component values in the circuit of Figure 1 yield good results. The step-up converter employs current-mode control, thereby simplifying the control-loop compensation. When the converter operates with continuous inductor current (typically the case), a right-half-plane zero (RHPZ) appears in the loop-gain frequency response. To ensure stability, the control-loop gain should crossover (drop below unity gain) at a frequency (fC) much less than that of the right-half-plane zero. The relevant characteristics for step-up channel compensation are: 1) Transconductance (from FBSU to COMPSU), gmEA (135S) 2) Current-sense amplifier transresistance, RCS, (0.3V/A) 3) Feedback regulation voltage, VFB(1.25V) 4) Step-up output voltage, VSUOUT, in V 5) Output load equivalent resistance, RLOAD, in = VSUOUT / ILOAD The key steps for step-up compensation are: 1) Place fC sufficiently below the RHPZ and calculate Cc. 2) Select Rc based on the allowed load-step transient. Rc sets a voltage delta on the COMP pin that corresponds to load current step. 3) Calculate the output filter capacitor (COUT) required to allow the Rc and Cc selected. 4) Determine if Cp is required (if calculated to be>10pF). For continuous conduction, the right-plane zero frequency (fRHPZ) is given by: fRHPZ = VOUTSU (1-D) / (2 L ILOAD)
2
If we select L = 3.3H then: fRHPZ = 3.35(2/3.35)2 / (2 x 4.7 x 10-6 x 0.5) = 115kHZ Small, High-Efficiency, Five-channel Digital Still Camera Power Supply Choose fc = 200kHz. Calculate Cc: Cc = (VFB/ VOUT)(RLOAD/ RCS)(gm/ 2 fc)(1-D) =(1.25/3.35)(6.7/0.3) x (135S/6.28 x 20kHz) (2/3.35) = 5.35nF Choose 6.8nF. Now select Rc such that transient droop requirements are met. For example, if 4% transient droop is allowed, the input to the error amplifier moves 0.04 x 1.25V, or 50mV. The error amp output drives 50mV x 135S, or 6.75A, across Rc to provide transient gain. Since the current-sense transresistance is 0.3 V/A, the value of Rc that allows the required load step swing: Rc = 0.3 IIND(PK) / 6.75A In a step-up DC-to-DC converter, if LIDEAL is used, output current relates to inductor current by: IIND(PK) = 1.25 IOUT/ (1-D) = 1.25 IOUT VOUT / VIN Thus, for a 400mA output load step with VIN = 2V and VOUT = 3.35V: Rc = [1.25(0.3 x 0.4 x 3.35) / 2]] / 6.75A = 37k Note that the inductor does not limit the response in this case since it can ramp at 2V/3.3H, or 606mA/s. The output filter capacitor is then chosen so that the COUT RLOAD pole cancels the Rc Cc Zero. COUT RLOAD = Rc Cc For example: COUT = 37K x 6.8nF / 6.7 = 37.5F Since a reasonable value for COUT is 47F rather than 37.5, choose 47F and rescale Rc: Rc = 47F x 6.7 / 6.8nF = 46.3k which provides a slightly higher transient gain and consequently less transient droop than previously selected. If the output filter capacitor has significant ESR, a zero occurs at: ZESR = 1 / (2 COUT RESR) If ZESR > fc, it can be ignored, as is typically the case with ceramic output capacitors. If ZESR is less than fc, it should be cancelled with a pole set by capacitor Cp connected from COMPSU to GND: Cp = COUT RESR / RC If Cp is calculated to be < 10pF, it can be omitted.
where D = the duty cycle = 1 - (VIN / VOUT), L is the inductor value, and ILOAD is the maximum output current. Typically target crossover (fc) for 1/6 the RHPZ. For example, if we assume VIN = 2V, VOUT = 3.35V, and IOUT = 0.5A, then RLOAD = 6.7.
P15/21
Rev. C, Sep 2005
ML1565
Design Procedure (4)
Step-Down Component Selection Step-Down Inductor The external components required for the step-down are an inductor, input and output filter capacitors, and compensation RC network. The ML1565 step-down converter provides best efficiency with continuous inductor current. A reasonable inductor value (LIDEAL) can be derived from: LIDEAL = 2(VIN) D (1-D) / (IOUT fOSC) which sets the peak-to-peak inductor current at 1/2 the DC inductor current. D is the duty cycle: D = VOUT / VIN Given LIDEAL, the peak-to-peak inductor current variation is 0.5 IOUT. The absolute peak inductor current is 1.25 IOUT. Inductance values smaller than LIDEAL can be used to reduce inductor size. However, if much smaller values are used, inductor current rises and a large output capacitance may be required to suppress output ripple. Larger values than LIEDAL can be used to obtain higher output current, but with typical larger inductor size. Step-Down Compensation The relevant characteristics for step-down compensation are: 1) Transconductance (from FBSD to COMPSD), gmEA (135S) 2) Step-down slope compensation pole, PSLOPE = VIN / ( L) 3) Current-sense amplifier transresistance,Rcs, (0.6V/A) 4) Feedback regulation voltage, VFB(1.25V) 5) Step-down output voltage, VSD, in V 6) Output load equivalent resistance, RLOAD in = VOUTSD / ILOAD The key steps for step-down compensation are: 1) Set the compensation RC zero to cancel the RLOAD COUT pole. 2) Set the loop crossover below the lower of 1/5 the slope compensation pole, or 1/5 the switching frequency. If we assume VIN = 3.35V, VOUT = 1.5V, and IOUT = 350mA, then RLOAD = 4.3 If we select L = 4.7H and fOSC = 440kHz, PSLOPE = VIN / (L) = 214kHz, so choose fc = 40kHz and calculate Cc: Cc = (VFB / VOUT)(RLOAD / RCS) (gm / 2 fc) =(1.25/1.5)(4.3/0.6) x (135S/(6.28 x 40kHz)) = 3.2nF Choose 3.3nF. Now select Rc such that transient droop requirements are met. For example, if 4% transient droop is allowed, the input to the error amplifier moves 0.04 x 1.25V, or 50mV. The error amp output drives 50mV x 135S, or 6.75A across Rc to provide transient gain. Since the current-sense transresistance is 0.6V/A, the value of Rc that allows the required load step swing: RC=0.6 IIND(PK) / 6.75A In a step-down DC-to-DC converter, if LIDEAL is used, output current relates to inductor current by: IIND(OK) = 1.25 IOUT Thus, for a 250mA output load step with VIN = 3.35V and VOUT = 1.5V: Rc = (1.25 x 0.6 x 0.25) / 6.75A = 27.8k Choose 27k. Note that the inductor does not limit the response in this case since it can ramp at (VIN-VOUT)/4.7H, or (3.35 - 1.5)/4.7H = 394mA/s The output filter capacitor is then chosen so that the COUTRLOAD pole cancels the RcCc zero: COUTRLOAD = RcCc For example: COUT = 27k x 3.3nF / 4.3 = 20.7F Choose 22F. If the output filter capacitor has significant ESR, a zero occurs at: ZESR = 1 / (2COUTRESR) If ZESR > fc, it can be ignored, as is typically the case with ceramic output capacitors. If ZESR is less than fc, it should be cancelled with a pole set by capacitor Cp connected from COMPAD to GND. Cp = COUTRESR / Rc If Cp is calculated to be < 10pF, it can be omitted. Auxiliary Controller Component Selection Diode For most auxiliary applications, a Schottky diode rectifies the output voltage. The Schottky diode's low forward voltage and fast recovery time provide the best performance in most applications. Silicon signal diodes (such as 1N4148) are sometimes adequate in low-current (<10mA) high-voltage (>10V) output circuits where the output voltage is large compared to the diode forward voltage.
P16/21
Rev. C, Sep 2005
ML1565
Design Procedure (5)
Auxiliary controller Component Selection External MOSFET All ML1565 auxiliary controllers drive external logic-level N-channel MOSFETs. Significant MOSFET selection parameters are: 1) On-resistance (RDS(ON)) 2) Maximum drain-to-source voltage (VDS(MAX)) 3) Total gate charge (QG) 4) Reverse transfer capacitance (CRSS) DL_ swings between OUTSU and GND. Use a MOSFET with on-resistance specified at or below the main output voltage. The gate charge, QG, includes all capacitance associated with charging the gate and helps to predict MOSFET transition time between on and off states. MOSFET power dissipation is a combination of on-resistance and transition losses. The on-resistance loss is: PRDSON = D IL2RDS(ON) where D is the duty cycle, IL is the average inductor current, and RDS(ON) is MOSFET on-resistance. The transition loss is approximately: PTRANS = (VOUT IL fOSC tT) / 3 were VOUT is the output voltage, IL is the average inductor current, fOSC is the switching frequency, and tT is the transition time. The transition time is approximately QG / IG, where QG is the total gate charge, and IG is the gate drive current (typically 0.5A). the total power dissipation in the MOSFET is: PMOSFET = PRDSON + PTRANS Auxiliary Compensation The auxiliary controllers employ voltage-mode control to regulate their output voltage. Optimum compensation somewhat depends on whether the design uses continuous or discontinuous inductor current. Discontinuous Inductor Current When the inductor current falls to zero on each switching cycle, it is described as discontinuous. The inductor is not utilized as efficiently as with continuous current. This often has little negative impact in light-load applications since the coil losses may already be low compared to other losses. A benefit of discontinuous inductor current is more flexible loop compensation and no maximum duty-cycle restriction on boost ratio. To ensure discontinuous operation, the inductor must have a sufficiently low inductance to fully discharge on each cycle. The occurs when: L < [ VIN2 (VOUT - VIN) / VOUT3 ] [ RLOAD / (2fOSC) ] A discontinuous current boost has a single pole at: fP = (2VOUT - VIN) / (2 RLOAD COUT VOUT) Choose the integrator capacitor such that the unity-gain Crossover (fC) occurs at fOSC / 10 or lower. Note that for many auxiliary circuits, such as those powering motors, LEDs, or other loads that do not require fast transient response, it is often acceptable to over compensate by setting fC at fOSC / 20 or lower. Cc is then determined by: Cc = [2VOUTVIN / (2VOUT - VIN) VRAMP]] [VOUT / (K(VOUT - VIN))1/2 [VFB / VOUT] (gM / 2 fC))] where K = 2 L fOSC / RLOAD, and VRAMP is the internal slope compensation voltage ramp of 1.25V. The CcRc zero is then used to cancel the fP pole, so: Rc = RLOAD COUT VOUT / [ (2VOUT - VIN) Cc] Continuous Inductor Current Continuous inductor current can sometimes improve boost efficiency by lowering the ratio between peak inductor current and output current. It does this at the expense of a larger inductance value that requires larger size for a given current rating. With continuous inductor current boost operation, there is a right-plane zero at: fRHPZ = (1-D)2 RLOAD /(2L) where (1-D) = VIN / VOUT (in a boost converter). A complex pole pair is located at: f0 = VOUT /[2 VIN (L COUT)1/2] If the zero due to the output capacitor capacitance and ESR is less than 1/10 the righe-plane zero: ZCOUT = 1 / (2COUT RESR) < fRHPZ / 10 Choose Cc such that the crossover frequency fC occurs at ZCOUT. The ESR zero provides a phase boost at crossover. Cc = (VIN / VRAMP)(VFB / VOUT)(gM / (2ZCOUT)) Choose Rc to place the integrator zero, 1/(2RcCc), at f0 to cancel one of the pole pairs: Rc = VIN (L COUT)1/2 / (VOUT Cc) If ZCOUT is not less than fRHPZ / 10 (as is typical with ceramic output capacitors) and continuous conduction is required, then cross the loop over before fRHPZ and f0: fC < f0/10, and fC < fRHPZ / 10 In that case: Cc = (VIN/ VRAMP) (VFB/ VOUT) (gM / 2 fC) Place 1/ (2RcCc) = 1 / (2 RLOADCOUT), so that Rc = RLOADCOUT / Cc or reduce the inductor value for discontinuous operation.
P17/21
Rev. C, Sep 2005
ML1565
Applications Information (1)
LED, LCD, and Other Boost Applications Any auxiliary channel can be used for a wide variety of step-up applications. These include generation 5V or some other voltage for motor or actuator drive, generating 15V or similar voltage for LCD bias, or generating a step-up current source to efficiently drive a series array of white LEDs for display backlighting. Figures 5 and 6 show examples of these applications. SEPIC Buch-Boost The ML1565 's internal switch step-up and step-down can be cascaded to make a high-efficiency buck-boost converter, but it may sometimes be desirable to build a second buck-boost converter with an AUX_ controller. One type of step-up/step-down converter is the SEPIC (Figure 7). Inductors L1 and L2 can be separate inductors or wound on a single core and coupled like a transformer. Typically, a coupled inductor improves efficiency since some power is transferred through the coupling, causing less power to pass through the coupling capacitor (C2). Likewise, C2 should have low ESR to improve efficiency. The ripple current rating must be greater than the larger of the input and output currents. The MOSFET (Q1) drain-to-source voltage rating, and the rectifier (D1) reverse-voltage rating must exceed the sum of the input and output voltages. Other types of step-up/step-down circuits are a flyback converter and a step-up converter followed by a linear regulator.
Figure 5. Using an AUX_ Controller Channel to Generate LCD Bias
PART OF ML 1565
Figure 7. Auxiliary SEPIC Configuration
ML1565
Figure 6. AUX_ Channel Powering a White LED Step-Up Current Source
P18/21
Rev. C, Sep 2005
ML1565
Applications Information (2)
Multiple Output Flyback Circuits Some applications require multiple voltages from a single converter channel. This is often the case when generating voltages for CCD bias or LCD power. Figure 8 shows a two-output flyback configuration with AUX_ controller. The controller drives an external MOSFET that switches the transformer primary. Two transformer secondaries generate the output voltages. Only one positive output voltage can be feedback, so the other voltages are set by the turn ratio of the transformer secondaries. The load stability of the other secondary voltages depends on transformer leakage inductance and winding resistance. Voltage regulation is best when the load on the secondary with feedback is small when compared to the load on the one that is. Regulation also improves if the load current range is limited. Consult the transformer manufacturer for the proper design for a given application.
ML1565
Figure 9. 15V Output Using a Boost with Charge-Pump Inversion When the MOSFET turns on, C1 discharges through D3, thereby charging C3 to VOUT- minus the drop across D3 to create roughly the same voltage as VOUT+ at VOUT - but with inverted polarity. If different magnitudes are required for the positive and negative voltages, a linear regulator can be used at one of the outputs to achieve the desired voltages.
ML1565
Figure 8. +15V and -7.5V CCD Bias with Transformer
Boost with Charge Pump for Positive and Negative Outputs Negative output voltages can be produced without a transformer, using a charge-pump circuit with an auxiliary controller as shown in Figure 9. When MOSFET Q1 turns off, the voltage at its drain rises to supply current to VOUT+. At the same time, C1 charges to the voltage VOUT+ through D1.
P19/21
Rev. C, Sep 2005
ML1565
Applications Information (3)
Using SDOK for Power Sequencing SDOK goes low when the step-down reaches regulation. Some microcontrollers with low-voltage cores require that the high-voltage (3.3V) I/O rail not be powered up until the core has a valid supply. The circuit in Figure 11 accomplishes this by driving the gate of a PFET connected between the 3.3V output and the microcontroller I/O supply. Alternately, power sequencing may be implemented by connecting RC networks to the appropriate converter ON_ inputs. where VSD is the output voltage, VFBSD is 1.25V, and VSU is the step-up output voltage. Note that any available voltage that is higher than 1.25V can be used as the connection point for R3 on Figure 12 and for the VSD term in the equation. Since there are multiple solutions for R1, R2, and R3, the above equation cannot be written in terms of one resistor. The best method for determining resistor values is to enter the above equation into a spreadsheet and test estimated resistors' values. A good starting point is with 100k at R2 and R3.
ML1565
ML1565
Figure 12. Setting OUTSD for Outputs Below 1.25V Figure 11. Using SDOK to Gate 3.3V Power to CPU Designing a PC Board After the Core Voltage is OK Good PC board layout is important to achieve optimal performance from the ML1565. Poor design can cause excessive conducted and/or radiated noise. Conductors carrying discontinuous currents, and any high-current path should be made as short and wide as possible. A separate low-noise ground plane containing the reference and signal grounds should connect to the power-ground plane at only one point to minimize the effect of power-ground currents. Typically, the ground planes are best joined right at the IC. Keep the voltage feedback network very close to the IC, preferably within 0.2in (5mm) of the FB_ pin. Nodes with high dV/dt (switching nodes) should be kept as small as possible and should be routed away from high-impedance nodes such as FB_.
Setting OUTSD Below 1.25V The step-down feedback voltage is 1.25V when FBSELSD is high. With a standard two-resistor feedback network, the output voltage may be set to values between 1.25V and the input voltage. If a step-down output voltage less than 1.25V is desired, it can be set by adding a third feedback resistor from FB to a voltage higher than 1.25V (the step-up output is a convenient voltage for this) as shown in Figure 12. The equation governing output voltage shown in Figure 12 is: 0= [(VSD - VFBSD) / R1] +[(0 - VFBSD) / R2] + [(VSU - VFBSD) / R3]
P20/21
Rev. C, Sep 2005
ML1565
Package Information
PKG. Symbol M1 M2 B1 B2 B3 B4 B5 B6 B7 B8 H1 H2 H3
QFN-32L 5mm x 5mm Min. 4.90 4.90 Typ. 5.00 5.00 0.50 BSC. (ND-1)xB1 (NE-1)xB1 0.30 0.25 3.00 3.00 0.20 0.70 0 0.40 3.10 3.10 0.25 0.75 0.02 0.20 REF JEDEC 0.50 3.20 3.20 0.30 0.80 0.05 Max. 5.10 5.10
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. P21/21 Rev. C, Sep 2005


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