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19-2565; Rev 4; 10/07
5Gbps PCB Equalizer
General Description
The MAX3784/MAX3784A 5Gbps equalizers provide compensation for transmission-medium losses in up to 40in of FR-4. They are optimized for short-run length and balanced codes such as 8b10b, as found in multiplexed 1.25Gbps Ethernet systems and 4.25Gbps Fibre Channel. The equalizers use differential CML data inputs and outputs. A standby mode reduces power consumption when the parts are not in use. The MAX3784/ MAX3784A are available in a 4mm x 4mm, 16-pin QFN package that consumes only 185mW at +3.3V. Spans 40in (1m) of FR-4 PCB 0.18UI Deterministic Jitter Up to 40in Low Power Consumption: 185mW (MAX3784) Equalization Reduces Intersymbol Interference Single +3.3V Supply Standby Mode Small 4mm x 4mm, 16-Pin QFN Package
Features
MAX3784/MAX3784A
Pin Configurations
GND VCC
Applications
Chassis Life Extension 4.25Gbps Fibre Channel 4x Multiplexed 1.25Gbps Ethernet (5Gbps)
OUT+
TOP VIEW
OUT-
12
11
10
9 8
EN 13
N.C.
N.C. 14 N.C. 15
*EP
7
VCC GND
Ordering Information
PART MAX3784UGE MAX3784UTE+ MAX3784AUGE MAX3784AUTE+ TEMP RANGE PINPACKAGE PKG CODE G1644-1 T1644-3 G1644-1 T1644-3
MAX3784/ MAX3784A
6
N.C. 16
5 2 IN+ 3 IN4 GND
N.C.
0C to +85C 16 QFN-EP* 0C to +85C 16 TQFN-EP* 0C to +85C 16 QFN-EP* 0C to +85C 16 TQFN-EP*
1 VCC
QFN
* THE EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND FOR CORRECT THERMAL AND ELECTRICAL PERFORMANCE.
Pin Configurations continued at end of data sheet.
+Denotes a lead-free package. *Exposed pad.
Typical Application Circuit
LINE CARD PCB BACKPLANE SWITCH CARD
1.25Gbps
Rx Tx Rx Tx Rx Tx Rx Tx
T/R 1
+3.3V SWITCH
1.25Gbps
T/R 2
T/R 1 T/R 2
Tx +3.3V 5Gbps
IN
MAX3784/ MAX3784A
EQUALIZER
OUT
Rx
1.25Gbps
T/R 3
T/R 3 Rx T/R 4 OUT
MAX3784/ MAX3784A
EQUALIZER
IN
Tx
1.25Gbps
T/R 4
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
5Gbps PCB Equalizer MAX3784/MAX3784A
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC.................................................-0.5V to +6V Input Voltage............................................(-0.5V) to (VCC + 0.5V) Continuous Output Current ...............................-25mA to +25mA Continuous Power Dissipation (TA = +85C) 16-Pin QFN (derate 25mW/C above +85C) ............1600mW Operating Ambient Temperature Range ................0C to +85C Storage Temperature Range .............................-55C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3V to +3.6V, TA = 0C to +85C. Typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.)
PARAMETER Supply Power SYMBOL EN = low EN = high 10Hz < f < 100Hz Supply-Noise Tolerance Latency CML RECEIVER INPUT Input Voltage Swing Return Loss Input Resistance EQUALIZATION Residual Deterministic Jitter, 5Gbps Residual Deterministic Jitter, 2.5Gbps Residual Deterministic Jitter, 1.25Gbps Random Jitter Table 1 (Notes 2-5) Table 1 (Notes 2-5) Table 1 (Notes 2-5) (Notes 5, 6) Differential swing, measured differentially at point C in Figure 1 20% to 80% (Notes 5, 8) Single ended MAX3784 MAX3784A 400 550 30 40 45 50 20in 40in 20in 40in 20in 40in 0.13 0.18 0.08 0.13 0.04 0.07 1.3 0.21 0.23 0.14 0.28 0.07 0.15 1.9 600 750 60 60 UIP-P UIP-P UIP-P psRMS VIN Measured differentially at point A in Figure 1 100MHz to 2.5GHz Differential 80 400 15 100 120 1000 mVP-P dB (Note 1) From input to output 100Hz < f < 1MHz 1MHz < f < 2.5GHz 185 100 40 10 200 ps mVP-P CONDITIONS MIN TYP MAX 30 250 UNITS mW
CML TRANSMITTER OUTPUT (into 100 1) Output Voltage Swing Transition Time Output Resistance VO tf, tr mVP-P ps
2
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5Gbps PCB Equalizer
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3V to +3.6V, TA = 0C to +85C. Typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.)
PARAMETER ENABLE CONTROL PIN Input High Voltage Input Low Voltage Input High Current Input Low Current (Note 7) (Note 7) -150 -150 1.5 0.5 +10 +10 V V A A SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX3784/MAX3784A
Note 1: Allowed supply noise during jitter tests. Note 2: Test pattern. This is a combination of K28.5 characters running at the full bit rate and at one-quarter the bit rate. This simulates the multiplexing of four each 1.25Gbps Ethernet data streams. Pattern (hex) 100 bits 00 FFFF F0F0 FF 0000 0F0F (quarter rate K28.5+, quarter rate K28.5-) 3EB05 (K28.5 00 1111 1010 11 0000 0101) Note 3: Difference in deterministic jitter between reference points A and C in Figure 1. Note 4: Signal source amplitude range is 400mVP-P to 1000mVP-P differential. Signal is applied differentially at point A as shown in Figure 1. The deterministic jitter at point B must be from media-induced loss and not from clock-source modulation. Deterministic jitter is measured at the 50% vertical level of the signal at point C. Note 5: Guaranteed by design and characterization. Note 6: Test pattern is K28.5 with 40in trace. Note 7: On-chip pullup resistor of 40k (typ). Negative current indicates equalizer sources current. Note 8: Using 00 0001 1111 or equivalent pattern. Measured over entire input voltage range, max and min media loss and within 2in of output pins.
SIGNAL SOURCE A SMA CONNECTOR
BACKPLANE PCB SMA CONNECTOR B
MAX3784/MAX3784A EQUALIZER C IN OUT
6mil LINE
L 40in
Figure 1. Test Conditions
Table 1. PCB Assumptions (PCB material is FR-4)
PARAMETER Transmission Line Relative Permittivity Loss Tangent Metal Thickness Impedance FR-4 or similar FR-4 or similar 0.7 mils (0.5oz copper) Differential 90 CONDITIONS Edge-coupled stripline 4.4 0.02 0.7 100 110 MIN TYP 6 4.5 0.022 MAX UNITS mils -- -- mils
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3
5Gbps PCB Equalizer MAX3784/MAX3784A
Typical Operating Characteristics
(VCC = +3.3V, measurements done at 5Gbps, 800mVP-P board input with 100-bit pattern from Note 2 of the EC Table, TA = +25C, unless otherwise noted.)
EQUALIZER INPUT EYE DIAGRAM BEFORE EQUALIZATION AT 5Gbps (40in, FR-4, 6-mil STRIPLINE)
MAX3784/4A toc01
EQUALIZER OUTPUT EYE DIAGRAM AFTER EQUALIZATION AT 5Gbps (40in, FR-4, 6-mil STRIPLINE, MAX3784)
MAX3784/4A toc02
EQUALIZER OUTPUT EYE DIAGRAM AFTER EQUALIZATION AT 5Gbps (40in, FR-4, 6-mil STRIPLINE, MAX3784A)
MAX3784/4A toc03
55mV/ div
80mV/ div
80mV/ div
32ps/div
35ps/div
35ps/div
DIFFERENTIAL RETURN LOSS
MAX3784/4A toc04
DETERMINISTIC JITTER vs. LINE LENGTH
MAX3784/4A toc05
DETERMINISTIC JITTER vs. AMPLITUDE (20in FR-4 STRIPLINE)
90 DETERMINISTIC JITTER (ps) 80 70 60 50 40 30 20 10 0 1.25GHz 5GHz 2.5GHz
MAX3784/4A toc06
30 25 RETURN LOSS (dB) 20 15 10 5 0 0 1 2 3 4 5 FREQUENCY (GHz)
100 90 DETERMINISTIC JITTER (ps) 80 70 60 50 40 30 20 10 0 0 10 20 30 40 50 1.25GHz 2.5GHz
100
5GHz
60
200
400
600
800
1000
1200
LINE LENGTH (in) (FR-4 6-mil STRIPLINE)
INPUT AMPLITUDE (mVP-P) (FIGURE 1, POINT A)
DETERMINISTIC JITTER vs. AMPLITUDE (40in FR-4 STRIPLINE)
90 DETERMINISTIC JITTER (ps) 80 70 LATENCY (ps) 60 50 40 30 20 10 0 200 400 600 800 1000 1200 INPUT AMPLITUDE (mVP-P) (FIGURE 1, POINT A) 0 0 5GHz 100 2.5GHz 1.25GHz 300
MAX3784/4A toc07
LATENCY vs. TEMPERATURE
MAX3784/4A toc08
SUPPLY CURRENT vs. TEMPERATURE
70 SUPPLY CURRENT (mA) 60 50 40 30 20 10 0 ISHUTDOWN 0 25 50 75 ICC MAX3784A ICC MAX3784
MAX3784/4A toc09
100
500
80
400
200
25
50 TEMPERATURE (C)
75
100
TEMPERATURE (C)
4
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5Gbps PCB Equalizer
Pin Description
PIN 1, 7, 12 2 3 4, 6, 9 5, 8, 14, 15, 16 10 11 13 EP NAME VCC IN+ INGND N.C. OUTOUT+ EN Exposed Pad +3.3V Supply Voltage Positive Input, CML Negative Input, CML Supply Ground No Connection. Leave unconnected. Negative Output, CML Positive Output, CML Enable Equalizer. A logic high or open selects normal operation. A logic low selects low-power standby mode. Connect to Ground. The exposed pad must be soldered to the circuit board ground plane for proper thermal and electrical performance. FUNCTION
MAX3784/MAX3784A
5Gbps EQUALIZER VCC OFFSET CANCELLATION LOWPASS FILTER 100 INVCC 40k EN
MAX3784/ MAX3784A
50
50 OUT+
IN+
EQUALIZER
LIMITER OUT-
Figure 2. Functional Diagram
Detailed Description
General Theory of Operation
The MAX3784/MAX3784A adaptive equalizers extend the reach of transmission lines in high-frequency backplane interconnect applications. They can be used for 4.25Gbps Fibre Channel, 4x 1.25Gbps Ethernet (5Gbps) and other NRZ, 8b10b or short ( 20 bits) CID data types. Internally, the MAX3784/MAX3784A are comprised of an equalizer control loop and limiting output driver. The equalizer block reduces intersymbol interference (ISI), compensating for frequency-dependent media-induced loss. The equalization control detects the spectral contents of the input signal and provides a control voltage to the equalizer core, adapting it to different media. The equalizer operation is optimized for short-run, DC-balanced transmission codes.
Standby Mode
Standby saves power when the equalizer is not in use. The EN logic input must be set high or open for normal operation. Logic low at EN forces the equalizer into the standby state.
CML Input and Output Buffers
The input and output buffers are implemented using current-mode logic (CML). Equivalent circuits are shown in Figures 3 and 4. For details on interfacing with CML, refer to Maxim Application Note HFAN-01.0: Introduction to LVDS, PECL, and CML. The common-mode voltage of the input and output is above +2.5V. AC-coupling capacitors are required when interfacing this part with devices terminated in voltages such as +1.8V. Values of 0.10F or greater are recommended.
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5Gbps PCB Equalizer MAX3784/MAX3784A
VCC
VCC
50
50 OUT+
50
OUT-
50
250A
Figure 3. CML Input Equivalent Circuit
Figure 4. CML Output Equivalent Circuit
Applications Information
Alternate Data Rates
The MAX3784/MAX3784A is optimized for automatic operation at 5Gbps. Equalization at other data rates, such as 1.25Gbps and 2.5Gbps, is possible. See the Typical Operating Characteristics for Deterministic Jitter vs. Line Length and Deterministic Jitter vs. Amplitude for typical performance at these data rates.
Layout Considerations
Circuit board layout and design can significantly affect the MAX3784/MAX3784As' performance. Use good high-frequency design techniques, including minimizing ground inductance and connections and using controlled-impedance transmission lines for the high-frequency data signals. Route signals differentially to reduce EMI susceptibility and crosstalk. Solder the exposed pad to supply ground for proper thermal and electrical operation. Place power-supply decoupling capacitors as close as possible to the VCC pins.
Pin Configurations (continued)
OUT+ OUT10 GND 9 VCC 12
TOP VIEW
11
EN 13 N.C. 14 N.C. 15 N.C. 16
8 7
N.C. VCC GND N.C.
MAX3784 MAX3784A
+
1 VCC 2 IN+ 3 IN*EP
6 5
4 GND
TQFN
* THE EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND FOR CORRECT THERMAL AND ELECTRICAL PERFORMANCE.
6
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5Gbps PCB Equalizer
Package Information
For the latest package outline information, go to www.maxim-ic.com/packages. PACKAGE TYPE 16 QFN 16 TQFN DOCUMENT NO. 21-0106 21-0139
Revision History
Pages changed at Rev 4: 1-7 (removed package drawings, replaced with table)
MAX3784/MAX3784A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7
(c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.

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