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NTMFS4835N Power MOSFET
30 V, 104 A, Single N-Channel, SO-8 FL
Features
* * * *
Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Devices
V(BR)DSS 30 V
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* CPU Power Delivery * DC-DC Converters www..com * Low Side Switching
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C, tp = 10 ms PD IDM TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 20 20 14 2.27 12 9.0 0.89 104 75 62.5 208 -55 to +150 52 6 392 W A C A V/ns mJ W W A Unit V V A
Applications
RDS(ON) MAX 3.5 mW @ 10 V 5.0 mW @ 4.5 V D (5,6)
ID MAX 104 A
G (4)
S (1,2,3) N-CHANNEL MOSFET
MARKING DIAGRAM
D
1
A
SO-8 FLAT LEAD CASE 488AA STYLE 1
S S S G
4835N AYWWG G D
D
D
Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source DV/DT Single Pulse Drain-to-Source Avalanche Energy TJ = 25C, VDD = 50 V, VGS = 10 V, IL = 28 Apk, L = 1.0 mH, RG = 25 W Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
Device NTMFS4835NT1G Package SO-8 FL (Pb-Free) SO-8 FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
TL
260
C NTMFS4835NT3G
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2006
1
July, 2006 - Rev. 0
Publication Order Number: NTMFS4835N/D
NTMFS4835N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note ) 3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA Value 2.0 55.1 140.1 C/W Unit
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient www..com Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS VGS = 0 V, VDS = 24 V TJ = 25 C TJ = 125C VGS = 0 V, ID = 250 mA 30 22.4 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH) VGS(TH)/TJ RDS(on)
VGS = VDS, ID = 250 mA
1.5
1.9 5.3
2.5
V mV/C
VGS = 10 V to 11.5 V VGS = 4.5 V
ID = 30 A ID = 15 A ID = 30 A ID = 15 A
2.9 2.5 4.3 3.9 21
3.5 mW
5.0
Forward Transconductance
gFS
VDS = 15 V, ID = 15 A
S
CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 16 31 22 13 10 23 30 10 ns ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 11.5 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 3100 670 360 22 4.7 8.3 8.8 52 nC nC 39 pF
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTMFS4835N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.77 0.70 27 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 15 12 18 nC ns 1.0 V Symbol Test Condition Min Typ Max Unit
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance www..com Gate Resistance
tRR ta tb QRR
LS LD LG RG TA = 25C
0.65 0.005 1.84 1.3
nH nH nH W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTMFS4835N
TYPICAL PERFORMANCE CURVES
170 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 150 130 110 90 3.2 V 70 50 30 10 0 3.0 V 2.8 V 2.6 V 0 1 2 3 4 5 6 7 8 9 10 TJ = 25C 3.5 V VGS = 5.0 to 10 V 4.0 V 170 150 130 110 90 70 50 30 10 0 0 1 TJ = 125C 2 TJ = -55C 3 4 5 6 TJ = 25C VDS 10 V
www..com, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VDS
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.030 0.025 0.020 0.015 0.010 0.005 0 2 4 6 8 10 12 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID = 30 A TJ = 25C
0.008 0.007 0.006 0.005 0.004 0.003 0.002 0.001 0 10 15 20 25 30 35 40 45 50 55 60 ID, DRAIN CURRENT (AMPS) VGS = 11.5 V VGS = 4.5 V TJ = 25C
Figure 3. On-Resistance vs. Gate-to-Source Voltage
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.0 ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) 1.5 10,000 100,000
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V
TJ = 150C
1.0
1,000 TJ = 125C 100
0.5
0 -50
10 -25 0 25 50 75 100 125 150 4 8 12 16 20 24 28 30 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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NTMFS4835N
TYPICAL PERFORMANCE CURVES
5000 4500 C, CAPACITANCE (pF) 4000 3500 3000 2500 2000 1500 1000 500 0 -15 -10 -5 0 5 VGS VDS 10 15 20 Coss 25 30 Crss Ciss Ciss TJ = 25C 12 QT VGS VDS 8 6 4 2 0 0 5 10 15 20 25 30 35 40 45 QG, TOTAL GATE CHARGE (nC) 50 Qgs Qgd ID = 30 A TJ = 25C 10 20 18 16 14 12 10 8 6 4 2 0 55 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
www..com GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (AMPS) VDS = 15 V ID = 15 A VGS = 11.5 V td(off) t, TIME (ns) 100 tf tr td(on)
Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge
30 VGS = 0 V 25 TJ = 25C 20 15 10 5 0
10
1 1 10 RG, GATE RESISTANCE (W) 100
0.4
0.5 0.6 0.7 0.8 0.9 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
1.1
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (AMPS) 400 360 320 280 240 200 160 120 80 40 0
Figure 10. Diode Forward Voltage vs. Current
ID = 28 A
100
10 ms 100 ms
10 VGS = 20 V SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1
1 ms 10 ms dc
1
0.1
10 1 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
100
25
50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (C)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NTMFS4835N
PACKAGE DIMENSIONS
SO-8 FLAT LEAD (DFN6) CASE 488AA-01 ISSUE B
2X
0.20 C D 2 D1
6 5
A B
2X
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
0.20 C
4X
E1 2 www..com
1 2 3 4
E c
q
A1
TOP VIEW
3X
C
SEATING PLANE
0.10 C A 0.10 C SIDE VIEW
8X
e DETAIL A
STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN
DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q
MILLIMETERS MIN NOM MAX 0.90 0.99 1.20 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _
DETAIL A
SOLDERING FOOTPRINT*
3X 4X
b e/2
1 4
1.270
0.750
4X
0.10 0.05
CAB c L
1.000
0.965 K 1.330
2X
0.905 4.530 0.475
2X
E2 L1
6 5
M
0.495 3.200
G
D2 BOTTOM VIEW 4.560
2X
1.530
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NTMFS4835N/D

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