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Ordering number : ENA0594
LA6504H
Overview
Monolithic Linear IC
DVD System motor Drives
The LA6504H is a DVD system motor drives.
Functions
* PWM H bridge driver (3CH) + power operation amplifier (2CH)
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Output block supply voltage Output current 1 Output current 2 Output current 3 Allowable power dissipation 1 Allowable power dissipation 2 Operating temperature Storage temperature Symbol VM1, 2 max IO max1 IO max2 IO max3 Pd max1 Pd max2 Topr Tstg FOCUS, TRACKING, LOADING FOCUS, TRACKING : 1msec SLED Independent IC Mounted on a board. Conditions Ratings 16.0 1.0 1.8 0.7 0.8 1.8 -20 to +85 -55 to +150 Unit V A A A W W C C
* Specified substrate : 114.3mmx76.1mmx1.6mm, glass epoxy board.
Recommended Operating Conditions at Ta = 25C
Parameter Output block supply voltage Symbol VM1, 2 Conditions Ratings 8 to 14 Unit V
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
22807 MS PC B8-7345 No.A0594-1/10
LA6504H
Electrical Characteristics at Ta = 25C, VM1 = VM2 = 12V, VREF = 1.75V
Parameter Supply current 1 Supply current 2 Supply current 3 Standby current Overheat protection circuit Heat protection circuit operation temperature Temperature hysteresis width SLED, loading input pin H level input voltage range L level input voltage range Input current MUTE pin H level input voltage range L level input voltage range Input current Output block Saturation voltage 1 Saturation voltage 2 Saturation voltage 3 BTL block Output offset voltage Maximum output amplitude Voltage gain Input OPAMP block Common-phase input range Input offset voltage Input bias current Output high level voltage Output low level voltage TD OFST output offset voltage TD OFST pin maximum voltage VINOP VOFFOP IBIASOP VOHOP VOLOP VOFFTD VTDMAX *4 -40 2.7 3.0 3.7 4.0 0.2 0.5 40 3.3 *4 0.5 -6.0 4.0 6.0 300 V mV nA V V mV V VOFF VOA VGAIN Voltage difference between outputs of each channel RL = 12 *4 RL = 12 Gain between input and output RL = 12 *4 -50 7.9 16 10 18 20 50 mV V dB VSAT1 VSAT2 VSAT3 FOCUS, TRACKING : IO = 0.5A SLED : IO = 0.5A LOADING : IO = 0.5A 1.5 2.2 1.5 2.3 3.0 2.3 V V V VMUH VMUL IINM MUTE OFF MUTE ON 2.5 0 0.1 5.0 0.6 0.15 V V mA VIH VIL IIN 2.5 0 0.1 5.0 0.6 0.15 V V mA TSD Design target value *5 40 C TSD Design target value *5 150 180 C Symbol ICC1 ICC2 ICC3 ICC4 Conditions min MUTE pin H at no load MUTE pin L *1 at no load MUTE pin L *2 at no load MUTE pin L *3 at no load Ratings typ 20 45 70 0.2 max 35 60 110 0.4 mA mA mA mA Unit
*1 : During LD motor rotation. IN4F = Hi, IN4R = Low. *2 : At braking of LD motor. IN4F = Hi, IN4R = Hi. *3 : At standby. IN4F = Low, IN4R = Low. *4 : Pre-OPAMP is used as buffer. *5 : Design target value. It doesn't measurement.
No.A0594-2/10
LA6504H
Package Dimensions
unit : mm (typ) 3234B
2.5
15.2 (6.2) 28 15
HEAT SPREADER
Pd max -- Ta
Specified board : 114.3x76.1x1.6mm3 glass epoxy Mounted on a specified board.
Allowable power dissipation, Pd max - W
2 1.8 1.5
(4.9)
10.5
7.9
0.65
1 0.8 0.5
1 0.8 (0.8) 2.0 0.3
14
Independent IC
0.94
0.25
2.45 max
0.42
(2.25)
0 - 20
0
20
40
60
80
100
0.1
2.7
Ambient temperature, Ta - C
SANYO : HSOP28HC(375mil)
Pin Assignment
OPOUT1 OPOUT2 P-GND1
OPIN1R
OPIN2R
OPIN1F
OPIN2F
OUT2R
OUT1R
OUT2F
OUT1F
MUTE
16 13
28
27
26
25
24
23
22
21
20
19
18
17
15
LA6504H
1
2
3
4
5
6
7
8
9
10
11
12
14
TD_OFST
OUT5F
OUT4F
OUT3F
VREF
IN3F
S-GND
OUT5R
OUT4R
P-GND2
OUT3R
IN3R
No.A0594-3/10
IN4F
VM2
IN4R
VM1
LA6504H
Block Diagram
VREF
1
270k + 22k -
28
OPIN1F
TD_OFST
2 +
27
OPIN1R
S-GND
3
26
OPOUT1
P-GND2
4 + -
25
OPIN2F
OUT5R
5
H Bridge
24 Loading 10k 10k 23
OPIN2R
OUT5F
6
OPOUT2
+
+
40k
-
-
OUT4R
7
40k
H Bridge
22
P-GND1
Sled1 21 Level Shift Tracking 20 Sled2 19 Level Shift Focus 18 OUT1F OUT1R OUT2F OUT2R
OUT4F
8
OUT3R
9
H Bridge
OUT3F
10
IN3F
11
Logic MUTE=H CH1 to CH4 ON SL/LD changeover MUTE=L CH5 ON
IN3R
12
17
VM1
VM2
13
MUTE
16
MUTE
IN4F
14
Logic
15
IN4R
No.A0594-4/10
LA6504H
Pin Functions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin Name VREF TD_OFST S-GND P-GND2 OUT5R OUT5F OUT4R OUT4F OUT3R OUT3F IN3F IN3R VM2 IN4F IN4R MUTE VM1 OUT1F OUT1R OUT2F OUT2R P-GND1 OPOUT2 OPIN2R OPIN2F OPOUT1 OPIN1R OPIN1F Reference voltage pin TD_OFST pin Signal system GND Power system GND for CH3, 4, and 5 Loading output (-) Loading output (+) CH4 output pin (-) CH4 output pin (+) CH3 output pin (-) CH3 output pin (+) CH3 input pin (+) CH3 input pin (-) Power system power supply for CH3, 4, and 5 CH4 input pin (+) CH4 input pin (-) MUTE pin Power supply for the power and other systems for CH1 and 2 CH1 BTL AMP output pin (+) CH1 BTL AMP output pin (-) CH2 BTL AMP output pin (+) CH2 BTL AMP output pin (-) Power system GND for CH1 and 2 OP-AMP output pin for CH2 OP-AMP input pin (-) for CH2 O-AMP input pin (+) for CH2 OP-AMP output pin for CH1 OP-AMP input pin (-) for CH1 OP-AMP input pin (+) for CH1 Description (Function)
* The center frame (FR) functions as the power system GND. Set it to the minimum potential together with S-GND.
No.A0594-5/10
LA6504H
Pin description
Pin No. 27 28 24 25 Pin name OPIN1R OPIN1F OPIN2R OPIN2F Function Input pin (CH1 to 2) Equivalent circuit
OPIN*R OPIN*F
300
300
11 12 14 15
IN3F IM3R IN4F IN4R
CH3(PWM) input CH4, 5(PWM) input
IN4R,F only
IN*R/F
300
50k 100k
26 23
OPOUT1 OPOUT2
CH1 and 2 outputs
OPOUT*
OUT*F/R
18 19 20 21
OUT1F OUT1R OUT2F OUT2R
5k 40k 5k
10k 10k 5k
40k
10 9 8 7
OUT3F OUT3R OUT4F OUT4R
CH3(PWM) output CH4(PWM) output
2k OUT*F/R
Continued on next page
No.A0594-6/10
LA6504H
Continued from preceding page. Pin No. 6 5 Pin name OUT5F OUT5R Function CH5(PWM) output Equivalent circuit
2k OUT5F/R
16
MUTE
MUTE pin
300 MUTE 40k
20k 10k
1
VREF
VREF pin
300 VREF
2
TD_OFST
TD_OFST pin
TD_OFST
10k 270k
No.A0594-7/10
LA6504H
Actuator truth table Loading block
MUTE L L L L H IN4F L H L H x IN4R L L H H x OUT5F Z H L L Z OUT5R Z L H L Z
SLED block
MUTE H H H H L Z : open Loading input is shared also by the SLED input pin (IN4F/IN4R pin). IN3, 4F L H L H x IN3, 4R L L H H x OUT3, 4F H H L H Z OUT3, 4R H L H H Z
SLED timing chart
IN3F
IN3R
OUT3F H Z L H OUT3R Z L A A
SLED performs PWM on the lower side. In this case, the upper side of another phase is always ON. Only initial changeover contains the OFF section A (about 1s) as a measure for through operation. OUT4F and R do the same operation.
No.A0594-8/10
LA6504H
SLED timing chart
IN3F
IN3R
OUT3F H Z L H OUT3R Z L A A
SLED performs PWM on the lower side. In this case, the upper side of another phase is always ON. Only initial changeover contains the OFF section A (about 1s) as a measure for through operation. OUT4F and R do the same operation.
SLED timing chart
IN4F
IN4R
H OUT5F Z L H OUT5R Z L B B
LOADING contains the OFF section B (about 1s) on both edges for changeover of the input. With the input at HH, the short braking occurs on the lower side.
No.A0594-9/10
LA6504H
Sample Application Circuit
FOCUS TRACK IN TRACKING COIL FOCUS COIL MUTE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LOADING or SLED 1 2 3 4 5 6 7 8 9 10 11 12 13 14
1.75V
M M LOADING MOTOR SLED MOTOR
SLED
12V
Cautions for use 1. GND The center frame (FR) functions as a power system GND. Set it to the minimum potential together with S-GND. 2. Bypass capacitor For power supply, connect the bypass capacitor immediately near the pin of this IC. 3. Lightening, ground fault, and short-circuit between outputs Avoid short-circuit between the output pin and power supply (lightening), short-circuit between the output pin and GND (ground fault), and short-circuit between output pins (load short-circuit). When mounting IC to the substrate, pay attention to the direction of IC. Mounting in the wrong direction may cause damage to IC, and fuming in certain cases.
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of February, 2007. Specifications and information herein are subject to change without notice. PS No.A0594-10/10

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