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 18 V, Micropower, CMOS, Rail-to-Rail Input/Output Operational Amplifier AD8546
FEATURES
Micropower at high voltage (18 V): 18 A typical Single-supply operation: 2.7 V to 18 V Dual-supply operation: 1.35 V to 9 V Low input bias current: 20 pA Gain bandwidth product: 200 kHz Unity-gain stable
PIN CONFIGURATION
OUT A 1 -IN A 2 +IN A 3 V- 4
8
AD8546
TOP VIEW (Not to Scale)
V+ OUT B +IN B
09585-001
7 6 5
-IN B
Figure 1. 8-Lead MSOP
APPLICATIONS
Portable medical equipment Current monitors 4 mA to 20 mA loop drivers Buffer/level shifting Multipole filters Remote/wireless sensors Low power transimpedance amplifiers
GENERAL DESCRIPTION
The AD8546 is a dual, micropower, high impedance, rail-to-rail input/output amplifier optimized for low power and wide operating supply voltage range applications. The AD8546 operates from 2.7 V up to 18 V with a typical supply current of 18 A. The combination of low supply current, high input impedance, and rail-to-rail input and output makes the AD8546 ideal for dc gain and buffering of sensor front ends or high impedance input sources in wireless or remote sensors or transmitters. With its low power consumption and rail-to-rail input and output, the AD8546 is ideally suited for a variety of batterypowered, portable applications such as ECGs, pulse monitors, glucose meters, smoke and fire detectors, vibration monitors, and backup battery sensors. The AD8546 is specified over the extended industrial temperature range of -40C to +125C and is available in an 8-lead MSOP.
Table 1. Micropower Op Amps1
Amplifier Single 5V AD8500 ADA4505-1 AD8505 AD8541 AD8603 AD8502 ADA4505-2 AD8506 AD8542 AD8607 AD8504 ADA4505-4 AD8508 AD8544 AD8609 Supply Voltage 12 V to 16 V 36 V AD8663
Dual
AD8667 OP281
OP295 ADA4062-2
Quad
AD8669 OP481
OP495 ADA4062-4
1
See www.analog.com for the latest selection of micropower op amps.
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Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2011 Analog Devices, Inc. All rights reserved.
AD8546 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configuration ............................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics--2.7 V Operation ............................ 3 Electrical Characteristics--10 V Operation ............................. 4 Electrical Characteristics--18 V Operation ............................. 5 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution .................................................................................. 6 Typical Performance Characteristics ..............................................7 Applications Information .............................................................. 17 Input Stage ................................................................................... 17 Output Stage................................................................................ 18 Rail-to-Rail Input and Output .................................................. 18 Resistive Load ............................................................................. 18 Comparator Operation .............................................................. 18 4 mA to 20 mA Process Control Current Loop Transmitter 19 Outline Dimensions ....................................................................... 21 Ordering Guide .......................................................................... 21
REVISION HISTORY
1/11--Revision 0: Initial Version
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Rev. 0 | Page 2 of 24
AD8546 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS--2.7 V OPERATION
VSY = 2.7 V, VCM = VSY/2, TA = 25C, unless otherwise specified. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS Test Conditions/Comments VCM = 0 V to 2.7 V VCM = 0.3 V to 2.4 V; -40C TA +85C VCM = 0 V to 2.7 V; -40C TA +85C VCM = 0.3 V to 2.4 V; -40C TA +125C VCM = 0 V to 2.7 V; -40C TA +125C 1 -40C TA +125C Input Offset Current Input Voltage Range Common-Mode Rejection Ratio IOS -40C TA +125C CMRR VCM = 0 V to 2.7 V VCM = 0.3 V to 2.4 V; -40C TA +85C VCM = 0 V to 2.7 V; -40C TA +85C VCM = 0.3 V to 2.4 V; -40C TA +125C VCM = 0 V to 2.7 V; -40C TA +125C RL = 100 k; VO = 0.5 V to 2.2 V -40C TA +85C -40C TA +125C 0 60 59 57 58 49 92 75 65 75 Min Typ Max 3 4 5 4 12.5 10 2.6 20 500 2.7 Unit mV mV mV mV mV pA nA pA pA V dB dB dB dB dB dB dB dB V/C G pF pF V mV mA dB dB A A V/ms s kHz Degrees dB V p-p nV/Hz nV/Hz pA/Hz
Input Bias Current
IB
Large Signal Voltage Gain
AVO
105
Offset Voltage Drift Input Resistance Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Gain Bandwidth Product Phase Margin www..com Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
VOS/T RIN CINDM CINCM VOH VOL ISC ZOUT PSRR ISY RL = 100 k to VCM; -40C TA +125C RL = 100 k to VCM; -40C TA +125C f = 1 kHz; AV = +1 VSY = 2.7 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 1 M; CL = 10 pF; AV = +1 VIN = 1 V step; RL = 100 k; CL = 10 pF RL = 1 M; CL = 10 pF; AV = +1 RL = 1 M; CL = 10 pF; AV = +1 f = 10 kHz; RL = 1 M f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz 90 70 2.69
3 10 3.5 3.5
10 4 20 120 18 22 33
SR tS GBP M CS en p-p en in
38 14 170 69 105 6 60 56 0.1
Rev. 0 | Page 3 of 24
AD8546
ELECTRICAL CHARACTERISTICS--10 V OPERATION
VSY = 10 V, VCM = VSY/2, TA = 25C, unless otherwise specified. Table 3.
Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS Test Conditions/Comments VCM = 0 V to 10 V VCM = 0.3 V to 9.7 V; -40C TA +85C VCM = 0 V to 10 V; -40C TA +85C VCM = 0.3 V to 9.7 V; -40C TA +125C VCM = 0 V to 10 V; -40C TA +125C 2 -40C TA +125C Input Offset Current Input Voltage Range Common-Mode Rejection Ratio IOS -40C TA +125C CMRR VCM = 0 V to 10 V VCM = 0 V to 10 V; -40C TA +85C VCM = 0 V to 10 V; -40C TA +125C RL = 100 k; VO = 0.5 V to 9.5 V -40C TA +85C -40C TA +125C 0 70 70 60 95 90 67 88 Min Typ Max 3 4.2 5 8.5 12.5 15 2.6 30 500 10 Unit mV mV mV mV mV pA nA pA pA V dB dB dB dB dB dB V/C G pF pF V mV mA dB dB A A V/ms s kHz Degrees dB V p-p nV/Hz nV/Hz pA/Hz
Input Bias Current
IB
Large Signal Voltage Gain
AVO
115
Offset Voltage Drift Input Resistance Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density www..com Current Noise Density
VOS/T RIN CINDM CINCM VOH VOL ISC ZOUT PSRR ISY RL = 100 k to VCM; -40C TA +125C RL = 100 k to VCM; -40C TA +125C f = 1 kHz; AV = +1 VSY = 2.7 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 1 M; CL = 10 pF; AV = +1 VIN = 1 V step; RL = 100 k; CL = 10 pF RL = 1 M; CL = 10 pF; AV = +1 RL = 1 M; CL = 10 pF; AV = +1 f = 10 kHz; RL = 1 M f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz 90 70 9.98
3 10 3.5 3.5
20 11 15 120 18 22 33
SR tS GBP M CS en p-p en in
60 13 200 60 105 5 50 45 0.1
Rev. 0 | Page 4 of 24
AD8546
ELECTRICAL CHARACTERISTICS--18 V OPERATION
VSY = 18 V, VCM = VSY/2, TA = 25C, unless otherwise specified. Table 4.
Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS Test Conditions/Comments VCM = 0 V to 18 V VCM = 0.3 V to 17.7 V; -40C TA +85C VCM = 0 V to 18 V; -40C TA +85C VCM = 0.3 V to 17.7 V; -40C TA +125C VCM = 0 V to 18 V; -40C TA +125C 5 -40C TA +125C Input Offset Current Input Voltage Range Common-Mode Rejection Ratio IOS -40C TA +125C CMRR VCM = 0 V to 18 V VCM = 0.3 V to 17.7 V; -40C TA +85C VCM = 0 V to 18 V; -40C TA +85C VCM = 0.3 V to 17.7 V; -40C TA +125C VCM = 0 V to 18 V; -40C TA +125C RL = 100 k; VO = 0.5 V to 17.5 V -40C TA +85C -40C TA +125C 0 80 77 72 65 63 88 82 73 95 Min Typ Max 3 4.5 5 11 14 20 2.9 40 500 18 Unit mV mV mV mV mV pA nA pA pA V dB dB dB dB dB dB dB dB V/C G pF pF V mV mA dB dB A A V/ms s kHz Degrees dB V p-p nV/Hz nV/Hz pA/Hz
Input Bias Current
IB
Large Signal Voltage Gain
AVO
100
Offset Voltage Drift Input Resistance Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE www..com Voltage Noise Voltage Noise Density Current Noise Density
VOS/T RIN CINDM CINCM VOH VOL ISC ZOUT PSRR ISY RL = 100 k to VCM; -40C TA +125C RL = 100 k to VCM; -40C TA +125C f = 1 kHz; AV = +1 VSY = 2.7 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 1 M; CL = 10 pF; AV = +1 VIN = 1 V step; RL = 100 k; CL = 10 pF RL = 1 M; CL = 10 pF; AV = +1 RL = 1 M; CL = 10 pF; AV = +1 f = 10 kHz; RL = 1 M f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz 90 70 17.97
3 10 3.5 10.5
30 12 15 120 18 22 33
SR tS GBP M CS en p-p en in
70 12 200 60 105 5 50 45 0.1
Rev. 0 | Page 5 of 24
AD8546 ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec)
1
THERMAL RESISTANCE
Rating 20.5 V (V-) - 300 mV to (V+) + 300 mV 10 mA VSY Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages using a standard 4-layer board. Table 6. Thermal Resistance
Package Type 8-Lead MSOP (RM-8) JA 142 JC 45 Unit C/W
ESD CAUTION
The input pins have clamp diodes to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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Rev. 0 | Page 6 of 24
AD8546 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, unless otherwise noted.
40 35 VSY = 2.7V VCM = VSY/2 40 35 VSY = 18V VCM = VSY/2
NUMBER OF AMPLIFIERS
25 20 15 10 5 0
NUMBER OF AMPLIFIERS
09585-002
30
30 25 20 15 10 5 0
-2.4 -2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
-2.4 -2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VOS (mV)
VOS (mV)
Figure 2. Input Offset Voltage Distribution
Figure 5. Input Offset Voltage Distribution
12 VSY = 2.7V -40C TA +125C NUMBER OF AMPLIFIERS
12 VSY = 18V -40C TA +125C
10
NUMBER OF AMPLIFIERS
10
8
8
6
6
4
4
2
2
09585-003
TCVOS (V/C)
TCVOS (V/C)
Figure 3. Input Offset Voltage Drift Distribution
Figure 6. Input Offset Voltage Drift Distribution
3.0 2.5 2.0 1.5 1.0 VSY = 2.7V
3.0 2.5 2.0 1.5 1.0 VSY = 18V
VOS (mV)
VOS (mV)
0.5 0 -0.5
0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5
-1.0 www..com -1.5 -2.0 -2.5
09585-004
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
0
2
4
6
8
10
12
14
16
18
VCM (V)
VCM (V)
Figure 4. Input Offset Voltage vs. Common-Mode Voltage
Figure 7. Input Offset Voltage vs. Common-Mode Voltage
Rev. 0 | Page 7 of 24
09585-007
-3.0
-3.0
09585-006
0 0.2
0.4 0.6
0.8 1.0 1.2
1.4
1.6 1.8 2.0
2.2
2.4 2.6 2.8
3.0 3.2
3.4
3.6 3.8
4.0
0 0.2
0.4 0.6
0.8 1.0 1.2
1.4 1.6 1.8 2.0
2.2 2.4 2.6 2.8
3.0 3.2
3.4 3.6 3.8
4.0
0
0
09585-005
AD8546
3.0 2.5 2.0 1.5 1.0
VOS (mV)
3.0 VSY = 2.7V -40C TA +85C 2.5 2.0 1.5 1.0
VOS (mV)
VSY = 18V -40C TA +85C
0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
09585-008
0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 0 2 4 6 8 10 12 14 16 18
09585-011
-3.0
-3.0
VCM (V)
VCM (V)
Figure 8. Input Offset Voltage vs. Common-Mode Voltage
Figure 11. Input Offset Voltage vs. Common-Mode Voltage
3.0 2.5 2.0 1.5 1.0
VOS (mV)
VOS (mV)
VSY = 2.7V -40C TA +125C
8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 -1.0 -2.0 -3.0 -4.0 -5.0 -6.0
09585-009
VSY = 18V -40C TA +125C
0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
0
2
4
6
8
10
12
14
16
18
VCM (V)
VCM (V)
Figure 9. Input Offset Voltage vs. Common-Mode Voltage
Figure 12. Input Offset Voltage vs. Common-Mode Voltage
10000
VSY = 2.7V
10000 VSY = 18V 1000
1000
100
IB (pA)
10
IB (pA)
IB+ IB-
100
IB+ IB-
10
1
1
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50 75 TEMPERATURE (C) 100 125
09585-010
50
75 TEMPERATURE (C)
100
125
Figure 10. Input Bias Current vs. Temperature
Figure 13. Input Bias Current vs. Temperature
Rev. 0 | Page 8 of 24
09585-013
0.1 25
0.1 25
09585-012
-7.0 -8.0
AD8546
4 VSY = 2.7V 3 2 1 IB (nA) 0 -1 -2 -3 -4 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VCM (V) 125C 85C 25C
3 2 1 4 VSY = 18V
IB (nA)
0 -1 -2 -3 -4 0 2 4 6 8 10 12 14 16 18 VCM (V) 125C 85C 25C
Figure 14. Input Bias Current vs. Common-Mode Voltage
Figure 17. Input Bias Current vs. Common-Mode Voltage
10
10 VSY = 2.7V
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V)
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V)
VSY = 18V 1 -40C +25C +85C +125C
1 -40C +25C +85C +125C
100m
100m
10m
10m
1m
1m
0.1m
0.1m
0.01
0.1 1 LOAD CURRENT (mA)
10
100
09585-015
0.01
0.1 1 LOAD CURRENT (mA)
10
100
Figure 15. Output Voltage (VOH) to Supply Rail vs. Load Current
Figure 18. Output Voltage (VOH) to Supply Rail vs. Load Current
10
10 VSY = 2.7V
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (V)
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (V)
VSY = 18V 1 -40C +25C +85C +125C
1 -40C +25C +85C +125C
100m
100m
10m
10m
1m
1m
0.1m
0.1m
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0.01 0.1 1 LOAD CURRENT (mA) 10 100
09585-016
0.01
0.1 1 LOAD CURRENT (mA)
10
100
Figure 16. Output Voltage (VOL) to Supply Rail vs. Load Current
Figure 19. Output Voltage (VOL) to Supply Rail vs. Load Current
Rev. 0 | Page 9 of 24
09585-019
0.01m 0.001
0.01m 0.001
09585-018
0.01m 0.001
0.01m 0.001
09585-017
09585-014
AD8546
2.700 RL = 1M
18.000 RL = 1M
OUTPUT VOLTAGE, VOH (V)
2.699
17.995
OUTPUT VOLTAGE, VOH (V)
2.698
17.990
2.697 RL = 100k 2.696 VSY = 2.7V
09585-020
17.985 RL = 100k 17.980 VSY = 18V
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 20. Output Voltage (VOH) vs. Temperature
Figure 23. Output Voltage (VOH) vs. Temperature
6
VSY = 2.7V
12
VSY = 18V
5
OUTPUT VOLTAGE, VOL (mV)
OUTPUT VOLTAGE, VOL (mV)
10
RL = 100k
4
8
3
RL = 100k
6
2
4
1
RL = 1M
09585-021
2
RL = 1M
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 21. Output Voltage (VOL) vs. Temperature
Figure 24. Output Voltage (VOL) vs. Temperature
35 VSY = 2.7V 30 25
ISY PER AMP (A)
35 VSY = 18V 30 25 ISY PER AMP (A) 20 15 10 -40C +25C +85C +125C 0.9 1.2 1.5 1.8 2.1 2.4 2.7
09585-022
20 15 10 5
5 0
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0 0 0.3 0.6 VCM (V)
-40C +25C +85C +125C 0 3 6 9 VCM (V) 12 15 18
09585-025
Figure 22. Supply Current per Amplifier vs. Common-Mode Voltage
Figure 25. Supply Current per Amplifier vs. Common-Mode Voltage
Rev. 0 | Page 10 of 24
09585-024
0 -50
0 -50
09585-023
2.695 -50
17.975 -50
AD8546
35 30 25
ISY PER AMP (A)
60
50 VSY = 2.7V VSY = 18V
20 15 10 5 0 0 3 6 9 VSY (V) 12 15 18
ISY PER AMP (A)
40
30
20
-40C +25C +85C +125C
09585-026
10
-25
0
25 50 TEMPERATURE (C)
75
100
125
Figure 26. Supply Current per Amplifier vs. Supply Voltage
Figure 29. Supply Current per Amplifier vs. Temperature
60 PHASE 40
OPEN-LOOP GAIN (dB)
135 VSY = 2.7V RL = 1M 90
OPEN-LOOP GAIN (dB)
60 PHASE 40 VSY = 18V RL = 1M
135
90
0
GAIN
0
0 GAIN -20 CL = 10pF CL = 100pF
0
-20 CL = 10pF CL = 100pF
-45
-45
-40
-90
-40
-90
09585-027
10k
100k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 27. Open-Loop Gain and Phase vs. Frequency
Figure 30. Open-Loop Gain and Phase vs. Frequency
60 VSY = 2.7V 40 AV = +100
60 VSY = 18V 40 AV = +100
CLOSED-LOOP GAIN (dB)
20
AV = +10 AV = +1
CLOSED-LOOP GAIN (dB)
20
AV = +10 AV = +1
0
0
-20
-20
-40
-40
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09585-028
1k
10k FREQUENCY (Hz)
100k
1M
1k
10k FREQUENCY (Hz)
100k
1M
Figure 28. Closed-Loop Gain vs. Frequency
Figure 31. Closed-Loop Gain vs. Frequency
Rev. 0 | Page 11 of 24
09585-031
-60 100
-60 100
09585-030
-60 1k
-135 1M
-60 1k
-135 1M
PHASE (Degrees)
PHASE (Degrees)
20
45
20
45
09585-029
0 -50
AD8546
1000 AV = +100 AV = +10
1000 AV = +100 AV = +10
100
100
ZOUT ()
AV = +1
ZOUT ()
AV = +1
10
10
VSY = 2.7V
09585-032
VSY = 18V 100 1k 10k FREQUENCY (Hz) 100k
09585-035 09585-037 09585-036
1 100 1k 10k FREQUENCY (Hz) 100k
1
Figure 32. Output Impedance vs. Frequency
Figure 35. Output Impedance vs. Frequency
140 120 100 VSY = 2.7V VCM = 2.4V
140 120 100
CMRR (dB)
VSY = 18V VCM = VSY/2
CMRR (dB)
80 60 40 20 0 100
80 60 40 20 0 100
09585-033
1k
10k FREQUENCY (Hz)
100k
1M
1k
10k FREQUENCY (Hz)
100k
1M
Figure 33. CMRR vs. Frequency
Figure 36. CMRR vs. Frequency
100 VSY = 2.7V 80
100 VSY = 18V 80
PSRR (dB)
40
PSRR+ PSRR-
PSRR (dB)
60
60
40
PSRR+ PSRR-
20
20
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1k 10k FREQUENCY (Hz) 100k 1M
09585-034
0 100
0 100
1k
10k FREQUENCY (Hz)
100k
1M
Figure 34. PSRR vs. Frequency
Figure 37. PSRR vs. Frequency
Rev. 0 | Page 12 of 24
AD8546
70 60 50 OVERSHOOT (%) VSY = 2.7V VIN = 10mV p-p RL = 1M
70 60 50
OVERSHOOT (%)
VSY = 18V VIN = 10mV p-p RL = 1M
40 30 20 10 0 10 OS+ OS-
40 30 20 OS+ OS- 10 0 10
100
CAPACITANCE (pF)
1000
100 CAPACITANCE (pF)
1000
Figure 38. Small Signal Overshoot vs. Load Capacitance
Figure 41. Small Signal Overshoot vs. Load Capacitance
VSY = 1.35V AV = +1 RL = 1M CL = 100pF
VOLTAGE (500mV/DIV) VOLTAGE (5V/DIV)
VSY = 9V AV = +1 RL = 1M CL = 100pF
09585-039
TIME (100s/DIV)
TIME (100s/DIV)
Figure 39. Large Signal Transient Response
Figure 42. Large Signal Transient Response
VSY = 1.35V AV = +1 RL = 1M CL = 100pF
VOLTAGE (5mV/DIV) VOLTAGE (5mV/DIV)
VSY = 9V AV = +1 RL = 1M CL = 100pF
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TIME (100s/DIV)
09585-040
TIME (100s/DIV)
Figure 40. Small Signal Transient Response
Figure 43. Small Signal Transient Response
Rev. 0 | Page 13 of 24
09585-043
09585-042
09585-041
09585-038
AD8546
0 INPUT -0.2 OUTPUT VOLTAGE (V) INPUT VOLTAGE (V)
0
INPUT
VSY = 9V AV = -10 RL = 1M
INPUT VOLTAGE (V)
-0.4
VSY = 1.35V AV = -10 RL = 1M
-1 -2 10 5 OUTPUT 0
2 1 OUTPUT 0
09585-044
OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
09585-049 09585-048 09585-047
TIME (40s/DIV)
TIME (40s/DIV)
Figure 44. Positive Overload Recovery
Figure 47. Positive Overload Recovery
0.4 0.2
VSY = 1.35V AV = -10 RL = 1M
OUTPUT VOLTAGE (V)
2 1
VSY = 9V AV = -10 RL = 1M INPUT
INPUT VOLTAGE (V)
0
INPUT
INPUT VOLTAGE (V)
0
OUTPUT
0 -1 -2
OUTPUT
0 -5 -10
TIME (40s/DIV)
09585-045
TIME (40s/DIV)
Figure 45. Negative Overload Recovery
Figure 48. Negative Overload Recovery
INPUT
INPUT
VOLTAGE (500mV/DIV)
VSY = 2.7V RL = 100k CL = 10pF
VOLTAGE (500mV/DIV)
VSY = 18V RL = 100k CL = 10pF
+5mV 0 ERROR BAND OUTPUT -5mV
09585-046
+5mV 0 ERROR BAND OUTPUT -5mV
TIME (10s/DIV)
TIME (10s/DIV)
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Figure 49. Positive Settling Time to 0.1%
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AD8546
VSY = 2.7V RL = 100k CL = 10pF VOLTAGE (500mV/DIV)
VSY = 18V RL = 100k CL = 10pF
VOLTAGE (500mV/DIV)
INPUT
INPUT
+5mV OUTPUT ERROR BAND -5mV 0
+5mV OUTPUT ERROR BAND -5mV 0
09585-050
TIME (10s/DIV)
TIME (10s/DIV)
Figure 50. Negative Settling Time to 0.1%
Figure 53. Negative Settling Time to 0.1%
1000 VSY = 2.7V
VOLTAGE NOISE DENSITY (nV/ Hz)
1000 VSY = 18V
VOLTAGE NOISE DENSITY (nV/ Hz)
100
100
10
10
10
100
1k 10k FREQUENCY (Hz)
100k
1M
09585-051
10
100
1k 10k FREQUENCY (Hz)
100k
1M
Figure 51. Voltage Noise Density vs. Frequency
Figure 54. Voltage Noise Density vs. Frequency
VSY = 2.7V
VSY = 18V
VOLTAGE (2V/DIV)
09585-052
VOLTAGE (2V/DIV)
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TIME (2s/DIV)
TIME (2s/DIV)
Figure 52. 0.1 Hz to 10 Hz Noise
Figure 55. 0.1 Hz to 10 Hz Noise
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09585-055
09585-054
1
1
09585-053
AD8546
3.0
VSY = 2.7V VIN = 2.6V RL = 1M AV = +1
20 18 16 VSY = 18V VIN = 17.9V RL = 1M AV = +1
2.5
OUTPUT SWING (V)
2.0
OUTPUT SWING (V)
14 12 10 8 6 4 2
1.5
1.0
0.5
09585-056
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 56. Output Swing vs. Frequency
Figure 59. Output Swing vs. Frequency
100
10
VSY = 2.7V VIN = 0.2V rms RL = 1M AV = +1
100
VSY = 18V VIN = 0.5V rms RL = 1M AV = +1
10
1
THD + N (%)
THD + N (%)
1
0.1
0.1
09585-057
100
1k FREQUENCY (Hz)
10k
100k
100
1k FREQUENCY (Hz)
10k
100k
Figure 57. THD + N vs. Frequency
Figure 60. THD + N vs. Frequency
0 -20 VSY = 2.7V RL = 1M AV = -100 RL 1M 10k
0 -20
VSY = 18V RL = 1M AV = -100 RL
1M 10k
CHANNEL SEPARATION (dB)
CHANNEL SEPARATION (dB)
-40 -60 VIN = 0.5V p-p -80 -100 -120 VIN = 1.5V p-p VIN = 2.6V p-p
-40 -60 -80 -100 -120 -140 100 1k VIN = 1V p-p VIN = 5V p-p VIN = 10V p-p VIN = 15V p-p VIN = 17V p-p
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09585-058
100
1k
10k FREQUENCY (Hz)
100k
10k FREQUENCY (Hz)
100k
Figure 58. Channel Separation vs. Frequency
Figure 61. Channel Separation vs. Frequency
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09585-061
-140
09585-060
0.01 10
0.01 10
09585-059
0 10
0
AD8546 APPLICATIONS INFORMATION
The AD8546 is a low input bias current, micropower CMOS amplifier that operates over a wide supply voltage range of 2.7 V to 18 V. The AD8546 also employs unique input and output stages to achieve a rail-to-rail input and output range with a very low supply current. drain impedances contributes to the offset voltage of the amplifier. This problem is exacerbated at high temperatures due to the decrease in the threshold voltage of the input transistors. Refer to Figure 8, Figure 9, Figure 11, and Figure 12 for typical performance data. Current Source I1 drives the PMOS transistor pair. As the input common-mode voltage approaches the upper rail, I1 is steered away from the PMOS differential pair through the M5 transistor. The bias voltage, VB1, controls the point where this transfer occurs. M5 diverts the tail current into a current mirror consisting of the M6 and M7 transistors. The output of the current mirror then drives the NMOS transistor pair. Note that the activation of this current mirror causes a slight increase in supply current at high common-mode voltages (see Figure 22 and Figure 25). The AD8546 achieves its high performance by using low voltage MOS devices for its differential inputs. These low voltage MOS devices offer excellent noise and bandwidth per unit of current. Each differential input pair is protected by proprietary regulation circuitry (not shown in the simplified schematic). The regulation circuitry consists of a combination of active devices that maintain the proper voltages across the input pairs during normal operation and passive clamping devices that protect the amplifier during fast transients. However, these passive clamping devices begin to forward-bias as the common-mode voltage approaches either power supply rail. This causes an increase in the input bias current (see Figure 14 and Figure 17). The input devices are also protected from large differential input voltages by clamp diodes (D1 and D2). These diodes are buffered from the inputs with two 10 k resistors (R1 and R2). The differential diodes turn on whenever the differential voltage exceeds approximately 600 mV; in this condition, the differential input resistance drops to 20 k.
INPUT STAGE
Figure 62 shows the simplified schematic of the AD8546. The input stage comprises two differential transistor pairs, an NMOS pair (M1, M2) and a PMOS pair (M3, M4). The input commonmode voltage determines which differential pair turns on and is more active than the other. The PMOS differential pair is active when the input voltage approaches and reaches the lower supply rail. The NMOS pair is needed for input voltages up to and including the upper supply rail. This topology allows the amplifier to maintain a wide dynamic input voltage range and maximize signal swing to both supply rails. For the majority of the input common-mode voltage range, the PMOS differential pair is active. Differential pairs commonly exhibit different offset voltages. The handoff from one pair to the other creates a step-like characteristic that is visible in the VOS vs. VCM graphs (see Figure 4 and Figure 7). This characteristic is inherent in all rail-to-rail amplifiers that use the dual differential pair topology. Therefore, always choose a common-mode voltage that does not include the region of handoff from one input differential pair to the other. Additional steps in the VOS vs. VCM curves are also visible as the input common-mode voltage approaches the power supply rails. These changes are a result of the load transistors (M8, M9, M14, and M15) running out of headroom. As the load transistors are forced into the triode region of operation, the mismatch of their
V+ VB1 I1 M8 M9
M5 +IN x R1 D1 -IN x R2 M1 M2 D2 M3 M4
M10
M11 M16
VB2
OUT x
M17
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M12
M13
M7 V-
M6
M14
M15
Figure 62. Simplified Schematic
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AD8546
OUTPUT STAGE
The AD8546 features a complementary output stage consisting of the M16 and M17 transistors (see Figure 62). These transistors are configured in Class AB topology and are biased by the voltage source, VB2. This topology allows the output voltage to go within millivolts of the supply rails, achieving a rail-to-rail output swing. The output voltage is limited by the output impedance of the transistors, which are low RON MOS devices. The output voltage swing is a function of the load current and can be estimated using the output voltage to supply rail vs. load current diagrams (see Figure 15, Figure 16, Figure 18, and Figure 19). To avoid loading the output, use a larger feedback resistor, but consider the effect of resistor thermal noise on the overall circuit.
R2 +VSY
VIN
R1
AD8546
1/2
-VSY RL, EFF = RL || R2
VOUT RL
09585-064
Figure 64. Inverting Op Amp Configuration
RAIL-TO-RAIL INPUT AND OUTPUT
The AD8546 features rail-to-rail input and output with a supply voltage from 2.7 V to 18 V. Figure 63 shows the input and output waveforms of the AD8546 configured as a unity-gain buffer with a supply voltage of 9 V and a resistive load of 1 M. With an input voltage of 9 V, the AD8546 allows the output to swing very close to both rails. Additionally, it does not exhibit phase reversal.
INPUT OUTPUT VSY = 9V RL = 1M
Noninverting Configuration
Figure 65 shows the AD8546 in a noninverting configuration with a resistive load, RL, at the output. The actual load seen by the amplifier is the parallel combination of R1 + R2 and RL.
R2 +VSY
R1
AD8546
VIN
1/2
VOUT RL
09585-065
-VSY RL, EFF = RL || (R1 + R2)
VOLTAGE (5V/DIV)
Figure 65. Noninverting Op Amp Configuration
COMPARATOR OPERATION
An op amp is designed to operate in a closed-loop configuration with feedback from its output to its inverting input. Figure 66 shows the AD8546 configured as a voltage follower with an input voltage that is always kept at midpoint of the power supplies. The same configuration is applied to the unused channel. A1 and A2 indicate the placement of ammeters to measure supply current. ISY+ refers to the current flowing from the upper supply rail to the op amp, and ISY- refers to the current flowing from the op amp to the lower supply rail. As expected, Figure 67 shows that in normal operating condition, the total current flowing into the op amp is equivalent to the total current flowing out of the op amp, where ISY+ = ISY- = 36 A for the dual AD8546 at VSY = 18 V.
+VSY
TIME (200s/DIV)
Figure 63. Rail-to-Rail Input and Output
RESISTIVE LOAD
The feedback resistor alters the load resistance that an amplifier sees. It is, therefore, important to be aware of the value of the feedback resistors selected for use with the AD8546. The AD8546 is capable of driving resistive loads down to 100 k. The following two examples, inverting and noninverting configurations, show how the feedback resistor changes the actual load resistance seen at the output of the amplifier.
09585-063
A1
ISY+
Inverting Configuration
Figure 64 shows the AD8546 in an inverting configuration with a resistive load, RL, at the output. The actual load seen by the ampliwww..com fier is the parallel combination of the feedback resistor, R2, and the load, RL. The combination of a feedback resistor of 1 k and a load of 1 M results in an equivalent load resistance of 999 at the output. In this condition, the AD8546 is incapable of driving such a heavy load; therefore, its performance degrades greatly.
100k
AD8546
1/2
VOUT
100k
A2
ISY-
09585-066
-VSY
Figure 66. Voltage Follower Configuration
Rev. 0 | Page 18 of 24
AD8546
40 35
30 25 20 15 10 5
09585-067
ISY- ISY+
The AD8546 has input devices that are protected from large differential input voltages by Diode D1 and Diode D2 (see Figure 62). These diodes consist of substrate PNP bipolar transistors and conduct whenever the differential input voltage exceeds approximately 600 mV; however, these diodes also allow a current path from the input to the lower supply rail, thus resulting in an increase in the total supply current of the system. As shown in Figure 70, both configurations yield the same result. At 18 V of power supply, ISY+ remains at 36 A per dual amplifier, but ISY- increases to 140 A in magnitude per dual amplifier.
160 140
ISY PER DUAL AMPLIFIER (A)
0
ISY PER DUAL AMPLIFIER (A)
0
2
4
6
8 10 VSY (V)
12
14
16
18
120 100 80 60 40 20 0 ISY- ISY+
Figure 67. Supply Current vs. Supply Voltage (Voltage Follower)
In contrast to op amps, comparators are designed to work in an open-loop configuration and to drive logic circuits. Although op amps are different from comparators, occasionally an unused section of a dual op amp is used as a comparator to save board space and cost; however, this is not recommended. Figure 68 and Figure 69 show the AD8546 configured as a comparator, with 100 k resistors in series with the input pins. Any unused channels are configured as buffers with the input voltage kept at the midpoint of the power supplies.
+VSY
0
2
4
6
8
10
12
14
16
18
VSY (V)
Figure 70. Supply Current vs. Supply Voltage (AD8546 as a Comparator)
100k
A1
ISY+
AD8546
1/2
VOUT
Note that 100 k resistors are used in series with the input of the op amp. If smaller resistor values are used, the supply current of the system increases much more. For more information about using op amps as comparators, see the AN-849 Application Note, Using Op Amps as Comparators.
100k
A2
ISY-
09585-068
4 mA TO 20 mA PROCESS CONTROL CURRENT LOOP TRANSMITTER
A 2-wire current transmitter is often used in distributed control systems and process control applications to transmit analog signals between sensors and process controllers. Figure 71 shows a 4 mA to 20 mA current loop transmitter. The transmitter is powered directly from the control loop power supply, and the current in the loop carries signal from 4 mA to 20 mA. Thus, 4 mA establishes the baseline current budget within which the circuit must operate.
-VSY
Figure 68. Comparator A
+VSY
A1 100k
ISY+
AD8546
1/2
VOUT
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100k A2 ISY-
09585-069
The AD8546 is an excellent choice due to its low supply current of 33 A per amplifier over temperature and supply voltage. The current transmitter controls the current flowing in the loop, where a zero-scale input signal is represented by 4 mA of current and a full-scale input signal is represented by 20 mA. The transmitter also floats from the control loop power supply, VDD, whereas signal ground is in the receiver. The loop current is measured at the load resistor, RL, at the receiver side.
-VSY
Figure 69. Comparator B
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09585-070
AD8546
With a zero-scale input, a current of VREF/RNULL flows through R. This creates a current flowing through the sense resistor, ISENSE, determined by the following equation: ISENSE, MIN = (VREF x R)/(RNULL x RSENSE) With a full-scale input voltage, current flowing through R is increased by the full-scale change in VIN/RSPAN. This creates an increase in the current flowing through the sense resistor. ISENSE, DELTA = (Full-Scale Change in VIN x R)/(RSPAN x RSENSE) Therefore ISENSE, MAX = ISENSE, MIN + ISENSE, DELTA When R >> RSENSE, the current through the load resistor at the receiver side is almost equivalent to ISENSE. Figure 71 shows a design for a full-scale input voltage of 5 V. At 0 V of input, loop current is 3.5 mA, and at a full-scale input of 5 V, the loop current is 21 mA. This allows software calibration to fine-tune the current loop to the 4 mA to 20 mA range.
VIN 0V TO 5V RSPAN 200k 1% R1 68k 1% R2 2k 1%
The AD8546 and ADR125 together consume only 160 A quiescent current, making 3.34 mA current available to power additional signal conditioning circuitry or to power a bridge circuit.
VREF RNULL 1M 1% C2 C3 10F 0.1F
ADR125
VOUT VIN C4 C5 0.1F 10F GND
AD8546
R4 3.3k R3 1.2k C1 390pF
1/2
Q1 VDD 18V D1 4mA TO 20mA
RSENSE 100 1%
RL 100
NOTES 1. R1 + R2 = R.
Figure 71. 4 mA to 20 mA Current Loop Transmitter
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09585-072
AD8546 OUTLINE DIMENSIONS
3.20 3.00 2.80
3.20 3.00 2.80 PIN 1 IDENTIFIER
8
5
1
5.15 4.90 4.65
4
0.65 BSC 0.95 0.85 0.75 0.15 0.05 COPLANARITY 0.10 0.40 0.25 15 MAX 1.10 MAX 0.23 0.09 0.80 0.55 0.40
10-07-2009-B
6 0
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 72. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
ORDERING GUIDE
Model 1 AD8546ARMZ AD8546ARMZ-RL AD8546ARMZ-R7
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP]
Package Option RM-8 RM-8 RM-8
Branding A2V A2V A2V
Z = RoHS Compliant Part.
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AD8546 NOTES
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AD8546 NOTES
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AD8546 NOTES
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(c)2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09585-0-1/11(0)
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