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 Bidirectional 3.3 V Universal LVD Transceiver (G10TM)
Datasheet
LSI Logic's bidirectional transceiver for SCSI is used to transmit and receive data on a SCSI-2, SCSI-3 10 MHz, SCSI-3 ULTRA, or SCSI-3 ULTRA-2 single-ended or differential bus. The bus operates at rates up to 40 MHz, with a cable length up to 25 m and maximum stub lengths of 0.1 m. SCSI bus termination is assumed to be external to the SCSI device. This transceiver can operate with SCSI-2, SCSI-3 10-MHz interfaces, SCSI-3 Fast-20, or SCSI-3 Fast-40 interfaces. Typically, the single-ended or differential operating mode is controlled by a "DIFFSENSE" receiver, a description of which is included in this datasheet. This transceiver is implemented in G10 technology. This transceiver conforms to the Information Technology - SCSI-3 Parallel Interface Specification SPI-2 Project 1142D. Figure 1 SCSI Bus Interface
PC or Workstation
SCSI Host Adapter
Termination
Termination
FP
O
2
3
4
5 Target Devices
14
15
16
April 1998
Copyright (c) 1998 by LSI Logic Corporation. All rights reserved.
1
Features and Benefits
Complies with SCSI-3 SPI-2 Parallel
Interface Specification
On-chip 48 mA drivers 3.3 V VDD (5-volt-tolerant) Bidirectional I/O transceiver that provides
maximum flexibility in I/O path design
Complies with the American National
Standard for Information Systems SCSI-3 Fast-20
Reduces engineering effort of designing
an interconnect to SCSI bus
Available in the G10 cell-based product
families (0.35-micron drawn gate length, 0.29-micron effective channel length)
Has V/I characteristics that meet the
SCSI bus drive requirements
Transfer rates up to 40 MHz Active negation SE driver
Provides for direct silicon interconnect
to a SCSI transmission line
Specifications
The following subsections provide the specifications for the SCSI bidirectional universal LVD 3.3 V transceivers. Figure 2 shows the schematic symbol for the bidirectional universal LVD transceiver.
2
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Figure 2
TN EN A
Bidirectional Universal LVD Transceiver Logic Diagram
Single-Ended Portion Signal IOM Input Protection PIM
ZI POM NEG B DIFF
Signal + TNDIFF ENDIFF IOP
Input Protection POP + ZIDIFF PIP Differential Portion
Name: Description:
BDLVDSCSIF SCSI 3.3 V bidirectional transceiver used with the SCSI-2, SCSI-3 10 MHz, SCSI-3 FAST-20, and SCSI-3 FAST-40 Buses U(IOM, IOP, ZI, ZIDIFF, PORN, POP) = BDLVDSCSIF (IOM, IOP, A, B, EN, NEG, TN, ENDIFF, TNDIFF, PIM, PIP, DIFF, IDDTN, HTPLG)
Coding Syntax:
Silicon Dimensions: 285.6 m x 226.8 m
Bidirectional 3.3 V Universal LVD Transceiver (G10)
3
Cell Placement Restrictions
The following cells are designed to be used with G10 technology:
pvdd2_lvdscsi: To supply vdd2 apvdd_lvdscsi: To supply analog VDD apvss_lvdscsi: To supply analog VSS pvdd_lvdscsi: dvdd_lvdscsi:
To supply 3.3 V to the I/O
pvss2_lvdscsi: To supply vss2
Dummy cell for differential SCSI cells
dvddil_lvdscsi: Left dummy interface cell dvddir_lvdscsi: Right dummy interface cell
The first five cells in this list supply vdd2, avdd, avss, 3.3 V I/O, and vss2 to the SCSI buffers. The dvdd_lvdscsi, dvddil_lvdscsi, and dvddir_lvdscsi cells provide a protection diode between vddlvdscsi and vssio. Adhere to the following guidelines when placing these cells: 1. At least one dummy cell must be placed at both ends of the SCSI section. 2. There must be at least one pvdd_lvdscsi, apvdd_lvdscsi, and apvss_lvdscsi cell per five SCSI buffers; one VSS per two SCSI buffers.
Recommended Operating Conditions
Table 1 provides the recommended operating conditions for the bidirectional SCSI I/O Transceiver. Table 1
Symbol VDD Tj
Recommended Operating Conditions
Parameter DC Supply Voltage Junction Temperature Minimum 3.14 0 Typical 3.3 30 Maximum 3.46 125 Unit V C
4
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Table 2 provides the loading characteristics for the control portion of the bidirectional transceiver. Values are in standard loads. Table 2
A 3.5 B 1.2
Bidirectional Universal LVD Transceiver's Loading Characteristic1
EN 0.8 TN 1.5 ENDIFF TNDIFF 2.2 3.1 NEG 0.9 HTPLG 0.9 DIFF 9.8 IDDTN 5.5 PIM 13.9 PIP 1.6
1. One standard load = 0.0151775 pF.
Table 3 provides the AC timing for the bidirectional transceiver's input portion. These specifications are valid only for the commercial operating range: junction temperature = 0 C to 125 C, VDD = 3.3 V 5%. Table 3 Bidirectional Universal LVD Transceiver's AC Delay Characteristics for Transmitters (ns)
Capacitance Load (pF) Delay Path A to IOM Output tpLH tpHL tpZL tpLZ EN to IOM tpZH tpZL tpLZ tpHZ TN to IOM tpZH tpZL tpLZ tpHZ (Sheet 1 of 2) 15 3.98 3.79 6.87 10.18 2.61 6.93 10.20 1.49 2.41 6.79 10.11 1.38 50 4.77 4.58 7.66 9.95 4.14 7.72 9.97 1.49 4.19 7.59 9.88 1.38 85 5.48 5.19 8.36 9.74 5.91 8.42 9.76 1.49 5.96 8.29 9.67 1.38 100 5.77 5.42 8.64 9.67 6.67 8.70 9.69 1.49 6.72 8.57 9.59 1.38
Bidirectional 3.3 V Universal LVD Transceiver (G10)
5
Table 3
Bidirectional Universal LVD Transceiver's AC Delay Characteristics for Transmitters (ns), Continued
Capacitance Load (pF)
Delay Path ENDIFF to IOM
Output tpZH tpZL tpLZ tpHZ
15 1.68 5.08 3.97 5.51 1.71 5.00 3.89 5.43 4.80 5.45 2.58 4.62 8.74 8.74 2.60 4.58 8.66 8.66
50 3.08 7.27 3.97 5.51 3.10 7.22 3.89 5.43 5.36 6.04 3.90 7.35 8.74 8.74 3.84 7.32 8.66 8.66
85 4.25 9.60 3.97 5.51 4.24 9.56 3.88 5.43 5.88 6.66 4.72 9.98 8.75 8.75 4.65 9.96 8.67 8.66
100 4.69 10.60 3.96 5.51 4.67 10.56 3.88 5.43 6.11 6.93 5.04 11.12 8.75 8.75 4.96 11.11 8.67 8.67
TNDIFF to IOM
tpZH tpZL tpLZ tpHZ
A to IOP
tpLH tpHL
ENDIFF to IOP
tpZH tpZL tpLZ tpHZ
TNDIFF to IOP
tpZH tpZL tpLZ tpHZ
(Sheet 2 of 2) Note: VDD, = 3.3 V, 25 C. AC Timing measurements are made with Tr, Tf (0.5 V-2.3 V, 2.3 V-0.5 V) less than 6 ns.
.
6
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Table 4 provides the AC timing for the receiver portion of the bidirectional transceiver. These specifications are valid only for the commercial operating range: junction temperature = 0 C to 125 C, VDD = 3.3 V 5%. Table 4 Bidirectional Universal LVD Transceiver's AC Delay Characteristics for Receivers (ns)
Standard Load (pF) Delay Path IOM to ZI Output tpLH tpHL IOM to ZIDIFF tpLH tpHL IOP to ZIDIFF tpLH tpHL 0 0.55 0.28 1.64 1.91 1.68 1.88 2 0.58 0.31 1.67 1.95 1.71 1.91 4 0.61 0.34 1.70 1.98 1.73 1.94 8 0.67 0.39 1.74 2.03 1.78 1.99 12 0.72 0.43 1.78 2.07 1.81 2.03 16 0.78 0.43 1.81 2.11 1.85 2.08
SCSI Bidirectional LVD Transceiver, Single-Ended Mode
Input Portion of Bidirectional LVD Single-Ended Transceiver Table 5 provides the truth table for the input portion. Table 5 Bidirectional Transceiver's Input Portion Truth Table (Diff = 0), Single-Ended Mode
PIM X 0 1 ZI 0 1 1 POM 1 1 0
IOM 0 1 1
Bidirectional 3.3 V Universal LVD Transceiver (G10)
7
Table 6 lists the DC characteristics for the bidirectional transceiver's input portion. These specifications are valid only for the commercial operating range: junction temperature = 0 C to 125 C, VDD = 3.3 V 5%. Table 6 Bidirectional LVD Single-Ended Transceiver's Input Portion DC Characteristics for 3.3 V Signaling
Parameter Supply Voltage Input High Voltage Input Low Voltage Input Clamp Voltage Threshold, High to Low Threshold, Low to High Hysteresis Low Level Input Current High Level Input Current Hot Plug High Level Current Peak Pin Capacitance Input Resistance Junction Temperature Latch-up Current Electrostatic Discharge -2 V < Vpin < +8 V MIL-STD-883C, Method 3015.7, 100 pF at 1.5 k Vi = 0.5 V, Power ON or Power OFF, except during Hot Plug Vi = 2.7 V, Power ON or OFF, except during Hot Plug Transient duration to 10% of peak = 20 s. Applies during physical insertion only. Package included
1
Symbol VDD Vih Vil Vik Vth Vtl Vth-Vtl Iil Iih Iih.hp
Test Condition
Min 3.14
Typ 3.30 - - - - - 600 - - -
Max 3.46 5.25 1.0 -0.75 1.30 1.90 - 10 10 +1.5
Units V V V V V V mV A A mA
Signal FALSE State Referenced to VSS Signal TRUE State VDD = Min; Ii = -20 mA
1.9 -0.5 - 1.00 1.60 300 - - -
Cp Ri Tj Ilu ESD
2.6 - 0 - 2001
3.0 20 - - -
3.4 - 125 100 -
pF m C mA V
1. Absolute maximum of 8.0 V.
8
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Table 7 is the truth table for the output portion of the single-ended transceiver. Table 7
NEG 0 0 0 0 1 1 1 1 X
Bidirectional LVD Single-Ended Output Portion Truth Table
A X X 0 1 X X 0 1 X B 0 0 0 0 0 0 0 0 1 TN X 0 1 1 X 0 1 1 X EN 1 X 0 0 1 X 0 0 X IOM High Z High Z 0 1 High Z High Z 0 High Z X IOP 0 0 0 0 0 0 0 0 1
Bidirectional 3.3 V Universal LVD Transceiver (G10)
9
Table 8 provides the DC characteristics of the bidirectional LVD singleended output portion of the transceiver. Table 8 Bidirectional LVD Single-Ended Transceiver's Output Portion DC Characteristics for 3.3 V Signaling
Test Condition When Ioh = 48 mA Signal TRUE State Min 0.0 2.0 7.5 - Typ - - 19.2 - Max 0.5 3.24 19.5 10 Units V V mA A
Symbol Parameter Vol Voh Ioh lil Output Low Voltage
Output High Voltage When Ioh = -7 mA Signal FALSE State Output Current Low Level Input Current High Level Input Current Hot Plug High Level Current Peak Pin Capacitance Output Leakage Supply Voltage Junction Temperature Latch-up Current Electrostatic Discharge -2 V < Vpin < +8 V MIL-STD-883C, Method 3015.7, 100 pF at 1.5 k When Voh = 2 V High Z State: Vi = 0.5 V, Power ON or OFF, except during Hot Plug High Z State: Vi = 2.7 V, Power ON or OFF, except during Hot Plug High Z State: Transient duration to 10% of peak = 20 s. This applies to physical insertion only. Package included High Z State, VDD = max Vol and High Z only
lih
-
-
10
A
lih.hp
-
-
1.5
mA
Cp ll VDD Tj Ilu ESD
2.6 - 3.14 0 - 2001
3.0 - 3.30 - - -
3.4 10 3.46 125 100 -
pF A V C mA V
Figure 3 shows the timing test circuit for the single-ended output portion of the bidirectional transceiver. Figure 3 SCSI Output Timing (Rise Time) Test Circuit
Test Point 47 5% A SCSI Driver IOn 15 pF 5% Load Capacitance 2.5 V Source
10
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Input Portion of Bidirectional LVD Transceiver, Differential Mode Table 9 shows the truth table for the input portion of the bidirectional LVD transceiver.
.
Table 9
Bidirectional LVD Transceiver's Input Portion Truth Table, Differential Mode (Diff = 1)
IOP X X X X 1 0 IOP > IOM IOP > IOM IOP > IOM IOP > IOM IOM > IOP IOM > IOP IOM > IOP IOM > IOP ZDIFF Unspec Unspec Unspec Unspec Unspec Unspec 1 1 1 1 0 0 0 0 POM 1 0 1 Unspec Unspec Unspec 1 Unspec Unspec Unspec 1 Unspec Unspec Unspec PIM 0 1 1 X X X 0 1 X X 0 1 X X POP Unspec Unspec Unspec 1 0 1 Unspec Unspec 1 Unspec Unspec Unspec 1 Unspec PIP X X X 0 1 1 X X 0 1 X X 0 1
IOM X 1 0 X X X IOP > IOM IOP > IOM IOP > IOM IOP > IOM IOM > IOP IOM > IOP IOM > IOP IOM > IOP
Note: 1. X = don't care. 2. Unspec = Unspecified, an indeterminate output is acceptable. 3. IOM > IOP or IOM < IOP means that it is larger by the minimum sensitivity specified in the DC compliancy test table (Table 10).
Bidirectional 3.3 V Universal LVD Transceiver (G10)
11
Table 10 shows the DC compliancy specification for input levels to the differential transceiver. Table 10
Viom 0.715 0.685 1.815 1.785 3.6 0 3.955 -0.355
DC Compliancy Test Table
Viop 0.685 0.715 1.785 1.815 0 3.6 -0.355 3.955 Vis 0.03 -0.03 0.03 -0.03 3.6 -3.6 4.310 -4.310 Vicm 0.70 0.70 1.8 1.8 1.8 1.8 1.8 1.8 zidiff 0 1 0 1 0 1 0 1
Table 11 lists the DC characteristics for the input portion of the bidirectional transceiver. These specifications are valid only for the commercial operating range: junction temperature = 0 C to 125 C, VDD = 3.3 V 5%.
.
Table 11
Symbol VDD Cp Vist
Bidirectional Transceiver's Input DC Characteristics (Differential)
Parameter Supply Voltage Pin Capacitance Vis Threshold to detect a 1 or 0 Package included Measured with 0.7 V < Vicm < 1.8 V; see Figure 4. Test Condition Min 3.14 2.6 - Typ 3.30 3.0 - Max 3.46 3.4 30 Units V pF mV
Vid Tj Ilu ESD
Differential Input Voltage Max values of Vis Junction Temperature Latch-up Current Electrostatic Discharge -2 V < Vpin < +8 V MIL-STD-883C, Method 3015.7, 100 pF at 1.5 k
-4.31 0 - 2001
- - - -
+4.31 125 100 -
V C mA V
12
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Figure 4 shows the voltage and current definitions for the receiver portion of the bidirectional transceiver. Figure 4
IiVis ViVi+ Ii+ + Signal
Receiver Voltage and Current Definitions
- Signal R
Table 12 is the truth table for the output of the bidirectional LVD in Differential Mode. Table 12 Bidirectional LVD Output Portion Truth Table, Differential Mode (Diff = 1)
ENDIFF 1 X 0 0 A X X 0 1 IOM High Z High Z LOW HIGH IOP High Z High Z HIGH LOW
TNDIFF X 0 1 1
1. On a SCSI bus, a HIGH is negated, and a LOW is asserted.
Table 13 lists the DC characteristics for the output portion of the bidirectional transceiver. These specifications are valid only for the commercial operating range: junction temperature = 0 C to 125 C, VDD = 3.3 V 5%.
Bidirectional 3.3 V Universal LVD Transceiver (G10)
13
Table 13
Symbol VDD Tj Ilu Cp | VA | = | IOP - IOM | | Vn | = | IOP - IOM | | VA |
Bidirectional Transceiver's Output DC Characteristics (Differential)
Parameter Supply Voltage Junction Temperature Latch-up Current Pin Capacitance Differential Output Voltages (asserted) Differential Output Voltage (negated) Differential Output Voltage (asserted) Offset Voltage (asserted) Offset Voltage (negated) Difference in State Offset Voltage Driver Short Circuit Current Driver Open Circuit Voltage Differential Driver Rise and Fall Times Dynamic Output Signal Balance Driver /Receiver Output / Input Currents Electrostatic Discharge VDD = 0 V or VDD = 3.15 - 3.45 V MIL-STD-883C, Method 3015.7, 100 pF at 1.5 k V1 = 1.375 V, V2 = 0.807 V and V1 = 1.693 V, V2 = 1.125 V -2 V < Vpin < +8 V Package included V1 = 0.957 V, V2 = 0.535 V and V1 = 1.949 V, V2 = 1.527 V; see Figure 5 and Figure 6. V1 = 0.957 V, V2 = 0.535 V and V1 = 1.949 V, V2 = 1.527 V; see Figure 5 and Figure 6. For all combinations of V1 and V2 above; see Figures 5 and 6. Test Condition Min 3.14 0 - 2.6 270 Typ 3.30 - - 3.0 - Max 3.46 125 100 3.4 780 Units V C mA pF mV
260
-
640
mV
0.69 * | Vn | + 50 0.7 0.7 - - 0 1 - - 2001
-
1.45 * | Vn | - 65 1.8 1.8 50 <24 3.6 - 120 20 -
mV
Vcm Vcm* | Vcm - Vcm* | Io-s Io+s Vo-oc Vo+oc Tr / Tf Vcm (pk-pk)
| i- | | i+ |
- - - - - - - - -
V V mV mA V ns mV pk-pk A V
ESD
14
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Figure 5 shows the voltage and current definitions for the driver portion of the bidirectional transceiver. Figure 5 Driver Voltage and Current Definitions
- Signal
D
Io+
Vs VV+
Figure 6 shows the bidirectional transceiver's signalling sense. Figure 6
Logical 1 (Asserted) V+ Vcm (1.25 V Typical) VDriver output
LVD SCSI Signalling Sense
Logical 0 (Negated) Logical 1 (Asserted)
Vn V- _ V+ V bias 0 V (Differential) VA
Bidirectional 3.3 V Universal LVD Transceiver (G10)
15
DIFFSENSE Receiver
Name: Description: DIFFSENS The LVD SCSI DIFFSENSE Receiver detects the voltage level on the SCSI bus DIFFSENSE line and informs the device of the transmission mode used by the bus (see Figure 7). It is capable of detecting singleended, LVD SCSI, and HV differential modes. Z(HVD, LVD, SE) = DIFFSENS(IDDTN, DSIN) 96.6 m x 81.2 m
Coding Syntax: Silicon Dimensions:
Figure 7
LVD SCSI DIFFSENSE Receiver Logic Diagram
HVD LVD SE Sense Logic Input Protection DIFFSENSE
POP PIP
Table 14 provides the operating characteristics for the DIFFSENSE receiver. Table 14 DIFFSENSE Operating Truth Table
DIFFSENSE Input Voltage -0.5 V to 0.6 V 0.7 V to 1.9 V 2.2 V to 5.5 V 2.2 V to 5.5 V
PIP X X 0 1
SE 1 0 0 0
HVD 0 0 1 1
LVD 0 1 0 0
POP 1 Undefined 1 0
16
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Table 15 provides the DC characteristics for the DIFFSENSE receiver.
.
Table 15
DIFFSENSE DC Characteristics
Min 3.14 - 0 - 2001 Typ 3.30 4.5 - - - Max 3.46 - 125 100 - Units V pF C mA V -2 V < Vpin < + 8 V MIL-STD-883C, Method 3015.7, 100 pF at 1.5 k Package Included Test Condition
Symbol Parameter VDD Cp Tj Ilu ESD Supply Voltage Input Capacitance Junction Temperature Latch-up Current Electrostatic Discharge
Power On Reset Cell
Name: Description: SCSIPOR Provides power-up timing to the output and bidirectional cells. This cell must be used; only one is needed for all I/O transceivers. U(HTPLG) = SCSIPOR(); for 3.3 VDD 226.8 m high, 144.2 m wide
Coding Syntax: Silicon Dimensions:
Figure 8 shows the schematic symbol for the power on reset cell. Figure 8 Power On Reset Cell
V DD
HTPLG
Bidirectional 3.3 V Universal LVD Transceiver (G10)
17
Notes
18
Bidirectional 3.3 V Universal LVD Transceiver (G10)
Notes
Bidirectional 3.3 V Universal LVD Transceiver (G10)
19
Sales Offices and Design Resource Centers
LSI Logic Corporation Corporate Headquarters Tel: 408.433.8000 Fax: 408.433.8989 NORTH AMERICA California Irvine Tel: 714.553.5600 Fax: 714.474.8101 San Diego Tel: 619.613.8300 Fax: 619.613.8350 Silicon Valley Sales Office Tel: 408.433.8000 Fax: 408.954.3353 Design Center Tel: 408.433.8000 Fax: 408.433.7695 Colorado Boulder Tel: 303.447.3800 Fax: 303.541.0641 Florida Boca Raton Tel: 561.989.3236 Fax: 561.989.3237 Illinois Schaumburg Tel: 847.995.1600 Fax: 847.995.1622 Kentucky Bowling Green Tel: 502.793.0010 Fax: 502.793.0040 Maryland Bethesda Tel: 301.897.5800 Fax: 301.897.8389 Massachusetts Waltham Tel: 617.890.0180 Fax: 617.890.6158 Minnesota Minneapolis Tel: 612.921.8300 Fax: 612.921.8399 New Jersey Edison Tel: 732.549.4500 Fax: 732.549.4802 New York New York Tel: 716.223.8820 Fax: 716.223.8822 North Carolina Raleigh Tel: 919.783.8833 Fax: 919.783.8909 Oregon Beaverton Tel: 503.645.0589 Fax: 503.645.6612 Texas Austin Tel: 512.388.7294 Fax: 512.388.4171 Dallas Tel: 972.788.2966 Fax: 972.233.9234 Houston Tel: 281.379.7800 Fax: 281.379.7818 Washington Issaquah Tel: 425.837.1733 Fax: 425.837.1734 Canada Ontario Ottawa Tel: 613.592.1263 Fax: 613.592.3253 France LSI Logic S.A. Immeuble Europa Paris Tel: 33.1.34.63.13.13 Fax: 33.1.34.63.13.19 Germany LSI Logic GmbH Munich Tel: 49.89.4.58.33.0 Fax: 49.89.4.58.33.108 Stuttgart Tel: 49.711.13.96.90 Fax: 49.711.86.61.428 Hong Kong AVT Industrial Ltd Hong Kong Tel: 852.2428.0008 Fax: 852.2401.2105 India LogiCAD India Private Ltd Bangalore Tel: 91.80.526.2500 Fax: 91.80.338.6591 Israel LSI Logic Ramat Hasharon Tel: 972.3.5.403741 Fax: 972.3.5.403747 Netanya Tel: 972.9.657190 Fax: 972.9.657194 Italy LSI Logic S.P.A. Milano Tel: 39.39.687371 Fax: 39.39.6057867 Japan LSI Logic K.K. Tokyo Tel: 81.3.5463.7821 Fax: 81.3.5463.7820 Singapore LSI Logic Pte Ltd Singapore Tel: 65.334.9061 Fax: 65.334.4749 Spain LSI Logic S.A. Madrid Tel: 34.1.556.07.09 Fax: 34.1.556.75.65 Sweden LSI Logic AB Stockholm Tel: 46.8.444.15.00 Fax: 46.8.750.66.47 Switzerland LSI Logic Sulzer AG Brugg/Biel Tel: 41.32.536363 Fax: 41.32.536367 Taiwan LSI Logic Asia-Pacific Taipei Tel: 886.2.718.7828 Fax: 886.2.718.8869 Cheng Fong Technology Corporation Tel: 886.2.910.1180 Fax: 886.2.910.1175 Jeilin Technology Corporation, Ltd. Tel: 886.2.248.4828 Fax: 886.2.242.4397 Lumax International Corporation, Ltd Tel: 886.2.788.3656 Fax: 886.2.788.3568 Macro-Vision Technology Inc. Tel: 886.2.698.3350 Fax: 886.2.698.3348 United Kingdom LSI Logic Europe Ltd Bracknell Tel: 44.1344.426544 Fax: 44.1344.481039
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Sales Offices with
Design Resource Centers
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Printed on Recycled Paper
This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified the functional descriptions or electrical and mechanical specifications using production parts. LSI Logic logo design is a registered trademark and G10 is a trademark of LSI Logic Corporation. All other brand and product names may be trademarks of their respective companies.
Printed in USA Order No. B15058.A Doc. No. DB08-000079-01
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