1 SY88793V micrel 3.3v/5v 622mbps pecl low-power limiting post amplifier w/ttl signal detect SY88793V rev.: a amendment: /0 issue date: march 2003 typical applications circuit applications 622mbps sonet/sdh small form factor transceivers high-gain line driver and line receiver single 3.3v or 5v power supply up to 622mbps operation low noise pecl data outputs chatter-free ttl signal detect (sd) output ttl en input programmable sd level set (sd lvl ) available in a tiny 10-pin msop (3mm) package features description the SY88793V low-power limiting post amplifier is designed for use in fiber optic receivers. the device connects to typical transimpedance amplifiers (tias). the linear signal output from tias can contain significant amounts of noise and may vary in amplitude over time. the SY88793V quantizes these signals and outputs pecl level waveforms. the SY88793V operates from a single +3.3v or +5v power supply, over temperatures ranging from ?0 c to +85 c. with its wide bandwidth and high gain, signals with data rates up to 622mbps and as small as 5mvp-p can be amplified to drive devices with pecl inputs. the SY88793V generates a ttl sd output. a programmable signal-detect level set pin (sd lvl ) sets the sensitivity of the input amplitude detection. sd asserts high if the input amplitude rises above the threshold set by sd lvl and deasserts low otherwise. en deasserts the true output signal without removing the input signal. typically 6db sd hysteresis is provided to prevent chattering. v cc en gnd gnd to cdr SY88793V 100k ? 0.1 f from transimpedance amp. d out /d out v ref v cc sd lvl d in /d in 0.1 f 0.1 f 0.1 f 0.1 f sd 50 ? 50 ? r pd r pd for 3.3v, r pd = 120 ? for 5v, r pd = 220 ?
2 SY88793V micrel package/ordering information ordering information package operating package part number type range marking SY88793Vkc k10-1 commercial 793v SY88793Vkctr* k10-1 commercial 793v SY88793Vki k10-1 industrial 793v SY88793Vkitr* k10-1 industrial 793v *tape and reel pin description pin number pin name type pin function 1 en ttl input: enable: deasserts true data output when high. default is high. 2 din data input true data input. 3 /din data input complementary data input. 4 vref reference voltage. 5 sdlvl input signal-detect level set: a resistor from this pin to v cc sets the threshold for the data input amplitude at which sd will be asserted. 6 gnd ground device ground. 7 sd open-collector signal-detect: asserts high when the data input amplitude rises above ttl output w/ the threshold set by sd lvl . internal 6.75k ? pullup resistor 8 /dout pecl output complementary data output. 9 dout pecl output true data output. 10 vcc power supply positive power supply. sdlvl gnd 6 5 1 en din /din vref 10 vcc dout /dout sd 9 8 7 2 3 4 10-pin msop (k10-1)
3 SY88793V micrel absolute maximum ratings (note 1) supply voltage (v cc ) ....................................... 0v to +7.0v input voltage (d in , /d in ) .........................................0 to v cc output current (i out ) continuous ............................................................. 50ma surge .................................................................... 100ma en voltage ............................................................. 0 to v cc v ref current ......................................... 800 a to +500 a sd lvl voltage ................................................. v ref to v cc storage temperature (t s ) ....................... 55 c to +125 c operating ratings (note 2) supply voltage (v cc ) .............................. +3.0v to +3.6v or ............................................................ +4.5v to +5.5v ambient temperature (t a ), note 3 ............ 40 c to +85 c junction temperature (t j ), note 3 .......... 40 c to +120 c package thermal resistance msop ( ja ) still-air .................................................. 113 c/w ( jb ) still-air .................................................... 74 c/w v cc = 3.0v to 3.6v or 4.5v to 5.5v; r load = 50 ? to v cc 2v; t a = 40 c to +85 c; typical values at v cc = 3.3v, t a = 25 c. symbol parameter condition min typ max units i cc power supply current no output load 25 42 ma sd lvl sd lvl voltage v ref v cc v v ih en input high voltage 2.0 v v il en input low voltage 0.8 v i ih en input high current v in = 2.7v 20 a v in = v cc 100 a i il en input low current v in = 0.5v 0.3 ma v oh sd output high level v cc > 3.3v 2.4 v v cc < 3.3v 2.0 v v ol sd output low level i ol = +2ma 0.5 v v oh pecl output high voltage 50 ? to v cc 2v output load v cc 1.085 v cc 0.955 v cc 0.880 v v ol pecl output low voltage 50 ? to v cc 2v output load v cc 1.830 v cc 1.705 v cc 1.555 v v offset differential output offset 100 mv v ihcmr common mode range note 2 gnd +1.7 v cc v v ref reference voltage note 3 v cc 1.38 v cc 1.32 v cc 1.26 v note 1. specification for packaged product only. note 2. the v ihcmr range is referenced to the most positive side of the differential input signal. note 3. the current provided into or from v ref must be limited to 800 a source and 500 a sink. dc electrical characteristics (note 1) note 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional operati on is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximu m ratlng conditions for extended periods may affect device reliability. note 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. note 3. commercial devices are guaranteed from 0 c to +85 c ambient temperature.
4 SY88793V micrel v cc = 3.0v to 3.6v or 4.5v to 5.5v; r load = 50 ? to v cc 2v; t a = 40 c to +85 c; typical values at v cc = 3.3v, t a = 25 c. symbol parameter condition min typ max units hys sd hysteresis electrical signal 2 4.6 8 db t off sd release time 0.1 0.5 s t on sd assert time 0.2 0.5 s t r ,t f differential output rise/fall time 400 ps (20% to 80%) v id differential input voltage swing 5 1800 mvp-p v od differential output voltage swing v id 18mvp-p 1500 mvp-p v id = 5mvp-p 400 mvp-p v sr sd sensitivity range 5 50 mvp-p a v(diff) differential voltage gain 38 db b 3db 3db bandwidth 700 mhz s 21 single-ended small-signal gain 26 32 db note 1. specification for packaged product only. ac electrical characteristics (note 1) typical operating characteristics 0 20 40 60 80 100 120 140 1 10 100 1000 10000 100000 v id (mvp-p) r sdlvl ( ? ) v sup = 3.3v t a = 25 c 622mbps pattern 2 23 1 assert deassert sd assert and deassert levels vs. r sdlvl 0 20 40 60 80 100 120 0 0.2 0.4 0.6 0.8 1 1.2 1. 4 v id (mvp-p) sd lvl (referenced to v cc ) (v) v sup = 3.3v t a = 25 c 622mbps pattern 2 23 1 assert deassert sd assert and deassert levels vs. sd lvl
5 SY88793V micrel detailed description the SY88793V low-power limiting post amplifier operates from a single +3.3v or +5v power supply, over temperatures from 40 c to +85 c. signals with data rates up to 622mbps and as small as 5mvp-p can be amplified. figure 1 shows the allowed input voltage swing. the SY88793V generates an sd output. sd lvl sets the sensitivity of the input amplitude detection. input amplifier/buffer figure 2 shows a simplified schematic of the SY88793V's input stage. the high-sensitivity of the input amplifier allows signals as small as 5mvp-p to be detected and amplified. the input amplifier allows input signals as large as 1800mvp-p. input signals are linearly amplified with a typically 38db differential voltage gain. since it is a limiting amplifier, the SY88793V outputs typically 1500mvp-p voltage-limited waveforms for input signals that are greater than 18mvp-p. applications requiring the SY88793V to operate with high-gain should have the upstream tia placed as close as possible to the SY88793V s input pins to ensure the best performance of the device. output buffer the SY88793V s pecl output buffer is designed to drive 50 ? lines. the output buffer requires appropriate termination for proper operation. an external 50 ? resistor to v cc 2v for each output pin provides this. figure 3 shows a simplified schematic of the output stage and includes an appropriate termination method. signal-detect the SY88793V generates a chatter-free sd open-collector ttl output with internal 6.75k ? pullup resistor as shown in figure 4. sd is used to determine that the input amplitude is large enough to be considered a valid input. sd asserts high if the input amplitude rises above the threshold set by sd lvl and deasserts low otherwise. sd can be fed back to the enable (en) input to maintain output stability under a loss of signal condition. en deasserts the true output signal without removing the input signals. typically 6db sd hysteresis is provided to prevent chattering. signal-detect level set a programmable sd level set pin (sd lvl ) sets the threshold of the input amplitude detection. connecting an external resistor between v cc and sd lvl sets the voltage at sd lvl . this voltages ranges from v cc to v ref . the external resistor creates a voltage divider between v cc and v ref as shown in figure 5. if desired, an appropriate external voltage may be applied rather than using a resistor. the smaller the external resistor, implying a smaller voltage difference from sd lvl to v cc , the smaller the sd sensitivity. hence, larger input amplitude is required to assert sd. typical operating characteristics shows the relationship between the input amplitude detection sensitivity and the sd lvl voltage. hysteresis the SY88793V provides typically 6db sd electrical hysteresis. by definition, a power ratio measured in db is 10log(power ratio). power is calculated as v 2 in /r for an electrical signal. hence the same ratio can be stated as 20log(voltage ratio). while in linear mode, the electrical voltage input changes linearly with the optical power and hence the ratios change linearly. therefore, the optical hysteresis in db is half the electrical hysteresis in db given in the datasheet. the SY88793V provides typically 3db sd optical hysteresis. as the SY88793V is an electrical device, this datasheet refers to hysteresis in electrical terms. with 6db sd hysteresis, a voltage factor of two is required to assert or deassert sd.
6 SY88793V micrel data+ 2.5mv (min.) 900mv (max.) 5mvp-p (min.) 1800mvp-p (max.) data (data+) (data ) v is (mvp-p) v id (mvp-p) figure 1. v is and v id definitions gnd v cc esd structure /d in d in figure 2. input structure gnd v cc /d out esd structure d out figure 3. output structure r sdlvl sd lv l v cc v ref 3k ? sd 6.75k ? v cc figure 4. sd output structure
7 SY88793V micrel functional block diagram layout and pcb design since the SY88793V is a high-frequency component, performance can be largely determined by the board layout and design. a common problem with high-gain amplifiers is the feedback from the large swing outputs to the input via the power supply. design procedure the SY88793V s ground pin should be connected to the circuit board ground. use multiple pcb vias close to the part to connect to ground. avoid long, inductive runs which can degrade performance. limiting amplifer pecl buffer gnd enable level detect en sd d in /d in v ref v cc sd lv l d out /d out
8 SY88793V micrel 10 lead msop (k10-1) rev. 00 micrel, inc. 1849 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 944-0970 web http://www.micrel.com the information furnished by micrel in this datasheet is believed to be accurate and reliable. however, no responsibility is as sumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2003 micrel, incorporated.
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