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specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage conditi on (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 32812 sy/31412 sy 20120217-s0002 no.a2027-1/12 LV5604TA overview the LV5604TA is a eight-channel switching regulator controller. features ? low-voltage (3v) operation ? reference voltage precision : 1% ? independent standby functions for each of the eight channels ? is capable of driving mos transistors ? synchronous rectification : channel 1 and channel 2 ? supports inverting step-up operation. specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 16 v allowable power dissipation pd max 1w operating temperature topr -30 to +85 c storage temperature tstg -55 to +125 c caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of absolu te maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of the ic may be degraded. please contact us for the further details. recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage v cc 3 to 15 v supply voltage vbias 3 to 15 v timing resistor rt 7 to 30 k timing capacitor ct 100 to 1000 pf triangle wave frequency f osc 0.1 to 1.3 mhz bi-cmos lsi eight-channel switching regulator controller orderin g numbe r : ena2027a
LV5604TA no.a2027-2/12 electrical characteristics at ta = 25c, v cc = vbias = 3.6v, scp = 0v parameter symbol conditions ratings unit min typ max error amplifier 1 in + pin internal bias voltage vb value added to the error amplifier offset at the error amplifier + side voltage 0.509 0.515 0.521 v output low voltage ch1 to ch8 v low fb in - = 2.0v, ifb = 20 a 0.2 v output high voltage ch1 to ch8 v hi fb in - = 0v ifb1 = -20 a 2.0 v error amplifier 2 in5 - re pin offset voltage vof -6 6 mv output low voltage v low fb5re in5 - re = 2.0v, ifb = 20 a 0.2 v output high voltage v hi fb5re fb5re ; h, ifb = 500 a 1.95 v protection circuit threshold voltage v scp 1.1 1.25 1.4 v scp pin current i scp 4 a short circuit detection signal pin vscpout open collector iscpout = 100 a 0.2 v software start block (ch1 to ch8) soft start current ch1 to ch8 i sf csoft1 to 8 = 0v 3.2 4 4.8 a soft start resistance ch1 to ch8 r sf 160 200 240 k fixed duty maximum on duty 1 ch1 to ch4 duty max 1 to 4 out monitor, in - = 0v 100 % maximum on duty 2 ch5 duty max 5 out monitor, in - = 0v 80 85 90 % maximum on duty 3 ch6 to ch8 duty max 6 to 8 out monitor, in - = 0v 80 85 90 % output block 1 to 6 out pin high side on resistance r out sour i o = 10ma 25 out pin high side on resistance r out sink i o = 10ma 10 triangle wave oscillator block current setting pin voltage vt rt rt = 10k 0.57 v output current i oh ct 220 a output current ratio i o ct ct pin, isource/isink 2.5 oscillation frequency f osc 1 rt = 10k , ct = 270pf 390 490 570 khz reference voltage block reference voltage vref 1.230 v line regulation v ln ref v cc = 3v to 15v 10 mv control circuit on state voltage v on ctl 2.0 v off state voltage v off ctl 0.6 v pin input current i in ctl vctl = 2v 60 a standby circuit on voltage v on stby 2.0 v off voltage v off stby 0.6 v pin input current i in stby vstby = 2v 60 a all circuits v cc current consumption i cc in1 - to in8 - = 1v 6 7.5 ma standby mode current consumption i off vstby = vctl = 0v i off = i cc + i bias 1 a
LV5604TA no.a2027-3/12 package dimensions unit : mm (typ) 3425 pin assignment 0 0.8 1 0.4 0.6 0.2 1.2 ? 30 ? 20 80 40 60 20 0 100 0.40 pd max -- ta ambient temperature, ta - c allowable power dissipation, pd max - w specified board : 50.0 50.0 1.6mm 3 glass epoxy sanyo : tqfp64(7x7) 9.0 9.0 0.5 7.0 7.0 0.1 12 64 0.125 0.18 0.4 (0.5) 1.2 max (1.0) LV5604TA 64 sync1 63 (nc) 62 out1n 61 out1 60 out2 59 out2n 58 gnd_p1(vs1) 57 out3 56 out4 55 out5 54 gnd_p2(vs2) 53 out6 52 out7 51 out8 50 (nc) 49 clk_out 17 in3 - 16 fb2 15 in2 - 14 fb1 13 in1 - 12 scp_out 11 scp 10 csoft4 9 csoft3 8 csoft2 7 csoft1 6 stby4 5 stby3 4 stby2 3 stby1 2 vbias1 1 sync2 33 fb7 34 in8 - 35 fb8 36 sel_ch8 37 ctl 38 csoft5 39 csoft6 40 csoft7 41 csoft8 42 stby5 43 stby6 44 stby7 45 stby8 46 v cc 47 vbias2 48 clk_in 18 fb3 19 in4 - 20 fb4 21 ct 22 rt 23 vref 24 gnd_s 25 in5 - 26 fb5 27 fb5re 28 in5 - re 29 in5 + re 30 in6 - 31 fb6 32 in7 - top view
LV5604TA no.a2027-4/12 block diagram and sample application circuit signal system power supply v cc vbat fb1a step-down (down) v o 1 3.3v/100ma v o 2 3.3v/100ma out1 out1n sync1 + - - vref fb1a in1 - fb1 csoft1 ct clk_in clk_out rt stby8 stby7 stby6 stby5 stby4 stby3 stby2 stby1 gnd_s ctl scp_out scp (nc) (nc) scp fb2a step-down (down) out2 sync2 out3 out4 out2n + - - fb2a in2 - fb2 csoft2 fb3a step-down (down) + - - fb3a in3 - fb3 csoft3 in4 - fb4 csoft4 v o 2 3.3v/100ma fb4a step-down (down) + - - gnd_p(vs1) vbias2 fb4a in5 - re in5 + re fb5re in5 - fb5 csoft5 v o 3 -4v/100ma fb5a fb6a fb8a fb7a inversion (invent) in6 - fb6 csoft6 fb6a out5 + - - fb5a + - in7 - fb7 csoft7 fb7a on/off setting gnd_p(vs2) out8 out7 out6 sel_ch8 in8 - fb8 csoft8 step-up (up) + - - + - - + - - + + - + + - + + - + + - + + - + + - + + - + + - fb8a on/off setting step-up (up) on/off setting step-up (up) ctl clk stby osc pre-output stage power supply vbias1 sync1 l: synchronous rectification h: diode rectification sync2 l: synchronous rectification h: diode rectification sel_ch8 mode step-down; connect to vbias step-up; connect to gnd2 channel 8 step-up/step-down is selected by sel_ch8
LV5604TA no.a2027-5/12 pin function block pin no. pin name functions ch1 (step-down) 3 stby1 standby input. h/ch1 ; on, l/ch1 ; off 13 in1 - error amplifier inverting input 14 fb1 error amplifier output 61 out1 output. external transistor p-channel gate connect 62 out1n output. external transistor n-channel gate connection 7 csoft1 soft start setting capacitor connec tion. connect to gnd through a capacitor. ch2 (step-down) 4 stby2 standby input. h/ch2 ; on, l/ch2 ; off 15 in2 - error amplifier inverting input 16 fb2 error amplifier output 60 out2 output. external transistor p-channel gate connection 59 out2n output. external transistor n-channel gate connection 8 csoft2 soft start setting capacitor con nection. connect to gnd through a capacitor. ch3 (step-down) 5 stby3 standby input. h/ch3 ; on, l/ch3 ; off 17 in3 - error amplifier inverting input 18 fb3 error amplifier output 9 csoft3 soft start setting capacitor con nection. connect to gnd through a capacitor. 57 out3 output. external transistor p-channel gate connection ch4 (step-down) 6 stby4 standby input. h/ch4 ; on, l/ch4 ; off 19 in4 - error amplifier inverting input 20 fb4 error amplifier output 10 csoft4 soft start setting capacitor con nection. connect to gnd through a capacitor. 56 out4 output. external transistor p-channel gate connection ch5 (inversion) 42 stby5 standby input. h/ch5 ; on, l/ch5 ; off 28 in5 - re inversion step-up error amplifier, - (inverting) input 29 in5 + re inversion step-up error amplifier, + (noninverting) input 27 fb5re inversion step-up error amplifier output 25 in5 - error amplifier inverting input 26 fb5 error amplifier output 38 csoft5 soft start setting capacitor con nection. connect to gnd through a capacitor. 55 out5 output. external transistor p-channel gate connection ch6 (step-up) 43 stby6 standby input. h/ch6 ; on, l/ch6 ; off 30 in6 - error amplifier inverting input 31 fb6 error amplifier output 39 csoft6 soft start setting capacitor con nection. connect to gnd through a capacitor. 53 out6 output. external transistor n-channel gate connection ch7 (step-up) 44 stby7 standby input. h/ch7 ; on, l/ch7 ; off 32 in7 - error amplifier inverting input 33 fb7 error amplifier output 40 csoft7 soft start setting capacitor con nection. connect to gnd through a capacitor. 52 out7 output. external transistor n-channel gate connection ch8 (step-down) (step-up) 45 stby8 standby input. h/ch8 ; on, l/ch8 ; off 34 in8 - error amplifier inverting input 35 fb8 error amplifier output 41 csoft8 soft start setting capacitor con nection. connect to gnd through a capacitor. 51 out8 output. external transistor (step-up / n-channel, step-down / p-channel) gate connection continued on next page.
LV5604TA no.a2027-6/12 continued from preceding page. block pin no. pin name functions mode 64 sync1 synchronous rectification/diode rectification switching, l : synchronou s rectification h : diode rectification 1 sync2 synchronous rectification/diode re ctification switching, l : synchronous rectification h : diode rectification 36 sel_ch8 channel 8 step-up/step-down switching, l (gnd) : step-up h (vbias2) : step-down power 46 v cc power supply input (signal system) 2 vbias1 power supply input (ch1 to ch4, pre-output stage) 47 vbias2 power supply input (ch5 to ch8, pre-output stage) 24 gnd_s ground (signal system) 58 gnd_p1 (vs1) ground (ch1 to ch4, pre-output stage) 54 gnd_p2 (vs2) ground (ch5 to ch8, pre-output stage) 23 vref reference voltage output control 37 ctl power supply control 11 scp connection pin for the delay time setting capacitor of short circuit detection circuit 12 scp_out short circuit detection circuit output osc 21 ct triangle wave oscillation frequency setting capacitor connection 22 rt triangle wave oscillation frequency setting resistor connection 48 clkin external clock input 49 clkout clock output other 63 (nc) no connection 50 (nc) no connection
LV5604TA no.a2027-7/12 equivalent circuits pin no. pin name description equivalent circuit 37 3 4 5 6 42 43 44 45 ctl stby1 stby2 stby3 stby4 stby5 stby6 stby7 stby8 ctl : controls operation of all channels. stby* : independently controls operation of the corresponding channel. operation is high active. high : circuit operation on low : circuit operation off 13 15 17 19 25 30 32 34 in1 - in2 - in3 - in4 - in5 - in6 - in7 - in8 - error amplifier inverting input. the regulator output is divided by a resistor and connected to in* - 14 16 18 20 26 31 33 35 fb1 fb2 fb3 fb4 fb5 fb6 fb7 fb8 error amplifier output. these pins, in combination with in* - , configure the error amplifier filters 29 28 in5 + re in5 - re inversion step-up (channel 5) error amplifier input. these pins, in combination with fb5r, configure the operational amplifier (independent) 27 fb5re inversion step-up (channel5) error amplifier output. this pin, in combination with in5 + re and in5 - re, configures the operational amplifier (independent). 7 8 9 10 38 39 40 41 csoft1 csoft2 csoft3 csoft4 csoft5 csoft6 csoft7 csoft8 soft start. connect to gnd via a capacitor to set the soft start time. continued on next page. ctl/stby* 120k 30k 500 5k 5k in* - gnd_s vreg (internal constan t voltage) 500 20 fb* gnd_s vreg (internal constant voltage) 500 500 5k 5k in5 - re in5 + re gnd_s vreg (internal constan t voltage) fb5re gnd_s vreg (internal constan t voltage) vreg (internal constant voltage) gnd_s 500 10k 200k csoft*
LV5604TA no.a2027-8/12 continued from preceding page. pin no. pin name description equivalent circuit 61 62 60 59 57 56 55 53 52 51 out1 out1n out2 out2n out3 out4 out5 out6 out7 out8 output. connect external fet. 22 rt connect to gnd through a resistor. this pin, together with ct, sets the oscillation frequency. 21 ct connect to gnd through a capacitor. this pin, together with rt, sets the oscillation frequency. 11 scp connect to gnd via a capacitor to set the short circuit detection circuit delay time. 12 scp_out short circuit detection circuit output. when scp exceeds the threshold voltage, the open collector goes off and this pin goes high. continued on next page. vout* vout*n gnd_p*(vs*) vbias* 500 500 rt gnd_s vreg (internal constant voltage) ct gnd_s vreg (internal constan t voltage) scp gnd_s 13k 1.5k vreg (internal constant voltage) scp_out gnd_s vreg (internal constant voltage)
LV5604TA no.a2027-9/12 continued from preceding page. pin no. pin name description equivalent circuit 23 vref internal constant voltage circuit output. connect a stabilizing capacitor. 48 clk_in external clock input. apply an external clock of the internal oscillation frequency or higher. 49 clk_out clock output. this outputs the internal or external clock frequency pulse. 64 1 sync1 sync2 channel 1 and channel 2 synchronous/diode rectification switching. low : synchronous rectification high : diode rectification switching operates independently for the corresponding channel. 36 sel_ch8 channel 8 step-up/step-down switching. high : sets step-down low : sets step-up continued on next page. vref gnd_s 14.8k vreg (internal constant voltage) 300 clkin gnd_s vreg (internal constan t voltage) 300 300 clkout gnd_s vreg (internal constant voltage) sync* 120k 30k gnd_s vreg (internal constant voltage) sync* l : synchronous rectification h : diode rectification sel_ch8 gnd_p2 (vs2 ) vbias2 channel 8 step-up/step-down switching h (vbias2) : step-down, l (gnd) : step-up
LV5604TA no.a2027-10/12 continued from preceding page. pin no. pin name description equivalent circuit 46 v cc signal system power supply 2 47 vbias1 vbias2 power system power supply (output stage) 24 gnd_s signal system gnd 58 54 gnd_p1 (vs1) gnd_p2 (vs2) output stage gnd (output stage gnd) 50 63 (nc) (nc) use prohibited (not connected pins) notes (1) channel 8 step-up/step-down selection function the channel 8 step-up or step-down converter selection is made by the sel_8ch pin connection. step-up/step-down is selected by sel_ch8, but this selection cannot be sw itched during use, and is fixed to either step-up or step-down in the design stage. in addition, unlike other channels, channel 8 is not connected internally to a pull-up/pull-down resistor, so an external resistor must be connected instead. (mode selection using sel_ch8) selected mode sel_ch8 connecti on out8 resistor connection step-down (down converter) vbias2 connect to vbias2 via a resistor (between the pchtr gate and vbias2) step-up (up converter) gnd_p2 (vs2) connect to gnd_p2 (vs2) via a resistor (between the nchtr gate and gnd_p2 (vs2)) (2) soft start time setting method the soft start time is set with the capac itor connected between csoft* and gnd_s. this ic has an independent soft start function for each chan nel, so a capacitor must be connected for each channel to set the soft start (time). (description of soft start operation) (outline of soft start pin) (3) setting the oscillation frequency the internal oscillation frequency is set by the resistor conn ected to the rt pin and the capacitor connected to the ct pin. the waveform generated on ct is a triangular wave with the charging/discharging waveform determined by rt and ct. f osc = 1 ct rt [hz] the actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set. csoft* [v] csoft* voltage vreg (internal constant voltage) t [s] vb (0.515 [v]) 200k csoft* gnd_s vb ( = 0.515 [v] (typ)) csoft pin charging starts the output voltage reaches the set voltage (output voltage constant) soft start time (tsoft [s]) v cc vbias* gnd_s gnd_p*(vs*) (nc)
LV5604TA no.a2027-11/12 (4) external input clk function (clk_in) switching operation can be synchronized with external clock input (clk_in) by using the clk_in pin. ? external clock (clk_in) frequency and input level when using external clock (clk_in) input, input a frequency equal to the internal oscillation frequency +20% or more to clk_in. in addition, the clk_in configuration is shown in the figure ?clk_in (input) equivalent circuit (outline)? below. the 0.8v reference voltage and clk_in are compared to determine the edges, so input a signal of 0.8v or more (v cc voltage or less) as the external clock (clk_in). ? external/internal clock switching set the ctl pin low before switching between the external clock and the internal clock. ? maximum on duty the maximum on duty (duty_max*) of channel 1 to channel 4 is the 85% (typ.) setting. when using the external clock (clk_in), the maximum on duty (duty_max*) becomes smaller, so care must be taken for the set output voltage. (clk_in (input) equivalent circuit (outline)) (5) scp function ? description of operation when fb1 to fb8 go high due to the load being shorted or other reason, charging to the scp pin starts, and if output does not recover during the set time tscp, the protective circuit (scp) operates. when the protection circuit (scp) operates, all channel outputs are turned off. when not using the protection function (scp), the scp pin must be shorted to gnd_s with a line th at is as short as possible. when the scp function operates and scp_out goes high, all outputs are latched off. this latched state is canceled by setting the ctl pin low or by turning the power supply off. ? scp_out the scp_out pin functions to notify an external microcontroller or other component of the scp (short circuit protection) and ctl status. the output configuration is an open drain output, and a pull-up resistor is used. when not used, leave this pin open. ? switching time the scp_out switching time is set by the capacitor connected to the scp pin. (scp charging operation) (scp and scp_out operation) clk_in 0.8v scp [v] scp ctl scp_out t [s] tscp scp operation charging with iscp = 4 [ a] threshold voltag e 1.25 (typ) output short circuit 1.25 [v] (typ)
LV5604TA ps no.a2027-12/12 this catalog provides information as of march, 2012. specifications and information herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.

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