? semiconductor components industries, llc, 2012 august, 2012 ? rev. 0 1 publication order number: ndd03n80z/d ndd03n80z, ndf03n80z n\channel power mosfet 800 v, 4.5 features ? esd diode ? protected gate ? 100% avalanche tested ? 100% rg tested ? these devices are pb-free, halogen free/bfr free and are rohs compliant absolute maximum ratings (t c = 25 c unless otherwise noted) rating symbol ndd ndf unit drain ? to ? source voltage v dss 800 v continuous drain current r jc i d 2.9 3.3 (note 1) a continuous drain current r jc , t a = 100 c i d 1.9 2.1 (note 1) a pulsed drain current, v gs @ 10 v i dm 12 13 a power dissipation r jc p d 96 25 w gate ? to ? source voltage v gs 30 v single pulse avalanche energy, i d = 2.5 a e as 100 mj esd (hbm) (jesd22 ? a114) v esd 2300 v rms isolation voltage (t = 0.3 sec., r.h. 30%, t a = 25 c) (figure 14) v iso 4500 v peak diode recovery (note 2) dv/dt 4.5 v/ns continuous source current (body diode) i s 3.3 a maximum temperature for soldering leads t l 260 c operating junction and storage temperature range t j , t stg ? 55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. limited by maximum junction temperature 2. i s = 3.3 a, di/dt 100 a/ s, v dd bv dss , t j = +150 c http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. marking and ordering information v (br)dss r ds(on) max 800 v 4.5 @ 10 v ndd03n80zt4g dpak case 369aa ndd03n80z ? 1g ipak case 369d n-channel g (1) d (2) s (3) ndf03n80zh to ? 220fp case 221ah 1 2 3 1 2 3 4 1 2 3 4
ndd03n80z, ndf03n80z http://onsemi.com 2 thermal resistance parameter symbol value unit junction ? to ? case (drain) ndf03n80z ndd03n80z r jc 4.0 1.3 c/w junction ? to ? ambient steady state (note 3) ndf03n80z (note 4) ndd03n80z (note 3) ndd03n80z ? 1 r ja 50 33 96 3. insertion mounted 4. surface mounted on fr4 board using 1? sq. pad size (cu area = 1.127? sq [2 oz] including traces). electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol test conditions min typ max unit off characteristics drain-to-source breakdown voltage v (br)dss v gs =0v, i d =1ma 800 v drain-to-source breakdown voltage temperature coefficient v (br)dss /t j reference to 25 c, i d = 1 ma 870 mv/ c drain ? to ? source leakage current i dss v ds = 800 v, v gs =0v t j =25 c 1.0 a t j = 125 c 50 gate-to-source leakage current i gss v gs = 20 v 10 a on characteristics (note 5) gate threshold voltage v gs(th) v ds =v gs , i d =50 a 3.0 4.1 4.5 v negative threshold temperature coefficient v gs(th) /t j reference to 25 c, i d = 50 a 11 mv/ c static drain-to-source on resistance r ds(on) v gs =10v, i d = 1.2 a 3.7 4.5 forward transconductance g fs v ds =15v, i d = 1.2 a 2.1 s dynamic characteristics input capacitance (note 6) c iss v ds =25v, v gs = 0 v, f = 1 mhz 440 pf output capacitance (note 6) c oss 52 reverse transfer capacitance (note 6) c rss 9.0 total gate charge (note 6) q g v ds = 400 v, i d = 3.3 a, v gs =10v 17 nc gate-to-source charge (note 6) q gs 3.5 gate-to-drain (?miller?) charge (note 6) q gd 9.1 plateau voltage v gp 6.5 v gate resistance r g 5.5 resistive switching characteristics (note 7) turn-on delay time t d(on) v dd = 400 v, i d = 3.3 a, v gs =10v, r g = 0 9.0 ns rise time t r 7.0 turn-off delay time t d(off) 17 fall time t f 9.0 source ? drain diode characteristics diode forward voltage v sd i s = 3.0 a, v gs =0v t j =25 c 0.9 1.6 v t j = 100 c 0.8 reverse recovery time t rr v gs =0v, v dd =30v i s = 3.3 a, d i /d t = 100 a/ s 360 ns charge time t a 81 discharge time t b 280 reverse recovery charge q rr 1.3 nc 5. pulse width 380 s, duty cycle 2%. 6. guaranteed by design. 7. switching characteristics are independent of operating junction temperatures.
ndd03n80z, ndf03n80z http://onsemi.com 3 typical characteristics 0.0 0.5 1.0 1.5 2.0 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 1. on ? region characteristics 6.6 v v gs = 6.8 v to 10 v 6.4 v 6.0 v 5.8 v 5.6 v 0 5 10 15 20 25 0.0 1.0 2.0 3.0 4.0 5.0 345678910 v gs , gate ? to ? source voltage (v) i d , drain current (a) figure 2. transfer characteristics v ds = 25 v t j = 150 c t j = ? 55 c t j = 25 c 1.0 3.0 5.0 7.0 9.0 11 0.0 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 v gs , gate ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance ( ) figure 3. on ? region versus gate ? to ? source voltage i d = 1.2 a t j = 25 c 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.5 i d , drain current (a) figure 4. on ? resistance versus drain current and gate voltage r ds(on) , drain ? to ? source resistance ( ) 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 ? 50 ? 25 0 25 50 75 100 125 150 r ds(on) , drain ? to ? source resistance (normalized) i d = 1.2 a v gs = 10 v t j , junction temperature ( c) figure 5. on ? resistance variation with temperature 0.90 0.95 1.00 1.05 1.10 1.15 ? 50 ? 25 0 25 50 75 100 125 150 t j , junction temperature ( c) figure 6. bv dss variation with temperature bv dss , normalized breakdown voltage (v) i d = 1 ma 2.5 3.0 6.2 v 5.4 v 5.2 v 5.0 v 12 2.0 4.0 6.0 8.0 10 12 6.5 7.0 7.0 v gs = 10 v t j = 25 c
ndd03n80z, ndf03n80z http://onsemi.com 4 typical characteristics 0.1 1.0 10.0 0 50 100 150 200 250 300 350 400 450 500 v ds , drain ? to ? source voltage (v) i dss , leakage ( a) figure 7. drain ? to ? source leakage current versus voltage t j = 150 c 1 10 100 1000 10000 1 10 100 v ds , drain ? to ? source voltage (v) c, capacitance (pf) figure 8. capacitance variation t j = 25 c v gs = 0 v f = 1 mhz c iss c oss c rss t j = 125 c 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 0 2 4 6 8 10 12 14 16 18 20 0 50 100 150 200 250 300 q g , total gate charge (nc) figure 9. gate ? to ? source voltage and drain ? to ? source voltage versus total charge v gs , gate ? to ? source voltage (v) v ds , drain ? to ? source voltage (v) q t q gd q gs v ds = 400 v i d = 3.3 a t j = 25 c v ds v gs 1.0 10 100 1000 1 10 100 r g , gate resistance ( ) t, time (ns) figure 10. resistive switching time variation versus gate resistance t d(off) t f t r t d(on) v dd = 400 v i d = 3 a v gs = 10 v 0.1 1.0 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 125 c t j = 150 c 25 c ? 55 c v sd , source ? to ? drain voltage (v) figure 11. diode forward voltage versus current i s , source current (a) 350 400 450
ndd03n80z, ndf03n80z http://onsemi.com 5 typical characteristics 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 12. maximum rated forward biased safe operating area ? ndd03n80z r ds(on) limit thermal limit package limit 10 s 100 s 10 ms dc 1 ms v gs 30 v single pulse t c = 25 c 0.01 0.1 1 10 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse time (s) r(t) (c/w) figure 13. thermal impedance (junction ? to ? case) ? ndd03n80z 50% (duty cycle) 20% 10% 5.0% 2.0% 1.0% single pulse r jc = 1.3 c/w steady state leads heatsink 0.110 min figure 14. isolation test diagram measurement made between leads and heatsink with all leads shorted together. *for additional mounting information, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
ndd03n80z, ndf03n80z http://onsemi.com 6 table 1. ordering information device package shipping ? ndd03n80z ? 1g ipak (pb-free, halogen-free) 75 units / rail ndd03n80zt4g dpak (pb-free, halogen-free) 2500 / tape & reel ndf03n80zh (in development) to ? 220fp (pb-free, halogen-free) 50 units / rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. marking diagrams a = location code y = year ww = work week g, h = pb ? free, halogen ? free package ndf03n80zh ayww gate source drain 1 gate 2 drain 3 source 4 drain yww 3n 80zg 4 drain 2 drain 1 gate 3 source yww 3n 80zg to ? 220fp ipak dpak
ndd03n80z, ndf03n80z http://onsemi.com 7 package dimensions to ? 220 fullpack, 3 ? lead case 221ah issue c dim min max millimeters d 14.70 15.30 e 9.70 10.30 a 4.30 4.70 b 0.54 0.84 p 3.00 3.40 e l1 --- 2.80 c 0.49 0.79 l 12.70 14.73 b2 1.10 1.40 q 2.80 3.20 a2 2.50 2.70 a1 2.50 2.90 h1 6.70 7.10 e q l1 b2 e d l p 123 b seating plane a a1 h1 a2 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. contour uncontrolled in this area. 4. dimensions d and e do not include mold flash and gate protrusions. mold flash and gate protrusions not to exceed 0.13 per side. these dimensions are to be measured at outermost extreme of the plastic body. 5. dimension b2 does not include dambar protrusion. lead width including protrusion shall not exceed 2.00. 2.54 bsc m 0.14 m a a b c e/2 m 0.25 m a b 3x c 3x b note 3 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d issue c
ndd03n80z, ndf03n80z http://onsemi.com 8 package dimensions dpak (single guage) case 369aa issue b b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for a dditional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ndd03n80z/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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