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  R8821 r r d d c c ? ? r r i i s s c c d d s s p p c c o o m m m m u u n n i i c c a a t t i i o o n n 16-bit risc microcontroller specifications subject to change without notice, contact your sales representatives for the most update information. page 1 of 5 rev 1.0 jul.11 2006 r r 8 8 8 8 2 2 1 1 b b r r i i e e f f s s h h e e e e t t 16-bit risc microcontroller
R8821 r r d d c c ? ? r r i i s s c c d d s s p p c c o o m m m m u u n n i i c c a a t t i i o o n n 16-bit risc microcontroller specifications subject to change without notice, contact your sales representatives for the most update information. page 2 of 5 rev 1.0 jul.11 2006 1. features l cpu core - rdc s proprietary risc architecture - five-stage pipeline - cpu clock speed: 40mhz - supports cpu id - supports 32 pio pins - static & synthesizable design l bus interface - multiplexed address and data bus - supports a non-multiplexed address bus a[19:0] - 8-bit or 16-bit external bus dynamic access l rom/ram/dram controller and addressing space - 1m-byte memory address space - 64k-byte i/o space - with 8-bit or 16-bit boot rom bus size - supports 64kx16, 128kx16, 256kx16 edo or fp dram with auto-refresh control l two independent dma channels l asynchronous serial channels - supports two asynchronous serial channels with hardware handshaking signals l interrupt controller - the interrupt controller with seven maskable external interrupts and one non-maskable external interrupt l programmable chip-select logic - programmable chip-select logic for memory or i/o bus cycle decoder l programmable wait-state generators l counters/timers - three independent 16-bit timers and one independent programmable watchdog timer l software compatible with the 80c186 microprocessor l operating voltage range - core voltage: 5v 10% - i/o voltage: 5v 10% l ambient temperature: 0 ~ +70 c l package type -100-pin pqfp & 100-pin lqfp
R8821 r r d d c c ? ? r r i i s s c c d d s s p p c c o o m m m m u u n n i i c c a a t t i i o o n n 16-bit risc microcontroller specifications subject to change without notice, contact your sales representatives for the most update information. page 3 of 5 rev 1.0 jul.11 2006 2. block diagram dma unit dram control unit chip select unit refresh control unit bus interface unit pio unit timer control unit interrupt control unit clock and power management asynchro- nous serial port0 instruction queue (64bits) instruction decoder register file general, segment, eflag register alu (special, logic, adder, bsf) micro rom ea / la address control signal execution unit x1 x2 clkouta clkoutb int6-int4 int0 tmrin0 tmrout0 tmrin1 tmrout1 drq0 drq1 txd0 rxd0 a[19:0](ma[8:0]) ad[15:0] ale rd_n vcc gnd lcs_n/once0_n/ras0_n ucs_n/once1_n pcs5_n/a1 pcs6_n/a2 ardy srdy s2_n/bwsel dt/r_n den_n hold hlda s6/clkdiv2_n uzi_n wr_n bhe_n/aden_n wlb_n whb_n asynchro- nous serial port1 rts0_n/rtr0_n cts0_n/enrx0_n txd1 rxd1 rts1_n/rtr1_n cts1_n/enrx1_n int1/select_n int3/inta1_n/irq int2/inta0_n nmi rst_n mcs1_n/ucas_n mcs2_n/lcas_n mcs0_n mcs3_n/ras1_n s1_n~s0_n pio[31:0]
R8821 r r d d c c ? ? r r i i s s c c d d s s p p c c o o m m m m u u n n i i c c a a t t i i o o n n 16-bit risc microcontroller specifications subject to change without notice, contact your sales representatives for the most update information. page 4 of 5 rev 1.0 jul.11 2006 3. package information pqfp 100 pins 0.10 c seating plane 0.25 min a1 "a" d1 20.00 0.10 d 23.20 0.20 e1 14.00 0.10 e 17.20 0.20 "a" 0.65 bsc 0.25~0.38 unit:mm 1.60 ref 0.25 0.88 0.15 l l1 a2 2.85 0.12 detail a 3.40 max. 7 typ 15 typ detail a
R8821 r r d d c c ? ? r r i i s s c c d d s s p p c c o o m m m m u u n n i i c c a a t t i i o o n n 16-bit risc microcontroller specifications subject to change without notice, contact your sales representatives for the most update information. page 5 of 5 rev 1.0 jul.11 2006 lqfp 100 pins sealing plane 1 25 26 50 51 75 76 100 0.127(typ) "a" 0.08(max) 0.50(typ) 1.60(max) 1.00(ref) 0.2s(typ) gauge plane 16.00 0.15 14.00 0.10 16.00 0.15 14.00 0.10 1.40 0.05 0.10 0.05 0.22 0.05 0.60 0.15 0 ~ 7 unit:mm


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