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fqd5p20 / fqu5p20 fqd5p20 / fqu5p20 200v p-channel mosfet general description these p-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficiency switching dc/dc converters. features ? -3.7a, -200v, r ds(on) = 1.4 ? @v gs = -10 v ? low gate charge ( typical 10 nc) ? low crss ( typical 12 pf) ? fast switching ? 100% avalanche tested absolute maximum ratings t c = 25c unless otherwise noted thermal characteristics symbol parameter fqd5p20 / fqu5p20 units v dss drain-source voltage -200 v i d drain current - continuous (t c = 25c) -3.7 a - continuous (t c = 100c) -2.34 a i dm drain current - pulsed (note 1) -14.8 a v gss gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 330 mj i ar avalanche current (note 1) -3.7 a e ar repetitive avalanche energy (note 1) 4.5 mj dv/dt peak diode recovery dv/dt (note 3) -5.5 v/ns p d power dissipation (t a = 25c) * 2.5 w power dissipation (t c = 25c) 45 w - derate above 25c 0.36 w/c t j , t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering purposes, 1/8 " from case for 5 seconds 300 c symbol parameter typ max units r jc thermal resistance, junction-to-case -- 2.78 c / w r ja thermal resistance, junction-to-ambient * -- 50 c / w r ja thermal resistance, junction-to-ambient -- 110 c / w * when mounted on the minimum pad size recommended (pcb mount) i-pak fqu series d-pak fqd series g s d g s d ? ?? ? ! !! ! ! !! ! ! !! ! ? ?? ? ! !! ! ! !! ! ! !! ! s d g october 2008 qfet ? ? rohs compliant ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008
fqd5p20 / fqu5p20 (note 4) (note 4, 5) (note 4, 5) (note 4) elerical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating : pulse width limited by maximum junction temperature 2. l = 36.2mh, i as = -3.7a, v dd = -50v, r g = 25 ?, starting t j = 25c 3. i sd -4.8a, di/dt 300a/ s, v dd bv dss, starting t j = 25c 4. pulse test : pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -200 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = -250 a, referenced to 25c -- -0.17 -- v/c i dss zero gate voltage drain current v ds = -200 v, v gs = 0 v -- -- -1 a v ds = -160 v, t c = 125c -- -- -10 a i gssf gate-body leakage current, forward v gs = -30 v, v ds = 0 v -- -- -100 na i gssr gate-body leakage current, reverse v gs = 30 v, v ds = 0 v -- -- 100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = -250 a -3.0 -- -5.0 v r ds(on) static drain-source on-resistance v gs = -10 v, i d = -1.85 a -- 1.1 1.4 ? g fs forward transconductance v ds = -40 v, i d = -1.85 a -- 2.2 -- s dynamic characteristics c iss input capacitance v ds = -25 v, v gs = 0 v, f = 1.0 mhz -- 330 430 pf c oss output capacitance -- 75 98 pf c rss reverse transfer capacitance -- 12 15 pf switching characteristics t d(on) turn-on delay time v dd = -100 v, i d = -4.8 a, r g = 25 ? -- 9 28 ns t r turn-on rise time -- 70 150 ns t d(off) turn-off delay time -- 12 35 ns t f turn-off fall time -- 25 60 ns q g total gate charge v ds = -160 v, i d = -4.8 a, v gs = -10 v -- 10 13 nc q gs gate-source charge -- 2.8 -- nc q gd gate-drain charge -- 5.2 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- -3.7 a i sm maximum pulsed drain-source diode forward current -- -- -14.8 a v sd drain-source diode forward voltage v gs = 0 v, i s = -3.7 a -- -- -5.0 v t rr reverse recovery time v gs = 0 v, i s = -4.8 a, di f / dt = 100 a/ s -- 175 -- ns q rr reverse recovery charge -- 1.07 -- c ? ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fqd5p20 / fqu5p20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 10 -1 10 0 10 1 150 notes : 1. v gs = 0v 2. 250 s pulse test 25 -i dr , reverse drain current [a] -v sd , source-drain voltage [v] 24681 0 10 -1 10 0 10 1 150 25 -55 notes : 1. v ds = -40v 2. 250 s pulse test -i d , drain current [a] -v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 -2 10 -1 10 0 10 1 v gs top : -15.0 v -10.0 v -8.0 v -7.0 v -6.5 v -6.0 v bottom : -5.5 v notes : 1. 250 s pulse test 2. t c = 25 -i d , drain current [a] -v ds , drain-source voltage [v] 03691 2 0.0 0.6 1.2 1.8 2.4 3.0 note : t j = 25 v gs = - 20v v gs = - 10v r ds(on) [ ? ], drain-source on-resistance -i d , drain current [a] 024681012 0 2 4 6 8 10 12 v ds = -100v v ds = -40v v ds = -160v note : i d = -4.8 a -v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 0 10 1 0 150 300 450 600 750 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd notes : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitance [pf] -v ds , drain-source voltage [v] figure 5. capacitance characteristics figure 6. gate charge characteristics figure 3. on-resistance variation vs. drain current and gate voltage figure 4. body diode forward voltage variation vs. source current and temperature figure 2. transfer characteristics figure 1. on-region characteristics typical characteristics ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fqd5p20 / fqu5p20 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -1 10 0 n ote s : 1. z jc (t) = 2.78 /w m ax. 2. d u ty f actor, d =t 1 /t 2 3. t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), therm al response t 1 , s q u are w ave p u lse d ura tion [sec] 25 50 75 100 125 150 0 1 2 3 4 -i d , drain current [a] t c , case temperature [ ] 10 0 10 1 10 2 10 -1 10 0 10 1 dc 10 ms 1 ms 100 s operation in this area is limited by r ds(on) notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse -i d , drain current [a] -v ds , drain-source voltage [v] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 notes : 1. v gs = -10 v 2. i d = -2.4 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 notes : 1. v gs = 0 v 2. i d = -250 a -bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] typical characteristics (continued) figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 7. breakdown voltage variation vs. temperature figure 8. on-resistance variation vs. temperature figure 11. transient thermal response curve t 1 p dm t 2 ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fqd5p20 / fqu5p20 charge v gs -10v q g q gs q gd -3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut charge v gs -10v q g q gs q gd -3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut v ds v gs 10% 90% t d(on) t r t on t off t d(off) t f v dd -10v v ds r l dut r g v gs v ds v gs 10% 90% t d(on) t r t on t off t d(off) t f v dd -10v v ds r l dut r g v gs e as =li as 2 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time -10v dut r g l i d t p e as =li as 2 ---- 2 1 e as =li as 2 ---- 2 1 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time -10v dut r g l l i d i d t p gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fqd5p20 / fqu5p20 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g compliment of dut (n-channel) v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g compliment of dut (n-channel) v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period -------------------------- ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fq d5p20 / fqu5p20 dimensions in millimeters mechanical dimensions d - pak ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fqd5p20 / fqu5p20 6.60 0.20 0.76 0.10 max0.96 2.30typ [2.300.20] 2.30typ [2.300.20] 0.60 0.20 0.80 0.10 1.80 0.20 9.30 0.30 16.10 0.30 6.10 0.20 0.70 0.20 5.34 0.20 0.50 0.10 0.50 0.10 2.30 0.20 (0.50) (0.50) (4.34) ipak mechanical dimensions dimensions in millimeters i - pak ?200 8 fairchild semiconductor internationa rev. a 1 , october 2008 fqd5p20 / fqu5p20 fqd5p20 / fqu5p20 rev. a 1 www.fairchildsemi.com rev. i37 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. * ezswitch? and flashwriter ? are trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairch ild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fa irchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms build it now? coreplus? corepower? crossvolt ? ctl? current transfer logic? ecospark ? efficentmax? ezswitch? * ? fairchild ? fairchild semiconductor ? fact quiet series? fact ? fast ? fastvcore? flashwriter ? * fps? f-pfs? frfet ? global power resource sm green fps? green fps? e-series? gto? intellimax? isoplanar? megabuck? microcoupler? microfet? micropak? millerdrive? motionmax? motion-spm? optologic ? optoplanar ? ? pdp spm? power-spm? powertrench ? powerxs? programmable active droop? qfet ? qs? quiet series? rapidconfigure? ? saving our world, 1mw /w /kw at a time? smartmax? smart start? spm ? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 supremos? syncfet? ? the power franchise ? tinyboost? tinybuck? tinylogic ? tinyopto? tinypower? tinypwm? tinywire? serdes? uhc ? ultra frfet? unifet? vcx? visualmax? xs? tm ? tm tm datasheet identification product status definition advance information formative / in design datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production datasheet contains final specifications. fair child semiconductor reserves the right to make changes at any time withou t notice to improve the design. obsolete not in production datasheet contains specifications on a product th at is discontinued by fairchild semiconductor. the datasheet is for reference information only. anti-counterfeiting policy fairchild semiconductor corporation?s anti-counterfeiting policy. farichild?s anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support . counterfeiting of semiconductor parts is a growing problem in th e industry. all manufactures of semiconductor products are expe riencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing del ays. fairchild is taking strong measures to protect ourselve s and our customers from the proliferation of counterfeit parts. farichild strongly encourages customers to purchase farichild parts either directly from fa irchild or from authorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or fr om authorized fairchild distributors are genuine parts, have full traceability, meet fairchild?s quality standards for handing and storage and provide access to farichild?s full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and wi ll appropriately address and warranty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unau thorized sources. farichild is committed to combat this global problem and encourage our customer s to do their part in stopping this practice by buying direct or from authorized distributors. |
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