1/9 october 2001 . STB50NE10L n-channel 100v - 0.020 w - 50a d 2 pak stripfet? power mosfet n typical r ds (on) = 0.020 w n exceptional dv/dt capability n 100% avalanche tested n low gate charge at 100 o c n application oriented characterization n for through-hole version contact sales office description this power mosfet is the latest development of stmicroelectronis unique "single feature size?" strip-based process. the resulting transistor shows extremely high packing density for low on- resistance, rugged avalanche characteristics and less critical alignment steps therefore a remark- able manufacturing reproducibility. applications n high current, high switching speed n solenoid and relay drivers n motor control, audio amplifiers n dc-dc & dc-ac converters n automotive environment (injection, abs, air-bag, lampdrivers, etc.) type v dss r ds(on) i d STB50NE10L 100 v <0.025 w 50 a 1 3 d 2 pak to-263 (suffix t4) absolute maximum ratings ( ) pulse width limited by safe operating area (1) i sd 50a, di/dt 275a/s, v dd v (br)dss , t j t jmax symbol parameter value unit v ds drain-source voltage (v gs = 0) 100 v v dgr drain-gate voltage (r gs = 20 k w ) 100 v v gs gate- source voltage 20 v i d drain current (continuos) at t c = 25c 50 a i d drain current (continuos) at t c = 100c 35 a i dm ( ) drain current (pulsed) 200 a p tot total dissipation at t c = 25c 150 w derating factor 1.0 w/c dv/dt (1) peak diode recovery voltage slope 6 v/ns t stg storage temperature -65 to 175 c t j max. operating junction temperature 175 c internal schematic diagram
STB50NE10L 2/9 thermal data avalanche characteristics electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic rthj-case rthj-amb rthc-sink t l thermal resistance junction-case thermal resistance junction-ambient thermal resistance case-sink maximum lead temperature for soldering purpose max max typ 1 62.5 0.5 300 c/w c/w c/w c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 50 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 400 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 100 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 m a 1 1.7 2.5 v r ds(on) static drain-source on resistance v gs = 10 v i d = 25 a v gs = 5 v i d = 25 a 0.020 0.024 0.025 0.030 w w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds >i d(on) xr ds(on)max i d =25 a 45 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v f = 1 mhz v gs = 0 5000 500 180 pf pf pf
3/9 STB50NE10L switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on time rise time v dd = 50 v i d = 25 a r g = 4.7 w v gs = 5 v (resistive load, figure 3) 30 105 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 80 v i d = 50 a v gs = 5 v 82 17 49 105 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 50 v i d = 25 a r g = 4.7 w, v gs = 5 v (resistive load, figure 3) 135 45 ns ns t r(voff) t f t c off-voltage rise time fall time cross-over time v clamp = 80 v i d = 50 a r g = 4.7 w v gs = 5 v (inductive load, figure 5) 45 45 85 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 50 200 a a v sd (*) forward on voltage i sd = 50 a v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 30 a di/dt = 100a/s v dd = 50 v t j = 150c (see test circuit, figure 5) 165 870 10.5 ns nc a thermal impedance electrical characteristics (continued) safe operating area
STB50NE10L 4/9 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/9 STB50NE10L normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics . . .
STB50NE10L 6/9 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/9 STB50NE10L dim. mm. inch. min. typ. max. min. typ. typ. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.028 0.037 b2 1.14 1.7 0.045 0.067 c 0.45 0.6 0.018 0.024 c2 1.21 1.36 0.048 0.054 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.394 0.409 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.591 0.624 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.069 m 2.4 3.2 0.094 0.126 r 0.4 0.016 v2 0 8 0 8 d 2 pak mechanical data
STB50NE10L 8/9 dim. mm inch min. max. min. max. a0 10.5 10.7 0.413 0.421 b0 15.7 15.9 0.618 0.626 d 1.5 1.6 0.059 0.063 d1 1.59 1.61 0.062 0.063 e 1.65 1.85 0.065 0.073 f 11.4 11.6 0.449 0.456 k0 4.8 5.0 0.189 0.197 p0 3.9 4.1 0.153 0.161 p1 11.9 12.1 0.468 0.476 p2 1.9 2.1 0075 0.082 r50 1.574 t 0.25 0.35 .0.0098 0.0137 w 23.7 24.3 0.933 0.956 dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0.795 g 24.4 26.4 0.960 1.039 n 100 3.937 t 30.4 1.197 base qty bulk qty 1000 1000 reel mechanical data * on sales type tube shipment (no suffix)* tape and reel shipment (suffix t4)* d 2 pak footprint tape mechanical data
9/9 STB50NE10L information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2001 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
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