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1 ? fn7490.6 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2006-2009. all rights reserved. all other trademarks mentioned are the property of their respective owners. el8170, el8173 micropower, single suppl y, rail-to-rail input-output instrumentation amplifiers the el8170 and el8173 are micropower instrumentation amplifiers optimized for single supply operation over the +2.4v to +5.5v range. inputs and outputs can operate rail-to-rail. as with all instrume ntation amplifiers, a pair of inputs provide very high common-mode rejection and are completely independent from a pair of feedback terminals. the feedback terminals allow zero input to be translated to any output offset, including ground. a feedback divider controls the overall gain of the amplifier. the el8170 is compensated for a gain of 100 or more, and the el8173 is compensated for a gain of 10 or more. the el8170 and el8173 have bipolar input devices for best offset and 1/f noise performance. the amplifiers can be operated from one lithium cell or two ni-cd batteries. the el8170 and el8173 input range includes ground to slightly above positive rail. the output stage swings to ground and positive supply (no pull-up or pull-down resistors are needed). pinouts el8170 (8 ld soic) top view el8173 (8 ld soic) top view features ? 95a maximum supply current ? maximum offset voltage - 200v (el8170) - 1000v (el8173) ? maximum 3na input bias current ? 396khz -3db bandwidth (g = 10) ? 192khz -3db bandwidth (g = 100) ? single supply operation - input voltage range is rail-to-rail - output swings rail-to-rail ? pb-free (rohs compliant) applications ? battery- or solar-powered systems ? strain gauges ? current monitors ? thermocouple amplifiers 1 2 3 4 8 7 6 5 + - + - dnc in- in+ v- fb+ v+ fb- vout 1 2 3 4 8 7 6 5 + - + - dnc in- in+ v- fb+ v+ fb- vout ordering information part number (note) part marking package (pb-free) pkg. dwg. # el8170fsz* 8170fsz 8 ld soic m8.15e el8173fsz* 8173fsz 8 ld soic m8.15e *add ?-t7? suffix for tape and reel. please refer to tb347 for details on reel specifications. note: these intersil pb-free plas tic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin pl ate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020 data sheet august 31, 2009
2 fn7490.6 august 31, 2009 absolute maxi mum ratings (t a = +25c) thermal information supply voltage, v + . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.75v, 1v/s differential input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma differential input voltage el8170 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5v el8173 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0v esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kv thermal resistance (typical note 1) ja (c/w) 8 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . . 110 output short-circuit duration . . . . . . . . . . . . . . . . . . . . . . .indefinite ambient operating temperature . . . . . . . . . . . . . . .-40c to +125c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 1. ja is measured with the component mounted on a high effective therma l conductivity test board in free air. see tech brief tb379 f or details. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v + = +5v, v - = gnd, vcm = 1/2v + , r l = open, t a = +25c, unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. parameter description conditions min (note 2) typ max (note 2) unit dc specifications v os input offset voltage el8170 -200 -300 50 200 300 v el8173 -1000 -1500 200 1000 1500 v tcv os input offset voltage temperature coefficient el8170 0.24 v/c el8173 2.5 v/c i os input offset current between in+, and in- and between fb+ and fb- -2 -3 0.2 2 3 na i b input bias current (in+, in-, fb+, and fb- terminals) -3 -4 0.7 3 4 na v in input voltage range guaranteed by cmrr test 0 5 v cmrr common mode rejection ratio el8170 v cm = 0v to +5v 90 85 114 db el8173 85 80 106 db psrr power supply rejection ratio el8170 v + = +2.4v to +5.5v 85 80 106 db el8173 75 70 90 db e g gain error el8170 r l = 100k to +2.5v -1.5 2 +0.35 1.5 2 % el8173 -0.4 -0.8 +0.1 0.4 0.8 % v out maximum voltage swing output low, r l = 100k to +2.5v 4 10 mv output low, r l = 1k to +2.5v 0.13 0.2 0.25 v output high, r l = 100k to +2.5v 4.985 4.980 4.996 v output high, r l = 1k to +2.5v 4.75 4.887 v i s supply current 45 38 65 95 110 a v supply supply operating range v+ to v- 2.4 5.5 v el8170, el8173
3 fn7490.6 august 31, 2009 i o+ output source current into 10 to v + /2 v + = +5v 23 19 32 ma v + = +2.4v 6 4.5 8ma i o- output sink current into 10 to v + /2 v + = +5v 19 15 26 ma v + = +2.4v 5 4 7ma ac specifications -3db bw -3db bandwidth el8170 gain = 100 192 khz gain = 200 93 khz gain = 500 30 khz gain = 1000 13 khz el8173 gain = 10 396 khz gain = 20 221 khz gain = 50 69 khz gain = 100 30 khz e n input noise voltage el8170 f = 0.1hz to 10hz 3.5 v p-p el8173 3.6 v p-p input noise voltage density el8170 f o = 1khz 58 nv/ hz el8173 220 nv/ hz i n input noise current density el8170 f o = 1khz 0.38 pa/ hz el8173 f o = 1khz 0.8 pa/ hz cmrr @ 60hz input common mode rejection ratio el8170 v cm = 1v p-p , r l = 10k to v cm 100 db el8173 84 db psrr+ @ 120hz power supply rejection ratio (v + ) el8170 v + , v - = 2.5v, v source = 1v p-p , r l = 10k to v cm 98 db el8173 78 db psrr- @ 120hz power supply rejection ratio (v - ) el8170 v + , v - = 2.5v, v source = 1v p-p , r l = 10k to v cm 106 db el8173 82 db transient response sr slew rate r l = 1k to gnd 0.4 0.35 0.55 0.7 0.7 v/s note: 2. parameters with min and/or max limits are 100% tested at + 25c, unless otherwise specified. temperature limits established by characterization and are not production tested. electrical specifications v + = +5v, v - = gnd, vcm = 1/2v + , r l = open, t a = +25c, unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. (continued) parameter description conditions min (note 2) typ max (note 2) unit el8170, el8173
4 fn7490.6 august 31, 2009 typical performance curves v+ = +5v, v- = 0v, v cm = +2.5v, r l = open, unless otherwise specified. figure 1. el8170 frequency response vs closed loop gain figure 2. el8173 frequency response vs closed loop gain figure 3. el8170 frequency response vs supply voltage figure 4. el8173 frequency response vs supply voltage figure 5. el8170 frequency response vs c load figure 6. el8173 frequency response vs c load 30 40 50 60 70 80 90 frequency (hz) gain (db) 1 10 100 1k 10k 100k 1m gain = 100v/v gain = 200v/v gain = 500v/v gain = 1,000v/v gain = 2,000v/v gain = 5,000v/v gain = 10,000v/v common-mode input = 1/2v + 10 20 30 40 50 60 70 1e+00 1e+01 1e+02 1e+03 1e+04 1e+05 1e+06 frequency (hz) gain (db) gain = 500 gain = 1000 gain = 200 gain = 100 gain = 50 gain = 20 gain = 10 common-mode input = 1/2v + 100 10k 1k 100k 1m 45 40 35 30 25 20 15 10 5 0 frequency (hz) gain (db) v + = 2.4v v + = 3.3v v + = 5v a v = 100 r l = 10k c l = 10pf r f /r g = 99.02 r f = 221k r g = 2.23k 100 10k 1k 100k 20 15 10 5 0 frequency (hz) gain (db) a v = 10 r = 10k c l = 10pf r f /r g = 9.08 r f = 178k r g = 19.6k 1m v + = 5v v + = 2.4v v + = 3.3v 100 10k 1k 100k 50 45 40 35 30 25 frequency (hz) gain (db) c l = 820pf a v = 100 v + , v - = 2.5v r l = 10k r f /r g = 99.02 r f = 221k r g = 2.23k 1m c l = 56pf c l = 470pf c l = 220pf 100 10k 1k 100k 30 25 20 15 10 0 frequency (hz) gain (db) c l = 100pf a v = 10 v + = 5v r l = 10k r f /r g = 9.08 r f = 178k r g = 19.6k c l = 2.7pf 5 c l = 27pf c l = 47pf 1m el8170, el8173
5 fn7490.6 august 31, 2009 figure 7. el8170 cmrr vs frequency figure 8. el8173 cmrr vs frequency figure 9. el8170 psrr vs frequency figure 10. el8173 psrr vs frequency figure 11. el8170 voltage noise density figure 12. el8173 voltage noise density typical performance curves v+ = +5v, v- = 0v, v cm = +2.5v, r l = open, unless otherwise specified. (continued) 0 20 40 60 80 100 120 10 100 1k 10k 100k 1m cmrr frequency (hz) cmrr (db) -10 0 10 20 30 40 50 60 70 80 90 10 100 1k 10k 100k 1m cmrr (db) frequency (hz) cmrr 0 20 40 60 80 100 120 140 10 100 1k 10k 100k 1m psrr (db) frequency (hz) psrr- psrr+ psrr (db) frequency (hz) 0 10 20 30 40 50 60 70 80 90 10 100 1k 10k 100k 1m psrr- psrr+ 50 100 150 200 250 1 10 100 1k 10k 100k input voltage noise (nv/ hz) frequency (hz) 0.0 0.5 1.0 1.5 2.0 2.5 1 10 100 1k 10k 100k input voltage noise (v/ hz) frequency (hz) el8170, el8173
6 fn7490.6 august 31, 2009 figure 13. el8170 current noise density figure 14. el8173 current noise density figure 15. el8170 0.1hz to 10hz input voltage noise (gain = 100) figure 16. el8173 0.1hz to 10hz input voltage noise (gain = 10) figure 17. el8170 supply current vs temperature, v + , v - = 2.5v, v in = 0v figure 18. el8173 supply current vs temperature, v + , v - = 2.5v, v in = 0v typical performance curves v+ = +5v, v- = 0v, v cm = +2.5v, r l = open, unless otherwise specified. (continued) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1 10 100 1k 10k 100k current noise (pa/ hz) frequency (hz) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1 10 100 1k 10k current noise (pa/ hz) frequency (hz) 100k time (1s/div) voltage noise (0.5v/div) time (1s/div) voltage noise (0.5v/div) 40 45 50 55 60 65 70 75 80 85 -40 -20 0 20 40 60 80 100 120 temperature (c) supply current (a) min median max n = 2000 40 45 50 55 60 65 70 75 80 85 90 -40 -20 0 20 40 60 80 100 120 min max n = 1000 temperature (c) supply current (a) median el8170, el8173
7 fn7490.6 august 31, 2009 figure 19. el8170 v os vs temperature, v + , v - = 2.5v, v in = 0v figure 20. el8173 v os vs temperature, v + , v - = 2.5v, v in = 0v figure 21. el8170 v os vs temperature, v + , v - = 1.2v, v in = 0v figure 22. el8173 v os vs temperature, v + , v - = 1.2v, v in = 0v figure 23. el8170 cmrr vs temperature, v cm = +2.5v to -2.5v, v + , v - = 2.5v figure 24. el8173 cmrr vs temperature, v cm = +2.5v to -2.5v, v + , v - = 2.5v typical performance curves v+ = +5v, v- = 0v, v cm = +2.5v, r l = open, unless otherwise specified. (continued) -300 -200 -100 0 100 200 300 -40 -20 0 20 40 60 80 100 120 temperature (c) v os (v) min median max n = 2000 -1500 -1000 -500 0 500 -40 -20 20 40 60 80 100 120 min max n = 1000 1000 0 temperature (c) v os (v) median -300 -200 -100 0 100 200 300 400 -40 -20 0 20 40 60 80 100 120 min max n = 2000 temperature (c) v os (v) median -1500 -1000 -500 0 500 1000 -40 -20 0 20 40 60 80 100 120 min max n = 1000 temperature (c) v os (v) median -40-20 0 20406080100120 temperature (c) 80 90 100 110 120 130 140 cmrr (db) min max n = 2000 median -40-200 20406080100120 temperature (c) 80 90 100 110 120 130 140 cmrr (db) min max n = 1000 median el8170, el8173
8 fn7490.6 august 31, 2009 figure 25. el8170 psrr vs temperature, v + , v - = 1.2v to 2.5v figure 26. el8173 psrr vs temperature, v + , v - = 1.2v to 2.5v figure 27. el8170 %gain error vs temperature, r l = 100k figure 28. el8173 %gain error vs temperature, r l = 100k figure 29. el8170 v out high vs temperature, r l = 1k, v + , v - = 2.5v figure 30. el8173 v out high vs temperature, r l = 1k, v + , v - = 2.5v typical performance curves v+ = +5v, v- = 0v, v cm = +2.5v, r l = open, unless otherwise specified. (continued) -40 -20 0 20 40 60 80 100 120 temperature (c) psrr (db) 60 70 80 90 100 110 120 130 140 min max n = 2000 median -40-20 0 20406080100120 temperature (c) psrr (db) 60 70 80 90 100 110 120 130 140 min max n = 1000 median -40-200 20406080100120 temperature (c) -0.1 0.4 0.9 1.4 1.9 2.4 gain error (%) min max n = 2000 median -40 -20 0 20 40 60 80 100 120 temperature (c) -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 gain error (%) min max n = 1000 median 4.84 4.85 4.86 4.87 4.88 4.89 4.90 4.91 v out (v) -40-200 20406080100120 temperature (c) max min n = 2000 median 4.84 4.85 4.86 4.87 4.88 4.89 4.90 4.91 v out (v) -40 -20 0 20 40 60 80 100 120 temperature (c) max min n = 1000 median el8170, el8173
9 fn7490.6 august 31, 2009 figure 31. el8170 v out low vs temperature, r l = 1k, v + , v - = 2.5v figure 32. el8173 v out low vs temperature, r l = 1k, v + , v - = 2.5v figure 33. el8170 + slew rate vs temperature, input 0.015v @ gain + 100 figure 34. el8173 + slew rate vs temperature, input 0.015v @ gain + 100 figure 35. el8170 - slew rate vs temperature, input 0.015v @ gain + 100 figure 36. el8173 - slew rate vs temperature, input 0.015v @ gain + 100 typical performance curves v+ = +5v, v- = 0v, v cm = +2.5v, r l = open, unless otherwise specified. (continued) -40 -20 0 20 40 60 80 100 120 temperature (c) 80 100 120 140 160 180 200 v out (mv) min max n = 2000 median -40 -20 0 20 40 60 80 100 120 temperature (c) 80 100 120 140 160 180 200 v out (mv) min max n = 1000 median -40-20 0 20406080100120 temperature (c) 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 + slew rate (v/s) min max n = 2000 median -40-200 20406080100120 temperature (c) + slew rate (v/s) 0.40 0.45 0.50 0.55 0.60 0.65 0.70 min max n = 1000 median -40-200 20406080100120 temperature (c) - slew rate (v/s) 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 min max n = 2000 median -40 -20 0 20 40 60 80 100 120 temperature (c) - slew rate (v/s) 0.40 0.45 0.50 0.55 0.60 0.65 0.70 min max n = 1000 median el8170, el8173
10 fn7490.6 august 31, 2009 pin descriptions el8170, el8173 pin name equivalent circuit pin function 1 1 dnc do not connect; internal connection - must be left floating. 2 2 in- circuit 1a, circuit 1b high impedance input termi nals. el8170 input circuit is shown in circuit 1a, and the el8173 input circuit is shown in circuit 1b. el8173: to avoid offset drift, it is recommended that the term inals are not overdriven beyond 1v and the input current must never exceed 5ma. 3 3 in+ circuit 1a, circuit 1b 4 4 v- circuit 3 negative supply terminal. 5 5 fb- circuit 1a, circuit 1b high impedance feedback term inals. el8170 input circui t is shown in circuit 1a, and the el8173 input circuit is s hown in circuit 1b. el8173: to avoid offset drift, it is recommended that the terminals are not overdriven beyond 1v and the input current must never exceed 5ma. 8 8 fb+ circuit 1a, circuit 1b 7 7 v+ circuit 3 positiv e supply terminal. 6 6 vout circuit 2 output voltage. in- v+ v- v+ v- out circuit 2 circuit 1a v+ v- capacitively coupled esd clamp circuit 3 v+ v- circuit 1b fb- in- fb- in+ fb+ in+ fb+ el8170, el8173
11 fn7490.6 august 31, 2009 description of operat ion and applications information product description the el8170 and el8173 are micropower instrumentation amplifiers (in-amps) which deliver rail-to-rail input amplification and rail-to-rail output swing on a single + 2.4v to + 5.5v supply. the el8170 and el8173 also deliver excellent dc and ac specifications while consuming only 65a typical supply current. because the el8170 and el8173 provide an independent pair of feedback terminals to set the gain and to adjust output level, these in-amps achieve high common-mode rejection ratio regardless of the tolerance of the gain setting resistors. the el8173 is internally compensated for a minimum closed loop gain of 10 or gr eater, well suited for moderate to high gains. for higher gains, the el8170 is internally compensated for a minimum gain of 100. input protection all input and feedback terminals of the el8170 and el8173 have internal esd protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode drop beyond the supply rails. the inverting inputs and fb- inputs have esd diodes to the v-rail, and the non-inverting inputs and fb+ terminals have esd diodes to the v+ rail. the el8170 has additional back-to-back diodes across the input terminals and also across the feedback terminals. if overdriving the inputs is necessary, the external input current must never exceed 5ma. on the other hand, the el8173 has no clamps to limit the differential voltage on the input terminals allowing higher differential input voltages at lower gain applications. it is recommended however, that the input terminals of the e l8173 are not overdriven beyond 1v to avoid offset drift. an external series resistor may be used as an external protection to limit excessive external voltage and current from damaging the inputs. input stage and input voltage range the input terminals (in+ and in-) of the el8170 and el8173 are single differential pair bipolar pnp devices aided by an input range enhancement circuit to increase the headroom of operation of the common-mode input voltage. the feedback terminals (fb+ and fb-) also have a similar topology. as a result, the input common-mode voltage range of both the el8170 and el8173 is rail-to-rail. these in-amps are able to handle input voltages that are at or slightly beyond the supply and ground making these in-amps well suited for single + 5v or + 3.3v low voltage supply systems. there is no need to move the common-mode input of the in-amps to achieve symmetrical input voltage. input bias cancellation, input bias compensation both el8170 and el8173 feature an input bias cancellation/compensation circuit for both the input and feedback terminals (in+, in-, fb+ and fb-), achieving a low input bias current all throughout the input common-mode range and the operating temperature range. while the pnp bipolar input stages are biased with an adequate amount of biasing current for speed and increased noise performance, the input bias cancellation/compensation circuit sinks most of the base current of the input transistor leaving a small portion as input bias current, typically 500pa. in addition, the input bias cancellation/compensation circuit maintains a smooth and flat behavior of input bias current over the common mode range and over the operating temperature range. the input bias cancella tion, input bias compensation circuit operates from input voltages of 10mv above the negative supply to input voltag es slightly above the positive supply. see ?average input bias current vs common-mode input voltage? in the ?typical performance curves? beginning on page 4. output stage and output voltage range a pair of complementary mosf et devices drives the output v out to within a few millivolts of the supply rails. at a 100k load, the pmos sources current and pulls the output up to 4mv below the positive supply, while the nmos sinks current and pulls the output do wn to 4mv above the negative supply, or ground in the case of a single supply operation. the current sinking and sourci ng capability of the el8170 and el8173 are internally limited to 26ma. gain setting v in , the potential difference across in+ and in-, is replicated (less the input offset voltage) across fb+ and fb-. the objective of the el8170 and el8173 in-amp is to maintain the differential voltage across fb+ and fb- equal to in+ and in-; (fb- - fb+) = (in+ - in-). consequently, the transfer function can be derived. the ga in of the el8170 and el8173 is set by two external resist ors, the feedback resistor r f , and the gain resistor r g . el8170, el8173
12 fn7490.6 august 31, 2009 in figure 37, the fb+ pin and one end of resistor r g are connected to gnd. with this co nfiguration, equation 1 is only true for a positive swing in vin; negative input swings will be ignored and the output will be at ground. reference connection unlike a three op amp instrumentation amplifier, a finite series resistance seen at the ref terminal does not degrade the el8170 and el8173's high cmrr performance, eliminating the need for an additional external buffer amplifier. the circuit shown in figure 38 uses the fb+ pin as a ref terminal to center or to adjust the outpu t. because the fb+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the ref terminal. the reference voltage error due to the input bias current is minimized by keeping the values of the voltage divider resistors, r 1 and r 2 , as low as possible. any voltage applied to the ref terminal will shift v out by vref times the closed loop gain, which is set by resistors r f and r g according to equation 2. note that any noise or unwanted signals on the reference supply will be amplified at the output according to equation 2. the fb+ pin can also be connected to the other end of resistor, r g (see figure 39). keeping the basic concept that the el8170 and el8173 in-amps maintain constant differential voltage across the input terminals and feedback terminals (in+ - in- = fb+ - fb -), the transfer function of figure 39 can be derived (equation 3). note that the v ref gain term is eliminated, and susceptibility to external noise is reduced. external resistor mismatches because of the independent pair of feedback terminals provided by the el8170 and el8173, the cmrr is not degraded by any resistor mism atches. hence, unlike a three op amp and especially a two op amp in-amp, the el8170 and el8173 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing cmrr performance. the el8170 and el8173 cmrr is maintained regardless of the tolerance of the resistors used. 1 3 2 8 5 4 7 6 + - + - in+ in- fb+ fb- v+ v- + 2.4v to + 5.5v rf rg vout el8170, vcm vin/2 vin/2 figure 37. gain is set by two external resistors, r f and r g el8173 v out 1 r f r g -------- + ?? ?? ?? v in = (eq. 1) v out 1 r f r g -------- + ?? ?? ?? v in () 1 r f r g -------- + ?? ?? ?? v ref () + = (eq. 2) figure 38. gain setting and reference connection 1 3 2 8 5 4 7 6 + - + - in+ in- fb+ fb- v+ v- +2.4v to +5.5v rf rg vout el8170, vcm vin/2 vin/2 ref +2.4v to +5.5v r1 r2 el8173 figure 39. reference connection with an available v ref 1 3 2 8 5 4 7 6 + - + - in+ in- fb+ fb- v+ v- rf rg vout el8170, vcm vin/2 vin/2 vref +2.4v to +5.5v el8173 v out 1 r f r g -------- + ?? ?? ?? v in () v ref () + = (eq. 3) el8170, el8173
13 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7490.6 august 31, 2009 gain error and accuracy the el8173 has a gain error, e g , of 0.2% typical. the el8170 has an e g of 0.3% typical. the gain error indicated in the ?electrical specificat ions? table on page 2 is the inherent gain error of the el8170 and el8173 and does not include the gain error contributed by the resistors. there is an additional gain error due to the tolerance of the resistors used. the resulting non-ideal transfer function effectively becomes equation 4: where: e rg = tolerance of r g e rf = tolerance of r f e g = gain error of the el8170 or el8173 the term [1 - (e rg + e rf + e g )] is the deviation from the theoretical gain. thus, (e rg + e rf + e g ) is the total gain error. for example, if 1% resi stors are used for the el8170, the total gain error would be as shown in equation 5: power dissipation it is possible to exceed the +150c maximum junction temperatures under certain load and power-supply conditions. it is therefore important to calculate the maximum junction temperature (t jmax ) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. these paramete rs are related in equation 6: where: ?p dmaxtotal is the sum of the maximum power dissipation of each amplifier in the package (pd max ) ?pd max for each amplifier can be calculated as shown in equation 7: where: ?t max = maximum ambient temperature ? ja = thermal resistance of the package ?pd max = maximum power dissipation of 1 amplifier ?v s = supply voltage (magnitude of v + and v - ) ?i max = maximum supply current of 1 amplifier ?v outmax = maximum output voltage swing of the application ?r l = load resistance v out 1 r f r g -------- + ?? ?? ?? 1e rg e rf e g ++ () ? [] v in = (eq. 4) e rg e rf e g typical () ++ () = 0.01 0.01 0.003 ++ () = 2.3% = (eq. 5) t jmax t max ja xpd maxtotal () + = (eq. 6) pd max 2*v s i smax v s ( - v outmax ) v outmax r l ---------------------------- + = (eq. 7) el8170, el8173
14 fn7490.6 august 31, 2009 el8170, el8173 package outline drawing m8.15e 8 lead narrow body small outline plastic package rev 0, 08/09 unless otherwise specified, tolerance : decimal 0.05 the pin #1 identifier may be either a mold or mark feature. interlead flash or protrusions shall not exceed 0.25mm per side. dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "a" side view ?a typical recommended land pattern top view a b 4 4 0.25 a mc b c 0.10 c 5 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 4.90 0.10 3.90 0.10 1.27 0.43 0.076 0.63 0.23 4 4 detail "a" 0.22 0.03 0.175 0.075 1.45 0.1 1.75 max (1.27) (0.60) 6.0 0.20 reference to jedec ms-012. 6. side view ?b?

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