?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 rfd16N05, rfd16N05sm 16a, 50v, 0.047 ohm, n-channel power mosfets the rfd16N05 and rfd16N05sm n-channel power mosfets are manufactured using the megafet process. this process, which uses feature sizes approaching those of lsi integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. they were designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. these transistors can be operated directly from integrated circuits. formerly developmental type ta09771. features ? 16a, 50v r ds(on) = 0.047 ? temperature compensating pspice ? model peak current vs pulse width curve uis rating curve 175 o c operating temperature related literature - tb334 ?guidelines for soldering surface mount components to pc boards? symbol packaging jedec to-251aa jedec to-252aa ordering information part number package brand rfd16N05 to-251aa d16N05 rfd16N05sm to-252aa d16N05 note: when ordering, use the entire part number. add the suffix 9a to obtain the to-252aa variant in the tape and reel, i.e., rfd16N05sm9a. g d s source drain (flange) gate drain gate source drain (flange) data sheet november 2003 free datasheet http://www..net/
?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 absolute maximum ratings t c = 25 o c, unless otherwise specified rfd16N05, rfd16N05sm, units drain to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dss 50 v drain to gate voltage (note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr 50 v continuous drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d pulsed drain current (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 16 refer to peak current curve a gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v gs 20 v pulsed avalanche rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .e as refer to figure 5 power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d derate above 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 0.48 w w/ o c operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j, t stg -55 to 175 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 o c o c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. t j = 25 o c to 150 o c. electrical specifications t c = 25 o c, unless otherwise specified parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 a, v gs = 0v (figure 11) 50 - - v gate threshold voltage v gs(th) v gs = v ds , i d = 250 a2-4v zero gate voltage drain current i dss v ds = rated bv dss , v gs = 0v - - 1 a v ds = 0.8 x rated bv dss , v gs = 0v, t c = 150 o c --25 a gate to source leakage current i gss v gs = 20v - - 100 na drain to source on resistance (note 2) r ds(on) i d = 16a, v gs = 10v (figure 9) - - 0.047 ? turn-on time t (on) v dd = 25v, i d = 8a, r l = 3.125 ? , v gs = 10v, r gs = 25 ? (figure 13) - - 65 ns turn-on delay time t d(on) -14 - ns rise time t r -30 - ns turn-off delay time t d(off) -55 - ns fall time t f -30 - ns turn-off time t (off) - - 125 ns total gate charge q g(tot) v gs = 0v to 20v v dd = 40v, i d 16a, r l = 2.5 ? i g(ref) = 0.8ma (figure 13) - - 80 nc gate charge at 10v q g(10) v gs = 0v to 10v - - 45 nc threshold gate charge q (th) v gs = 0v to 2v - - 2.2 nc input capacitance c iss v ds = 25v, v gs = 0v, f = 1mhz (figure 12) - 900 - pf output capacitance c oss - 325 - pf reverse transfer capacitance c rss - 100 - pf thermal resistance junction to case r jc - - 2.083 o c/w thermal resistance junction to ambient r ja to-251 and to-252 - - 100 o c/w source to drain diode specifications parameter symbol test conditions min typ max units source to drain diode voltage v sd i sd = 16a - - 1.5 v diode reverse recovery time t rr i sd = 16a, di sd /dt = 100a/ s - - 125 ns notes: 2. pulse test: pulse width 250 s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3) and peak current capability curve (figure 5). rfd16N05, rfd16N05sm free datasheet http://www..net/
?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 typical performance curves unless otherwise specified figure 1. normalized power dissipation vs case tenperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. forward bias safe operating area figure 5. peak current capability t c , case temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 175 0.2 0.4 0.6 0.8 1.0 1.2 125 150 8 4 0 25 50 75 100 125 150 12 i d , drain current (a) t c , case temperature ( o c) 16 175 20 t, rectangular pulse duration (s) 10 -3 10 -2 10 -1 10 0 0.01 0.1 1 10 -5 10 1 10 -4 2 thermal impedance z jc , normalized notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a p dm t 1 t 2 0.01 0.02 0.05 0.1 0.2 0.5 single pulse v ds , drain to source voltage (v) 10 100 1 100 10 1 i d , drain current (a) limited by r ds(on) area may be operation in this 100 s 10ms 1ms dc 100ms v dss(max) = 50v t c = 25 o c single pulse t j = max rated t, pulse width (s) 10 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 i dm , peak current (a) 200 transconductance may limit current in this region i = i 25 175 - t c 150 for temperatures above 25 o c derate peak current as follows: v gs = 20v v gs = 10v t c = 25 o c rfd16N05, rfd16N05sm free datasheet http://www..net/
?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 note: refer to fairchild application notes an9321 and an9322. figure 6. unclamped inductive switching figure 7. saturation characteristics figure 8. transfer characteristics figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized gate threshold voltage vs junction temperature figure 11. normalized drain to source breakdown voltage vs junction temperature typical performance curves unless otherwise specified (continued) 0.1 110 10 0.01 100 1 i as , avalanche current (a) t av , time in avalanche (ms) t av = (l)(i as )/(1.3*rated bv dss - v dd ) if r = 0 if r 0 t av = (l/r)ln[(i as *r)/(1.3*rated bv dss -v dd ) +1] starting t j = 25 o c starting t j = 150 o c 0 10 20 0 1 234 30 i d , drain current (a) v ds , drain to source voltage (v) v gs = 4.5v v gs = 5v v gs = 7v 40 50 v gs = 8v v gs = 10v v gs = 20v v gs = 6v pulse duration = 80 s t c = 25 o c duty cycle = 0.5% max 046810 2 0 10 20 30 i ds(on) , drain to source current (a) v gs , gate to source voltage (v) 40 50 175 o c -55 o c 25 o c pulse duration = 80 s duty cycle = 0.5% max v dd = 15v 0 0.5 1.0 1.5 2.0 -80 -40 0 40 80 120 160 normalized drain to source t j , junction temperature ( o c) 200 2.5 pulse duration = 80 s v gs = 10v, i d = 16a on resistance duty cycle = 0.5% max -80 -40 0 40 80 120 160 0 0.5 1.0 2.0 normalized gate threshold voltage t j , junction temperature ( o c) 200 1.5 v gs = v ds , i d = 250 a 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 120 160 t j , junction temperature ( o c) normalized drain to source breakdown voltage 200 i d = 250 a rfd16N05, rfd16N05sm free datasheet http://www..net/
?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 figure 12. capacitance vs drain to source voltage note: refer to fairchild application notes an7254 and an7260. figure 13. normalized switching waveforms for constant gate current test circuits and waveforms figure 14. unclamped energy test circuit figure 15. unclamped energy waveforms figure 16. switching time test circuit figure 17. resistive switching waveforms typical performance curves unless otherwise specified (continued) 1600 1200 400 0 0 5 10 15 20 25 c, capacitance (pf) 800 v ds , drain to source voltage (v) c iss c rss c oss v gs = 0v, f = 1mhz c iss = c gs + c gd c rss = c gd c oss c ds + c gs 25 12.5 0 20 i gref () i gact () ------------------------ - t, time (ms) 80 i gref () i gact () --------------------- - 10 5 2.5 0 v ds , drain to source voltage (v) v gs , gate to source voltage (v) 50 7.5 37.5 v dd = bv dss v dd = bv dss 0.75 bv dss 0.50 bv dss 0.25 bv dss r l = 3.125 ? i g(ref) = 0.8ma v gs = 10v t p v gs 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0 v gs r l r gs dut + - v dd v ds v gs t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0 rfd16N05, rfd16N05sm free datasheet http://www..net/
?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 figure 18. gate charge test circuit figure 19. gate charge waveform test circuits and waveforms (continued) r l v gs + - v ds v dd dut i g(ref) v dd q g(th) v gs = 2v q g(10) v gs = 10v q g(tot) v gs = 20v v ds v gs i g(ref) 0 0 rfd16N05, rfd16N05sm free datasheet http://www..net/
?2003 fairchild semiconductor corporation rfd16N05, rfd16N05sm rev. b1 pspice electrical model .subckt rfd16N05 2 1 3 ; rev 10/31/94 ca 12 8 1.788e-10 cb 15 14 1.875e-10 cin 6 8 8.33e-10 dbody 7 5 dbdmod dbreak 5 11 dbkmod dplcap 10 5 dplcapmod ebreak 11 7 17 18 64.89 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 6 10 6 8 1 evto 20 6 18 8 1 it 8 17 1 ldrain 2 5 1e-9 lgate 1 9 4.56e-9 lsource 3 7 4.13e-9 mos1 16 6 8 8 mosmod m = 0.99 mos2 16 21 8 8 mosmod m = 0.01 rbreak 17 18 rbkmod 1 rdrain 50 16 rdsmod 0.4e-3 rgate 9 20 3.0 rin 6 8 1e9 rscl1 5 51 rsclmod 1e-6 rscl2 5 50 1e3 rsource 8 7 rdsmod 21.5e-3 rvto 18 19 rvtomod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 8 19 dc 1 vto 21 6 0.82 escl 51 50 value = {(v(5,51)/abs(v(5,51)))*(pwr(v(5,51)*1e6/94,7))} .model dbdmod d (is = 2.5e-13 rs = 7.1e-3 trs1 = 3.04e-3 trs2 = -10e-6 cjo = 1.12e-9 tt = 5.6e-8) .model dbkmod d (rs = 2.51e-1 trs1 = -6.57e-4 trs2 = 1.66e-6) .model dplcapmod d (cjo = 6.1e-10 is = 1e-30 n = 10) .model mosmod nmos (vto = 3.96 kp = 16.68 is = 1e-30 n = 10 tox = 1 l = 1u w = 1u) .model rbkmod res (tc1 = 1.07e-3 tc2 = -7.19e-7) .model rdsmod res (tc1 = 5.45e-3 tc2 = 1.66e-5) .model rsclmod res (tc1 = 1.25e-3 tc2 = 17e-6) .model rvtomod res (tc1 = -5.15e-3 tc2 = -4.83e-6) .model s1amod vswitch (ron = 1e-5 roff = 0.1 von = -5.25 voff= -3.25) .model s1bmod vswitch (ron = 1e-5 roff = 0.1 von = -3.25 voff= -5.25) .model s2amod vswitch (ron = 1e-5 roff = 0.1 von = 0.56 voff= 5.56) .model s2bmod vswitch (ron = 1e-5 roff = 0.1 von = 5.56 voff= 0.56) .ends note: for further discussion of the pspice model, consult a new pspice sub-circuit for the power mosfet featuring global temperature options ; written by william j. hepp and c. frank wheatley. evto + 13 ca cb egs eds rin cin mos1 mos2 dbreak ebreak dbody ldrain drain rsource lsource source rbreak rvto vbat it vto dplcap 6 10 5 16 21 8 14 7 3 17 18 19 2 + + + rdrain escl rscl1 rscl2 51 50 + s1a s2a s2b s1b 12 15 13 8 14 13 6 8 + - 5 8 - - 18 8 rgate gate lgate 20 9 1 esg + - 6 8 11 + - 17 18 5 51 rfd16N05, rfd16N05sm free datasheet http://www..net/
disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production littlefet? microcoupler? microfet? micropak? microwire? msx? msxpro? ocx? ocxpro? optologic ? optoplanar? pacman? pop? fact quiet series? fast ? fastr? frfet? globaloptoisolator? gto? hisec? i 2 c? implieddisconnect? isoplanar? rev. i5 acex? activearray? bottomless? coolfet? crossvolt ? dome? ecospark? e 2 cmos tm ensigna tm fact? power247? powertrench ? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? rapidconnect? silent switcher ? smart start? spm? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic ? tinyopto? trutranslation? uhc? ultrafet ? vcx? across the board. around the world.? the power franchise? programmable active droop? free datasheet http://www..net/
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