technical data 1 integral 2 x 1 w portable/mains-fed stereo power amplifier the ILA7053N is an integrated class-b stereo power amplifier in a 16-lead dual-in-line (dil) plastic package. the device, consisting of two btl amplifiers, is primarily developed for portable audio applications but may also be used in mains-fed applications. ? no external components ? no switch-on/off clicks ? good overall stability ? low power consumption ? short-circuit-proof quick reference data parameter conditions symbol min. max. unit supply voltage range v p 318v total quiescent current r l = i tot -16ma output power r l = 8 ? , v p = 6 v, thd = 10% p o -1w internal voltage gain r l = 8 ? , v p = 6 v gv 38 40 db total harmonic distortion p o = 0.1 w, r l = 8 ? , v p = 6 v thd - 1.0 % pinning pin symbol description pin symbol description 01 sgnd1 signal ground 1 09 out2a output 2 (positive) 02 in1 input 1 10 gnd2 power ground 2 03 n.c. not connected 11 n.c. not connected 04 n.c. not connected 12 out2b output 2 (negative) 05 v p supply voltage 13 out1b output 1 (negative) 06 in2 input 2 14 gnd1 power ground 1 07 sgnd2 signal ground 2 15 n.c. not connected 08 n.c. not connected 16 out1a output 1 (positive) note the information contained within the parentheses refer to the polarity of the loudspeaker terminal to which the output must be connected. functional description the ILA7053N is a stereo output amplifier, with an internal gain of 39 db, which is primarily for use in portable audio applications but may also be used in mains-fed applications. the current trends in portable audio application design is to reduce the number of batteries which results in a reduction of output power when using conventional output stages. the ILA7053N overcomes this problem by using the bridge-tied-load (btl) principle and is capable of delivering 1.2 w into an 8 ? load (v p = 6 v). the load can be short-circuited under all input conditions. ILA7053N n suffix 1 16 ordering information ILA7053N plastic dip t a = -25 to +70 c
ILA7053N 2 integral fig.1 block diagram, test and application circuit diagram ratings limiting values in accordance with the absolute maximum system parameter conditions symbol min. max. unit supply voltage v p -18v non-repetitive peak output current i osm -1.5a total power dissipation p tot see fig.2 crystal temperature tc - + ? 150 c storage temperature range tstg -60 +150 c thermal resistance from junction to ambient r th j-a 60 k/w power dissipation assuming: v p = 6 v and r l = 8 ? : the maximum sinewave dissipation is 1.8 w, therefore t amb(max.) = 150 - (60 x 1.8) = 42c. 05 02 01 16 13 +vp r s =5,1 k ? ? ? ? rl 1 0,1 f 220,0 f + - + _ cin=(0,47-10,0) f s g n d 1 06 07 10 12 09 r s =5,1 k ? ? ? ? rl 2 gnd-2 s g n d 2 14 gnd-1 ILA7053N 11 15 08 03 04 vi2 vi1 cin=(0,47-10,0) f - +
ILA7053N 3 integral fig.2 power derating curve characteristics v p = 6 v; r l = 8 w; tamb = 25c; unless otherwise specified; measured from test circuit, fig.2. parameter conditions symbol min. max. unit supply voltage range v p 318 v total quiescent current r l = ; note 1 i tot -16 ma input bias current i bias - 300 na supply voltage ripple rejection note 2 svrr 40 - db input impedance z i 100 (type) k ? dc output offset voltage note 3 ? v 13-16 - 100 mv ? v 12-9 - 100 mv note 4 v no(rms) - 300 v noise output voltage (rms value) note 5 v no(rms) 60 (type) v output power thd = 10% po 0.8 w total harmonic distortion p o = 0.1 w thd - 1.0 % internal voltage gain g v 38 40 db channel balance ? g v -1 db channel separation note 3 40 - db frequency response r l = 8 ? , v p = 6 v f 0.02 to 20 (type) khz notes to the characteristics 1. with a practical load the total quiescent current depends on the offset voltage. 2. ripple rejection measured at the output with r s = 0 ? and f = 100 hz to 10 khz. the ripple voltage (200 mv) is applied to the positive supply rail. 3. r s = 5 k ? . 4. the noise output voltage (rms value) is measured with r s = 5 k ? , unweighted and a bandwidth of 60 hz to 15 khz. 5. the noise output voltage (rms value) is measured with r s = 0 ? and f = 500 khz with 5 khz bandwidth. if r l = 8 ? and l l = 200 mh the noise output current is only 100 na.
ILA7053N 4 integral fig.3. output power as a function of voltage supply (v p ); thd = 10%; f = 1 khz; t amb = 60 oc. fig.4. output power as a function of voltage supply (v p ); thd = 10%; f = 1 khz; t amb = 60 oc. 0,0 2,0 4,0 6,0 8,0 10,0 12,0 14,0 0,0 2,0 4,0 6,0 8,0 10,0 12,0 14,0 16,0 18,0 v p , v ip, ma ta=-25 c, ta=25 c, ta=70 c, t= -25 c t= 25 c t=70 c 0,000 0,500 1,000 1,500 2,000 2,500 3,000 0,0 1,0 2,0 3,0 4,0 5,0 6,0 7,0 8,0 9,0 10,0 11,0 12,0 13,0 vp (v) po (w) ta=+25 c, rl= 8 ? ta=+60 c, rl= 8 ? ta=+25 c, rl= 16 ? ta=+60 c, rl= 16 ? ta=+25 c, rl= 25 ? ta=+60 c, rl= 25 ? ta=+25 c, rl=8 ? ta=+25 c, rl+16 ? ta=+60 c, rl=16 ? ta=+25 c, rl=25 ? ta=+60 c, rl=25 ? ta=+60 c, rl=8 ?
ILA7053N 5 integral fig.5 total harmonic distortion as a function of output power; f = 1 khz; t amb = 60 oc. 0,0 2,0 4,0 6,0 8,0 10,0 12,0 0,000 0,200 0,400 0,600 0,800 1,000 1,200 1,400 po (w) thd (%) ta=+25c, up=6,0v, rl=8 ? , ta=+60c, up=6,0v, rl=8 ? , ta=+25c, up=7,5v, rl=16 ? , ta=+60c, up=7,5v, rl=16 ? , ta=+25c, up=9,0v, rl=25 ? , ta=+60c, up=9,0v, rl=25 ? ,
ILA7053N 6 integral chip pad diagram location of marking (mm): left lower corner x=1.657, y=0.415. chip thickness: 0.35 0.02 mm. pad location location (left lower corner), mm pad no symbol xy pad size, mm 01 sgnd1 0.600 0.155 0.120 x 0.120 02 in1 1.089 0.162 0.120 x 0.120 03 v p 1.555 0.661 0.120 x 0.120 04 v p 1.745 0.661 0.120 x 0.120 05 in2 2.211 0.162 0.120 x 0.120 06 sgnd2 2.700 0.155 0.120 x 0.120 07 out2a 3.091 1.440 0.120 x 0.120 08 gnd2 2.451 1.947 0.120 x 0.120 09 out2b 1.811 1.440 0.120 x 0.120 10 out1b 1.489 1.440 0.120 x 0.120 11 gnd1 0.849 1.947 0.120 x 0.120 12 out1a 0.209 1.440 0.120 x 0.120 note: pad location is given as per passivation layer 01 02 03 04 05 06 07 08 09 10 11 12 3.42 + 0.03 2.19 + 0.03 chip marking 710 (0,0) x y
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