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2014-01-07 rev.3.0 TK40E06N1 1 mosfets silicon n-channel mos (u-mos -h) TK40E06N1 TK40E06N1 TK40E06N1 TK40E06N1 start of commercial production 2012-04 1. 1. 1. 1. applications applications applications applications ? switching voltage regulators 2. 2. 2. 2. features features features features (1) low drain-source on-resistance: r ds(on) = 8.4 m ? (typ.) (v gs = 10 v) (2) low leakage current: i dss = 10 a (max) (v ds = 60 v) (3) enhancement mode: v th = 2.0 to 4.0 v (v ds = 10 v, i d = 0.3 ma) 3. 3. 3. 3. packaging and internal circuit packaging and internal circuit packaging and internal circuit packaging and internal circuit 1: gate 2: drain (heatsink) 3: source 4. 4. 4. 4. absolute maximum ratings (note) (t absolute maximum ratings (note) (t absolute maximum ratings (note) (t absolute maximum ratings (note) (t a a a a = 25 = 25 = 25 = 25 unless otherwise specified) unless otherwise specified) unless otherwise specified) unless otherwise specified) characteristics drain-source voltage gate-source voltage drain current (dc) drain current (dc) drain current (pulsed) power dissipation single-pulse avalanche energy avalanche current channel temperature storage temperature (silicon limit) (t = 1 ms) (t c = 25 ) (note 1), (note 2) (note 1), (note 3) (note 1) (note 4) symbol v dss v gss i d i d i dp p d e as i ar t ch t stg rating 60 20 60 40 125 67 40 40 150 -55 to 150 unit v a w mj a note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook ("handling precautions"/"derating concept and methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). to-220
2014-01-07 rev.3.0 TK40E06N1 2 5. 5. 5. 5. thermal characteristics thermal characteristics thermal characteristics thermal characteristics characteristics channel-to-case thermal resistance channel-to-ambient thermal resistance symbol r th(ch-c) r th(ch-a) max 1.84 83.3 unit /w note 1: ensure that the channel temperature does not exceed 150 . note 2: limited by silicon chip capability. note 3: device mounted with heatsink so that r th(ch-c) becomes 4.16 /w. note 4: v dd = 48 v, t ch = 25 (initial), l = 19.2 h, i ar = 40 a note: this transistor is sensitive to electrostatic discharge and should be handled with care. 2014-01-07 rev.3.0 TK40E06N1 3 6. 6. 6. 6. electrical characteristics electrical characteristics electrical characteristics electrical characteristics 6.1. 6.1. 6.1. 6.1. static characteristics (t static characteristics (t static characteristics (t static characteristics (t a a a a = 25 = 25 = 25 = 25 unless otherwise specified) unless otherwise specified) unless otherwise specified) unless otherwise specified) characteristics gate leakage current drain cut-off current drain-source breakdown voltage drain-source breakdown voltage gate threshold voltage drain-source on-resistance (note 5) symbol i gss i dss v (br)dss v (br)dsx v th r ds(on) test condition v gs = 20 v, v ds = 0 v v ds = 60 v, v gs = 0 v i d = 10 ma, v gs = 0 v i d = 10 ma, v gs = -20 v v ds = 10 v, i d = 0.3 ma v gs = 10 v, i d = 20 a min 60 45 2.0 typ. 8.4 max 0.1 10 4.0 10.4 unit a v m ? note 5: if a reverse bias is applied between gate and source, this device enters v (br)dsx mode. note that the drain- source breakdown voltage is lowered in this mode. 6.2. 6.2. 6.2. 6.2. dynamic characteristics (t dynamic characteristics (t dynamic characteristics (t dynamic characteristics (t a a a a = 25 = 25 = 25 = 25 unless otherwise specified) unless otherwise specified) unless otherwise specified) unless otherwise specified) characteristics input capacitance reverse transfer capacitance output capacitance gate resistance switching time (rise time) switching time (turn-on time) switching time (fall time) switching time (turn-off time) symbol c iss c rss c oss r g t r t on t f t off test condition v ds = 30 v, v gs = 0 v, f = 1 mhz see figure 6.2.1. min typ. 1700 40 580 2.0 14 30 13 36 max unit pf ? ns fig. fig. fig. fig. 6.2.1 6.2.1 6.2.1 6.2.1 switching time test circuit switching time test circuit switching time test circuit switching time test circuit 6.3. 6.3. 6.3. 6.3. gate charge characteristics (t gate charge characteristics (t gate charge characteristics (t gate charge characteristics (t a a a a = 25 = 25 = 25 = 25 unless otherwise specified) unless otherwise specified) unless otherwise specified) unless otherwise specified) characteristics total gate charge (gate-source plus gate-drain) gate-source charge 1 gate-drain charge gate switch charge symbol q g q gs1 q gd q sw test condition v dd 48 v, v gs = 10 v, i d = 40 a min typ. 23 8 7 10 max unit nc 2014-01-07 rev.3.0 TK40E06N1 4 6.4. 6.4. 6.4. 6.4. source-drain characteristics (t source-drain characteristics (t source-drain characteristics (t source-drain characteristics (t a a a a = 25 = 25 = 25 = 25 unless otherwise specified) unless otherwise specified) unless otherwise specified) unless otherwise specified) characteristics reverse drain current (dc) reverse drain current (pulsed) diode forward voltage reverse recovery time reverse recovery charge (note 6) (note 6) (note 7) (note 7) symbol i dr i drp v dsf t rr q rr test condition i dr = 40 a, v gs = 0 v i dr = 40 a, v gs = 0 v -di dr /dt = 100 a/ s min typ. 46 62 max 40 125 -1.2 unit a v ns nc note 6: ensure that the channel temperature does not exceed 150 . note 7: ensure that v ds peak does not exceed v dss . 7. 7. 7. 7. marking marking marking marking fig. fig. fig. fig. 7.1 7.1 7.1 7.1 marking marking marking marking 2014-01-07 rev.3.0 TK40E06N1 5 8. 8. 8. 8. characteristics curves (note) characteristics curves (note) characteristics curves (note) characteristics curves (note) fig. fig. fig. fig. 8.1 8.1 8.1 8.1 i i i i d d d d - v - v - v - v ds ds ds ds fig. fig. fig. fig. 8.2 8.2 8.2 8.2 i i i i d d d d - v - v - v - v ds ds ds ds fig. fig. fig. fig. 8.3 8.3 8.3 8.3 i i i i d d d d - v - v - v - v gs gs gs gs fig. fig. fig. fig. 8.4 8.4 8.4 8.4 v v v v ds ds ds ds - v - v - v - v gs gs gs gs fig. fig. fig. fig. 8.5 8.5 8.5 8.5 r r r r ds(on) ds(on) ds(on) ds(on) - i - i - i - i d d d d fig. fig. fig. fig. 8.6 8.6 8.6 8.6 r r r r ds(on) ds(on) ds(on) ds(on) - t - t - t - t a a a a 2014-01-07 rev.3.0 TK40E06N1 6 fig. fig. fig. fig. 8.7 8.7 8.7 8.7 i i i i dr dr dr dr - v - v - v - v ds ds ds ds fig. fig. fig. fig. 8.8 8.8 8.8 8.8 capacitance - v capacitance - v capacitance - v capacitance - v ds ds ds ds fig. fig. fig. fig. 8.9 8.9 8.9 8.9 v v v v th th th th - t - t - t - t a a a a fig. fig. fig. fig. 8.10 8.10 8.10 8.10 dynamic input/output characteristics dynamic input/output characteristics dynamic input/output characteristics dynamic input/output characteristics fig. fig. fig. fig. 8.11 8.11 8.11 8.11 p p p p d d d d - t - t - t - t c c c c (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) 2014-01-07 rev.3.0 TK40E06N1 7 fig. fig. fig. fig. 8.12 8.12 8.12 8.12 r r r r th th th th /r /r /r /r th(ch-c) th(ch-c) th(ch-c) th(ch-c) - t - t - t - t w w w w (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) fig. fig. fig. fig. 8.13 8.13 8.13 8.13 safe operating area safe operating area safe operating area safe operating area (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) fig. fig. fig. fig. 8.14 8.14 8.14 8.14 e e e e as as as as - t - t - t - t ch ch ch ch (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) (guaranteed maximum) fig. fig. fig. fig. 8.15 8.15 8.15 8.15 test circuit/waveform test circuit/waveform test circuit/waveform test circuit/waveform note: the above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 2014-01-07 rev.3.0 TK40E06N1 8 package dimensions package dimensions package dimensions package dimensions unit: mm weight: 1.93 g (typ.) package name(s) toshiba: 2-10x1a nickname: to-220 2014-01-07 rev.3.0 TK40E06N1 9 restrictions on product use restrictions on product use restrictions on product use restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. ? 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("unintended use"). ("unintended use"). ("unintended use"). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. if you use product for if you use product for if you use product for if you use product for unintended use, toshiba assumes no liability for product. unintended use, toshiba assumes no liability for product. unintended use, toshiba assumes no liability for product. unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy product, whether in whole or in part. ? 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