S1C17704 seiko epson corporation low power 16-bit single chip microcontroller low power mcu (operating voltage 1.8 v, 1 a/sleep, 2.6 a/halt) 64k-byte flash memory and 4k-byte ram high quality and stable display lcd driver with voltage booster (56 seg 32 com) infrared remote controller with carrier generator s1c17 high performance 16-bit risc cpu core with c optimized compact code and serial ice support ? descriptions the S1C17704 is a 16-bit mcu that features high-speed oper ation, low power cons umption, small size, large address space, and on-chip ice. the S1C17704 consists of an s1c17 cpu co re, a 64k-byte flash memory, a 4k-byte ram, serial interface modules (uart that supports high bit rate and irda 1.0, spi and i2c) for connecting various sensor modules, 8-bit timers, 16-bit timers, a pwm & capture timer, a clock time r, a stopwatch timer, a watchdog timer, 28 gpio ports, an lcd driver with 56-segment 32-common out puts and a voltage booster, a supply voltage detector, 32 khz (typ.) and 8.2 mhz (max.) oscillators, and a voltage regulator for generating the 1.8 v internal voltage. the S1C17704 is capable of high-speed operation (8.2 mhz) with low operating voltage (1.8 v). its 16-bi t risc processor executes one in struction in 1 clock cycles. the S1C17704 also provides an on-chip ice function that allows on-board erasing/pr ogramming of the embedded flash memory, on-board debugging and evaluating the program by connecting the S1C17704 to the icd mini (s5u1c17001h) with only three wires. the S1C17704 is suitable for battery driven app lications with sensor interf aces and up to 56 32-dot lcd display, such as remote controllers and sports watches. the product lineup offers two S1C17704 models with a different main oscillator. ? features cpu seiko epson original 16-bit risc cpu core s1c main (osc3) oscillator crystal/ ceramic oscillator 8.2 mhz (max.) cr oscillator 2.2 mhz (max.) sub (osc1) oscillator crystal oscillator 32.768 khz (typ.) built-in flash memory 64k bytes (for instru ctions and data), 1,000 erase/program cycles, read/program protection on-board programming by a debugging tool such as icd mini (s5u1c17704h) and self-programming by software control built-in ram 4k bytes built-in display ram 576 bytes i/o ports max. 28 general-purpose i/o ports (pins are shared with the peripheral i/o.) serial interfaces spi (master/slave) 1ch i 2 c (master) 1ch uart (115200 bps, irda 1.0) 1ch remote controller (remc) 1ch timers 8-bit timer (t8f) 1ch 16-bit timer (t16) 3ch pwm & capture timer (t16e) 1ch 8-bit osc1 timer (t8osc1) 1ch clock timer (ct) 1ch stopwatch timer (swt) 1ch watchdog timer (wdt) 1ch lcd driver 56 seg 32 com or 72 seg 16 com (1/5 bias) built-in voltage booster supply voltage detector 13 programmable det ection levels (1.8 v to 2.7 v) interrupts reset, nmi, 16 programmable interrupts (8 levels) power supply voltage 1.8 v to 3.6 v (for normal (low -power) operation with the 1.8 v internal voltage) 2.7 v to 3.6 v (for flash erasing/progr amming with the 2.5 v internal voltage) operating temperat ure -20c to 70c power consumption sleep state: 1 a typ. halt state: 2.6 a typ. (32 khz osc1 crystal oscillator, lcd off)
S1C17704 2 seiko epson corporation run state: 17 a typ. (32 khz osc1 crystal oscillator, lcd off) 1950 a typ. (8 mhz osc3 cera mic oscillator, lcd off) shipping form tqfp24-144pin plastic package(16 mm 16 mm 1.0 mm, lead pitch: 0.4 mm) pfbga6u-96 package*(6 mm 6 mm 1.0 mm, ball pitch: 0.5 mm) vfbga7h-161 package(7 mm 7 mm 1.0 mm, ball pitch: 0.5 mm) vfbga10h-144 package(10 mm 10 mm 1.0 mm, ball pitch: 0.8 mm) chip
S1C17704 seiko epson corporation 3 ? block diagram semiconductor operations division seiko epson corporation ic sales department ic international sales group 421-8 hino, hino-shi, tokyo 191-8501, japan phone: +81-42-587-5814 fax: +81-42-587-5117 notice: no part of this material may be reproduced or duplicated in any fo rm or by any means without the written permission of seiko ep son. seiko epson reserves the right to make c hanges to this material without notice. se iko epson does not assume any liability of a ny kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, furt her, there is no representation that this material is app licable to products requiring high level reliab ility, such as, medical products. moreo ver, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that any thing made in accordance with this material will be free from any patent or copy right infringement of a third party. this material or portio ns thereof may contain technology or the subject relati ng to strategic products under the control of the foreign exchange and foreign trade la w of japan and may require an export license from the ministry of economy, trade and industry or other approval from another government ag ency. all brands or product names mentioned herein are trademarks and/ or registered trademarks of t heir respective companies. ?seiko epson corporation 2010, all rights reserved * this product uses superflas h? technology licensed from s ilicon storage technology, inc. http://www.epson.jp/device/semicon_e/ ? epson semiconductor website document code: 411717801 first issue oct, 2009 revised feb, 2010 in ja p an cpu core s1c17 internal ram (4k byt es) flash memory (64k bytes) display ram (57 6 bytes) test circuit reset cir cui t i/o 1 (0 x4 000-) i nterr up t co ntr ol l er pre scaler 8-bit timer 16-bit t imer ua rt spi i 2 c i/o 2 (0 x5 000-) power generator svd circuit lcd driver m is c r eg i st er oscillat or/ cl ock gen erato r 8-bit osc t imer clock timer stop watch tim er watchdog timer pwm & captur e tim er remote controller i/o port/ i/o mux test 1-3 #test #reset excl0-2 (p16, p07, p06) si n, s out , sc lk (p23-25) sd i, s do, spi clk (p20-22) sda, scl (p14- 15) p0 0- 07, p10-17, p2 0- 27, p30-33 remi(p04), remo(p05) excl3(p27), tout(p26) fout1( p13), fout3( p30) osc1- 2, osc3-4 seg 0-5 5/71, com0-31/15 v dd , v ss , v d1 , v d2 , v c 1-v c5 , ca-cg dc lk , dst 2, ds io(p31-33) 32 bits 1 cyc le 16 bits 1- 5 cycles 8 bits 2-5 cycles 8/16 bits 3 cycles 8/16 bits 1 cycles interrupt sy stem cpu core s1c17 internal ram (4k byt es) flash memory (64k bytes) display ram (57 6 bytes) test circuit reset cir cui t i/o 1 (0 x4 000-) i nterr up t co ntr ol l er pre scaler 8-bit timer 16-bit t imer ua rt spi i 2 c i/o 2 (0 x5 000-) power generator svd circuit lcd driver m is c r eg i st er oscillat or/ cl ock gen erato r 8-bit osc t imer clock timer stop watch tim er watchdog timer pwm & captur e tim er remote controller i/o port/ i/o mux test 1-3 #test #reset excl0-2 (p16, p07, p06) si n, s out , sc lk (p23-25) sd i, s do, spi clk (p20-22) sda, scl (p14- 15) p0 0- 07, p10-17, p2 0- 27, p30-33 remi(p04), remo(p05) excl3(p27), tout(p26) fout1( p13), fout3( p30) osc1- 2, osc3-4 seg 0-5 5/71, com0-31/15 v dd , v ss , v d1 , v d2 , v c 1-v c5 , ca-cg dc lk , dst 2, ds io(p31-33) 32 bits 1 cyc le 16 bits 1- 5 cycles 8 bits 2-5 cycles 8/16 bits 3 cycles 8/16 bits 1 cycles interrupt sy stem
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