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this is information on a product in full production. september 2013 doc id 022694 rev. 3 1/32 1 vnd5t050ak-e double channel high-side driver with analog current sense for 24 v automotive applications datasheet ? production data features general ? very low standby current ? 3.0 v cmos compatible input ? optimized electromagnetic emission ? very low electromagnetic susceptibility ? compliance with european directive 2002/95/ec ? fault reset standby pin (fr_stby) diagnostic functions ? proportional load current sense ? high current sense precision for wide range currents ? off-state open load detection ? output short to v cc detection ? overload and short to ground latch off ? thermal shutdown latch-off ? very low current sense leakage protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? thermal shutdown ? electrostatic discharge protection application all types of resistive, inductive and capacitive loads description the vnd5t050ak-e is a monolithic device made using stmicroelectronics ? vipower ? technology, intended for driving resistive or inductive loads with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes. this device integrates an analog current sense which delivers a current proportional to the load current. fault conditions such as overload, overtemperature or short to v cc are reported via the current sense pin. output current limitation protects the device in overload condition. the device will latch off in case of overload or thermal shutdown. the device is reset by a low level pass on the fault reset standby pin. a permanent low level on the inputs and fault reset standby pin disable all outputs and set the device in standby mode. max transient supply voltage v cc 58 v operating voltage range v cc 8 to 36v typ on-state resistance (per ch.) r on 50 m current limitation (typ) i lim 34 a off state supply current i s 2 a powersso-24 www.st.com
contents vnd5t050ak-e 2/32 doc id 022694 rev. 3 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 21 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 22 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4 maximum demagnetization energy (vcc = 24 v) . . . . . . . . . . . . . . . . . . 23 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 powersso-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
vnd5t050ak-e list of tables doc id 022694 rev. 3 3/32 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (v cc =24v; t j = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. current sense (8 v < v cc < 36 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. open-load detection (v fr_stby = 5 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 12. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 13. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 14. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 16. powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 17. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
list of figures vnd5t050ak-e 4/32 doc id 022694 rev. 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram powersso-24 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. t reset definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. t stby definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. output stuck to v cc detection delay time at fr stby activation . . . . . . . . . . . . . . . . . . . . . 14 figure 9. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. delay response time between rising edge of output current and rising edge of current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13. off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 15. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 16. input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 20. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 21. i limh vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 25. maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. powersso-24 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 27. r thj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . . 24 figure 28. powersso-24 thermal impedance junction ambient single pulse (one channel on). . . . . 25 figure 29. thermal fitting model of a double channel hsd in powersso-24 . . . . . . . . . . . . . . . . . . . 25 figure 30. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 31. powersso-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 32. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
vnd5t050ak-e block diagram and pin description doc id 022694 rev. 3 5/32 1 block diagram and pin description figure 1. block diagram table 1. pin function name function v cc battery connection out 1,2 power output gnd ground connection in 1,2 voltage controlled input pins with hysteresis, cmos compatible. they control output switch state cs 1,2 analog current sense pins, they deliver a current proportional to the load current fr_stby in case of latch-off for overtemperature/overcurrent conditions, a low pulse on the fr_stby pin is needed to reset the channel. the device enters in standby mode if all inputs and the fr_stby pin are low. control & diagnostic 2 v cc ch1 logic driver current limitation power clamp over temperature undervoltage ch2 overload protection (active power limitation) in1 in2 cs1 cs2 fr_stby gnd out2 out1 signal clamp gapgcft00643 current sense v senseh control & diagnostic 1 off-state open-load v on limitation
block diagram and pin description vnd5t050ak-e 6/32 doc id 022694 rev. 3 figure 2. configuration diagram powersso-24 (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input fr_stby floating not allowed x (1) 1. x: do not care. xx x to ground through 10 k resistor x not allowed through 10 k resistor through 10 k 0o wer33/ 7$ % 9 && )5b6we\ ,1 1& 9 && &6 *1' 9 && 1& ,1 1& 1& 287 287 287 287 287 287 287 287 287 287 287 287 &6 ("1($'5
vnd5t050ak-e electrical specifications doc id 022694 rev. 3 7/32 2 electrical specifications figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the ratings listed in tab le 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the conditions reported in this section for extended periods may affect device reliability. i s i gnd v cc v cc outn i outn csn i sensen inn i inn gnd fr_stby v fr_stby v inn v sensen v outn v fn i fr_stby table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 58 v -v cc reverse dc supply voltage 0.3 v -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a -i out reverse dc output current 30 a i in dc input current -1 to 10 ma i fr_stby fault reset standby dc input current -1 to 1.5 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc - 58 to +v cc v e max maximum switching energy l = 50 mh; v bat =32v; t jstart = 150c; i out =2a 210 mj
electrical specifications vnd5t050ak-e 8/32 doc id 022694 rev. 3 2.2 thermal data l smax maximum strain inductance in short circuit condition r l =300m , v batt =32v, t jstart =150c, l out =i lmhmax 40 h v esd electrostatic discharge (human body model: r = 1.5 k ; c = 100 pf) ?in 1,2 ?cs 1,2 ?fr_stby ?out 1,2 ?v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter value unit r thj-case thermal resistance junction-case (max.) (with one channel on) 2 c/w r thj-amb thermal resistance junction-ambient (max.) see figure 27 c/w
vnd5t050ak-e electrical specifications doc id 022694 rev. 3 9/32 2.3 electrical characteristics 8v electrical specifications vnd5t050ak-e 10/32 doc id 022694 rev. 3 figure 4. t reset definition table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in = 0.9 v 1 a v ih input high level voltage 2.1 v i ih high level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v v fr_stby_l fault reset standby low level voltage 0.9 v i fr_stby_l low level fault reset standby current v fr_stby = 0.9 v 1 a v fr_stby_h fault reset standby high level voltage 2.1 v i fr_stby_h high level fault reset standby current v fr_stby = 2.1 v 10 a v fr_stby (hyst) fault reset standby hysteresis voltage 0.25 v v fr_stby_cl fault reset standby clamp voltage i fr_stby = 15 ma (t < 10 ms) 11 15 v i fr_stby = -1 ma -0.7 v t reset overload latch-off reset time see figure 4 224s t stby standby delay see figure 5 120 1200 s 7buhvhw )5b67%< ,1 287387 &6 2yhuordg &kdqqho *$3*&)7
vnd5t050ak-e electrical specifications doc id 022694 rev. 3 11/32 figure 5. t stby definition table 8. protections and diagnostics symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 24 v 24 34 46 a 5v electrical specifications vnd5t050ak-e 12/32 doc id 022694 rev. 3 k 1 i out /i sense i out = 0.7 a; v sense = 2 v; t j = -40 c...150 c 1597 2190 2764 dk 1 /k 1 (1) current sense ratio drift i out = 0.7 a; v sense =2v; t j = -40 c...150 c -15 15 % k 2 i out /i sense i out = 2 a; v sense =2v; t j = -40 c...150 c 1850 2190 2550 dk 2 /k 2 (1) current sense ratio drift i out = 2 a; v sense = 2 v; t j = -40 c...150 c -10 +10 % k 3 i out /i sense i out = 8 a; v sense = 4 v; t j = -40 c...150 c 2050 2190 2280 dk 3 /k 3 (1) current sense ratio drift i out = 8 a; v sense = 4 v; t j = -40 c...150 c -3 3 % i sense0 analog sense leakage current i out = 0 a; v sense = 0 v; v in =0v; t j = -40c...150c 01a i out = 0 a; v sense = 0 v; v in =5v; t j = -40c...150c 02a v sense max analog sense output voltage i out = 8 a; r sense = 3.9 k 5v v senseh analog sense output voltage in fault condition (2) v cc =24v; r sense =3.9k 7.5 8.5 9.5 v i senseh analog sense output current in fault condition (2) v cc =24v; v sense =5v 4.9 7 12 ma t dsense2h delay response time from rising edge of input pins v sense <4v; 0.15a vnd5t050ak-e electrical specifications doc id 022694 rev. 3 13/32 figure 6. current sense delay characteristics figure 7. open-load off-state delay timing 1. v fr_stby = high. table 10. open-load detection (v fr_stby =5v) symbol parameter test conditions min. typ. max. unit v ol open-load off-state voltage detection threshold v in =0v; 8v v ol v senseh
electrical specifications vnd5t050ak-e 14/32 doc id 022694 rev. 3 figure 8. output stuck to v cc detection delay time at fr stby activation figure 9. switching characteristics w ')567.b21 )5 67%< 9 &6 9 vhqvh+ ,qsxw /rz *$3*&)7 v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
vnd5t050ak-e electrical specifications doc id 022694 rev. 3 15/32 figure 10. delay response time between rising edge of output current and rising edge of current sense figure 11. output voltage drop limitation v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax t dsense2h t t t v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
electrical specifications vnd5t050ak-e 16/32 doc id 022694 rev. 3 figure 12. device behavior in overload condition overload reset vsenseh overload diag reset in n output n t reset cs n overload (*) channel n 123 4 5 overload 67 t reset 8 fault_reset overload reset vsenseh overload diag reset in n output n t reset cs n overload (*) channel n 123 4 5 overload 67 t reset 8 fault_reset in n output n t reset cs n overload (*) channel n 123 4 5 overload 67 t reset 8 fault_reset fault_reset 1: output n and cs n controlled by in n . 2: fault_reset from ?0? to ?1? ? no action on cs n pin 3: overload latch-off. inn high ? cs n high 4: fault_reset low and temp channeln < overload_reset ? overload latch reset after t_reset 4 to 5: fault_reset low and in n high ? thermal cycling, cs n high 5: fault_reset high ? latch-off reset disabled 6 to 7: overload event and fault_reset high ? latch-off, no thermal cycling 7 to 8: overload diagnostic disabled/enabled by the input 8: overload latch-off reset by fault_reset (*) overload = thermal shutdown or power limitation
vnd5t050ak-e electrical specifications doc id 022694 rev. 3 17/32 table 11. truth table conditions fault reset standby input output sense standby l l l 0 normal operation x x l h l h 0 nominal overload x x l h l h 0 > nominal overtemperature / short to ground x l h l h h l cycling latched 0 v senseh v senseh undervoltage x x l 0 short to v bat l h x l l h h h h 0 v senseh < nominal open load off-state (with pull-up) l h x l l h h h h 0 v senseh 0 negative output voltage clamp x l negative 0
electrical specifications vnd5t050ak-e 18/32 doc id 022694 rev. 3 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv 1 - 450 v - 600 v 5000 pulses 0.5 s 5 s 1 ms, 50 2a + 37 v + 50 v 5000 pulses 0.2 s 5 s 50 s, 2 3a - 150 v - 200 v 1h 90 ms 100 ms 0.1 s, 50 3b + 150 v + 200 v 1h 90 ms 100 ms 0.1 s, 50 4 - 12 v - 16 v 1 pulse 100 ms, 0.01 5b (1) 1. valid in case of external load dump clamp: 58 v maximum referred to ground. + 123 v + 174 v 1 pulse 350 ms, 1 table 13. electrical transient requirements (part 2) (1) 1. in order to garantee the iso transient classes a minimum 10 k protection resistors are needed an logic pins. iso 7637-2: 2004(e) test pulse test level results iii iv 1c c 2a c c 3a c c 3b (2) 2. without capacitor between v cc and gnd. ee 3b (3) 3. with 10 nf between v cc and gnd. cc 4c c 5b (4) 4. external load dump clamp, 58 v maximum, referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
vnd5t050ak-e electrical specifications doc id 022694 rev. 3 19/32 2.4 electrical characteristics curves figure 13. off-state output current figure 14. high level input current figure 15. input clamp voltage figure 16. input low level voltage figure 17. input high level voltage figure 18. input hysteresis voltage 7f>?&@ ,orii>x$@ 2ii6wdwh 9ff 9 9lq 9rxw ("1($'5 7f>?&@ ,lk>x$@ 9lq 9 ("1($'5 7f>?&@ 9lfo>9@ ,lq p$ ("1($'5 7f>?&@ 9lo>9@ ("1($'5 7f>?&@ 9lk>9@ ("1($'5 7f>?&@ 9lk\vw>9@ ("1($'5
electrical specifications vnd5t050ak-e 20/32 doc id 022694 rev. 3 figure 19. on-state resistance vs t case figure 20. on-state resistance vs v cc figure 21. i limh vs t case figure 22. turn-on voltage slope figure 23. turn-off voltage slope 7f>?&@ 5rq>p2kp@ ,rxw $ 9ff 9 ("1($'5 9ff>9@ 5rq>p2kp@ 7f ?& 7f ?& 7f ?& 7f ?& ("1($'5 7f>?&@ ,olpk>$@ 9ff 9 ("1($'5 7f>?&@ g9rxwgw2q>9xv@ 9ff 9 5o ("1($'5 7f>?&@ g9rxwgw2ii>9xv@ 9ff 9 5o ("1($'5
vnd5t050ak-e application information doc id 022694 rev. 3 21/32 3 application information figure 24. application schematic 3.1 gnd protection network against reverse battery 3.1.1 solution 1: resistor in the ground line (r gnd only) this solution can be used with any type of load. the following equations are an indication on how to size the r gnd resistor. 1. r gnd 600 mv / (i s(on)max ). 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . v cc gnd out d gnd r gnd d ld mcu +5v v gnd fr_stby in r prot r prot r prot r sense cs c ext
application information vnd5t050ak-e 22/32 doc id 022694 rev. 3 if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests solution 2 is used (see below). 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd =4.7k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network will produce a shift ( 600 mv) in the input threshold and in the status output values, if the microprocessor ground is not common to the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds to v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/2 table. 3.3 mcu i/os protection if a ground protection network is used and negative transients are present on the v cc line, the control pins will be pulled negative. st suggests that a resistor (r prot ) be inserted in line to prevent the microcontroller i/o pins from latching-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = -600 v and i latchup 20 ma; v oh c 4.5 v 30 k r prot 180 k . recommended r prot value is 60 k .
vnd5t050ak-e application information doc id 022694 rev. 3 23/32 3.4 maximum demagnetization energy (v cc = 24 v) figure 25. maximum turn-off current versus inductance 1. values are generated with r l =0 . in case of repetitive pulses, t jstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specif ied above for curves a and b. c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse demagnetization demagnetization demagnetization t v in , i l ,$ /p+ 91'7 6lqjoh 3xovh 5hshwlwlyhsxovh7mvwduw ?& 5hshwlwlyhsxovh7mvwduw ?& *$3*&)7 " # $
package and pcb thermal data vnd5t050ak-e 24/32 doc id 022694 rev. 3 4 package and pcb thermal data 4.1 powersso-24 thermal data figure 26. powersso-24 pc board 1. layout condition of r th and z th measurements (board finish thickness 1.6 mm +/- 10%; board double layer; board dimension 77x86; board material fr4; cu th ickness 0.070mm (front and back side); thermal vias separation 1.2 mm; thermal via diameter 0.3 mm +/- 0.08 mm; cu thickness on vias 0.025 mm; footprint dimension 4.1 mm x 6.5 mm). figure 27. r thj-amb vs pcb copper area in open box free air condition (one channel on) gapgcft00418 57+mdpe 57+mdpe 3&%&xkhdwvlqnduhdfpa ("1($'5
vnd5t050ak-e package and pcb thermal data doc id 022694 rev. 3 25/32 figure 28. powersso-24 thermal impedance junction ambient single pulse (one channel on) figure 29. thermal fitting model of a double channel hsd in powersso-24 1. the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered equation 1: pulse calculation formula 1 10 100 0.01 0.1 1 10 100 1000 zth (c/w) time (s) cu=8 cm2 cu=2 cm2 cu=foot print gapgcft00634 z th r th z thtp 1 ? () + ? = where t p t ? =
package and pcb thermal data vnd5t050ak-e 26/32 doc id 022694 rev. 3 table 15. thermal parameters area/island (cm 2 )footprint28 r1 = r7 (c/w) 0.6 r2 = r8 (c/w) 0.75 r3 (c/w) 1 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 c1 = c7 (w.s/c) 0.005 c2 = c8 (w.s/c) 0.01 c3 (w.s/c) 0.05 c4 (w.s/c) 0.3 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17
vnd5t050ak-e package and packing information doc id 022694 rev. 3 27/32 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-24 mechanical data figure 30. powersso-24 package dimensions
package and packing information vnd5t050ak-e 28/32 doc id 022694 rev. 3 table 16. powersso-24 mechanical data symbol millimeters min. typ. max. a 2.15 2.47 a2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 d 10.10 10.50 e7.4 7.6 e0.8 e3 8.8 g 0.1 g1 0.06 h10.1 10.5 h 0.4 k5o l 0.55 0.85 n 10o x4.1 4.7 y6.5 7.1
vnd5t050ak-e package and packing information doc id 022694 rev. 3 29/32 5.3 powersso-24 packing information figure 31. powersso-24 tube shipment (no suffix) figure 32. powersso-24 tape and reel shipment (suffix ?tr?) a c b all dimensions are in mm. base q.ty 49 bulk q.ty 1225 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.05) 1.55 hole diameter d1 (min) 1.5 hole position f ( 0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
order codes vnd5t050ak-e 30/32 doc id 022694 rev. 3 6 order codes table 17. device summary package order codes tube tape and reel powersso-24 vnd5t050ak-e VND5T050AKTR-E
vnd5t050ak-e revision history doc id 022694 rev. 3 31/32 7 revision history table 18. document revision history date revision changes 07-feb-2012 1 initial release. 30-mar-2012 2 updated table 2: suggested connections for unused and not connected pins table 9: current sense (8 v < v cc <36v) : ?dk 0 /k 0 : updated test condition from i out = 100 a to i out = 100 ma table 13: electrical transient requirements (part 2) : ? added note 18-sep-2013 3 updated disclaimer.
vnd5t050ak-e 32/32 doc id 022694 rev. 3 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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