? semiconductor components industries, llc, 2012 january, 2012 ? rev. 0 1 publication order number: AND9068/d AND9068/d reading on semiconductor igbt datasheets abstract the insulated gate bipolar transistor is a power switch well suited for high power applications such as motor control, ups and solar inverters, and induction heating. if the application requirements are well understood, the correct igbt can easily be selected from the electrical properties provided in the manufacturers? datasheet. this application note describes the electrical parameters provided in the on semiconductor igbt datasheet. part number the part numbering convention for on semiconductor igbts is shown in figure 1. many of the device ratings and details are described in the part number and can be understood using this code. figure 1. on semiconductor igbt part numbering key brief this section provides a description of the device and lists its key features and typical applications. table 1. absolute maximum ratings rating symbol value unit collector ? emitter voltage v ces 600 v collector current @ t c = 25 c @ t c = 100 c i c 30 15 a pulsed collector current, t pulse limited by t jmax i cm 60 a diode forward current @ t c = 25 c @ t c = 100 c i f 30 15 a diode pulsed current, t pulse limited by t jmax i fm 60 a gate ? emitter voltage v ge 20 v power dissipation @ t c = 25 c @ t c = 100 c p d 130 55 w short circuit withstand time v ge = 15 v, v ce = 400 v, t j +150 c t sc 10 s operating junction temperat- ure range t j ? 55 to +150 c storage temperature range t stg ? 55 to +150 c lead temperature for solder- ing, 1/8? from case for 5 seconds t sld 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended oper- ating conditions may affect device reliability. absolute maximum ratings the absolute maximum ratings shown in table 1 are typical for an igbt. this table sets the limits, both electrical http://onsemi.com application note free datasheet http://
AND9068/d http://onsemi.com 2 and thermal, beyond which the functionality is no longer guaranteed and at which physical damage may occur. the absolute maximum rating does not guarantee that the device will meet the data sheet specifications when it is within that range. the specific voltage, temperature, current and other limitations are called out in the electrical characteristics table. collector ? emitter voltage, v ces the maximum rated voltage to be applied between the collector and emitter terminals of the device is specified to prevent the device from entering avalanche breakdown and dissipating excessive energy in the device. the avalanche breakdown voltage varies with temperature and is at its minimum at low temperature. the breakdown voltage of the device is designed to meet the minimum voltage rating at ? 40 c. collector current, i c the maximum collector current is defined as the amount of current that is allowed to flow continuously into the collector for a given case temperature, t c , in order to reach the maximum allowable junction temperature, t j (150 c). the collector current can be stated in the following equation form: i c t j t c r th(j ? c)(igbt) v ce(sat) where r th(j ? c) is the thermal resistance of the package and v ce(sat) is the on ? state voltage at the specified current, i c . since it is the current being sought after, and v ce(sat) is a function of current, the equation must be solved iteratively. an estimate of the v ce(sat) for a given collector current and temperature can found in the typical datasheet curves, discussed later. it is very important to understand that the absolute maximum collector current is defined based on very specific electrical and thermal conditions. the capability of the igbt to conduct current without exceeding the absolute maximum junction temperature is highly dependent on the thermal performance of the system, including heatsinks and airflow. pulsed collector current, i cm the pulsed collector current describes the peak collector current pulse above the rated collector current specification that can flow while remaining below the maximum junction temperature. the maximum allowable pulsed current in turn depends on the pulse width, duty cycle and thermal conditions of the device. diode forward current, i f the diode forward current is the maximum continuous current that can flow at a fixed case temperature, t c , while remaining under the maximum junction temperature, t j . this is determined in similar fashion to the v ce(sat) , above. i f t j t c r th(j ? c)(diode) v f the equation relating i f and v f to the temperature rise is the same, although the r th(j ? c) for the diode is specified separately. diode pulsed current, i fm the pulsed diode current describes the peak diode current pulse above the rated collector current specification that can flow while the junction remains below its maximum temperature. the maximum allowable pulsed current in turn depends on the pulse width, duty cycle and thermal conditions of the device. gate ? emitter voltage, v ge the gate ? emitter voltage, v ge describes maximum voltage to be applied from gate to emitter under fault conditions. the gate ? emitter voltage is limited by the gate oxide material properties and thickness. the oxide is typically capable of withstanding greater than 80v before the oxide ruptures, but to ensure reliability over the lifetime of the device, and to allow for transient overvoltage conditions in the application, this voltage is limited to well below the gate rupture voltage. power dissipation, p d the maximum power dissipation is determined using the following equation: p d t j t c r th(j ? c) where r th(j ? c) is the thermal resistance of the package. the maximum power dissipation is given at case temperatures of 25 c and 100 c, where the maximum junction temperature is 150 c. short circuit withstand time, t sc the short circuit withstand time describes the ability of the device to carry high current and sustain high voltage at the same time. the device must withstand at least the rated short circuit withstand time with specified voltages applied from collector to emitter and from gate to emitter. the collector ? emitter voltage specified for the test will vary based on the minimum blocking voltage capability of the device. the gate ? emitter voltage is usually 15 v. the current flowing through the device under these conditions can far exceed the rated current, and is limited by the igbt forward transconductance, an electrical parameter described below. the failure mode during this fault condition is usually thermal in nature. operating junction temperature range, t j this is the junction temperature range in which the device is guaranteed to operate without physical or electrical damage or reduced life expectancy. free datasheet http://
AND9068/d http://onsemi.com 3 storage temperature range, t stg this is the tem perature range in which the device may be stored, without electrical bias, without reducing the life expectancy of the device. lead temperature for soldering, t sld the maximum allowable soldering temperature is limited by the thermal conduction from the leads to the junction and die attach regions of the device. the maximum lead temperature is also dependent on the duration for which the soldering iron is applied to the lead. the maximum time for application of the heat is specified in the conditions of this rating. thermal characteristics table 2. table of igbt and diode thermal characteristics rating symbol value unit thermal resistance junction to case, for igbt r th(j-c) 1.1 c/w thermal resistance junction to case, for diode r th(j-c) 2.4 c/w thermal resistance junction to ambient r th(j-a) 60 c/w thermal resistance junction ? to ? case, r th(j ? c) the value for the thermal resistance given in table 2 represents the steady ? state thermal resistance under dc power conditions, applied to the igbt. the thermal resistance is derated for a square power pulse for reference in designing pulse width modulated applications and is described in the graph of thermal resistance for varying pulse width and duty ratio, shown in figure 2, below. 0.001 0.01 0.1 1 10 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse time (s) single pulse duty factor = t 1 /t 2 peak t j = p dm x z jc + t c 0.2 0.1 0.05 0.02 0.01 z jc , thermal response duty cycle = 0.5 figure 2. igbt transient thermal response curve for varying duty ratio for a copackaged device such as the ngtb15n60eg the thermal resistance from the junction to case is specified separately for the igbt and the diode. thermal resistance junction ? to ? ambient, r th(j ? a) this is the entire thermal resistance from the silicon junction ? to ? ambient. electrical characteristics static characteristics the static, or dc, electrical characteristics are shown in table 3. table 3. igbt static electrical characteristics parameter test conditions symbol min typ max unit static characteristic collector ? emitter breakdown voltage, gate ? emitter short ? circuited v ge = 0 v, i c = 500 a v (br)ces 600 ? ? v collector ? emitter saturation voltage v ge = 15 v , i c = 15 a v ge = 15 v , i c = 15 a, t j = 150 c v cesat ? ? 1.7 2.1 1.95 2.4 v gate ? emitter threshold voltage v ge = v ce , i c = 250 a v ge(th) 4.5 6.5 v free datasheet http://
AND9068/d http://onsemi.com 4 table 3. igbt static electrical characteristics parameter unit max typ min symbol test conditions static characteristic collector ? emitter cut ? off current, gate ? emitter short ? circuited v ge = 0 v, v ce = 600 v v ge = 0 v, v ce = 600 v, t j = 150 c i ces ? ? 10 ? ? 200 a gate leakage current, collector ? emitter short ? circuited v ge = 20 v, v ce = 0 v i ges ? ? 100 na forward transconductance v ce = 20 v, i c = 15 a g fs ? 10.1 ? s collector ? emitter breakdown voltage, v (br)ces this is the minimum off ? state forward blocking voltage guaranteed over the operating temperature range. it is specified with the gate terminal tied to the emitter with a specified collector current large enough to place the device into avalanche. collector ? emitter saturation voltage, v ce(sat) v ce(sat) is an important figure of merit, since it is directly related to the conduction losses of the device. this is the voltage drop from collector to emitter for a specified gate voltage and collector current. both a typical value and a maximum value are specified in the electrical table for both 25 c and 150 c. in addition to the electrical limits in the table, the datasheet includes a graph describing the dependence of v ce(sat) on temperature, as shown in figure 3. the graph describes the typical part and does not guarantee performance, but it can be used as a starting point to determine the v ce(sat) for a given temperature. the curves are given for v ge = 15 v and various collector currents. t j , junction temperature ( c) v ce , collector ? to ? emitter voltage (v) i c = 30 a i c = 15 a i c = 10 a i c = 5 a 3.5 3 2.5 2 1.5 1 0.5 0 ? 60 ? 40 ? 20 0 20 40 60 80 100 120 140160 figure 3. graph of the temperature dependence of v ce(sat) the v ce(sat) values in the electrical parameter table are only given for v ge = 15 v. if the gate of the igbt is being driven by a different voltage, the output characteristics shown in figure 4 can also be useful in approximating the v ce(sat) . this chart shows the i c dependence on v ce for various gate ? emitter voltages. the datasheet contains output characteristics for t a = ? 40, 25, and 150 c. v ce , collector ? to ? emitter voltage (v) i ce , collector current (a) t a = ? 40 c v ge = 17 v 15 v 13 v 11 v 9 v 7 v 60 50 40 30 20 10 0 01 2 345 6789 figure 4. graph of the output characteristics of the igbt at 25 c the characteristic curves and typical relationships should never be substituted for worst case design values. good design practices and board ? level design evaluation are critical for a reliable system. gate ? emitter threshold voltage, v ge(th) this parameter describes the gate to emitter voltage required for a specified amount of collector current to flow. this defines the gate to emitter voltage at which the device enters the on ? state. t ypically this test is based on a collector current flow proportional to the die size. collector ? emitter cut ? off ? current, i ces this specifies the leakage current one can expect in the off ? state forward blocking mode. it is specified at the maximum rated blocking voltage, v ces with the gate ? to ? emitter voltage equal to zero volts. the maximum allowable value of leakage current occurs at the maximum junction temperature. gate leakage current, i ges the absolute maximum value of gate leakage current is typically specified at a gate voltage of 20 v while the collector and emitter are grounded. free datasheet http://
AND9068/d http://onsemi.com 5 forward transconductance, g fs this is the amount of change in collector current for an incremental change in the gate to emitter voltage, measured in siemens (or mhos). it is specified at the room temperature rated current of the device, and typically with the device in full saturation, where a further increase in collector ? emitter voltage no longer leads to an additional increase in collector current. a typical collector ? emitter voltage used for this test is 20 v. figure 5 illustrates the g fs measurement. figure 5. illustration of the measurement of igbt g fs dynamic characteristics table 4. igbt dynamic electrical characteristics parameter test conditions symbol min typ max unit dynamic characteristic input capacitance v ce = 20 v, v ge = 0 v, f = 1 mhz c ies ? 2600 ? pf output capacitance c oes ? 64 ? reverse transfer capacitance c res ? 42 ? gate charge total v ce = 480 v, i c = 15 a, v ge = 15 v q g 80 nc gate to emitter charge q ge 24 gate to collector charge q gc 33 the dynamic electrical characteristics which include device capacitances and gate charge are given in the electrical table, as shown in table 4. igbt capacitances are similar to those described for power mosfets. the datasheet describes the measurable terminal capacitances, c ies , c oes , and c res . they are specified in the electrical table at a fixed collector bias voltage; however, the capacitances are voltage dependant, as can be seen in figure 6. the capacitances specified on the datasheet are convenient and easily measured. they relate to the pin to pin capacitances shown in figure 7 and described below. v ce , collector ? to ? emitter voltage (v) c, capacitance (pf) c ies c oes c res v ge = 0 v, f = 1 mhz 10000 1000 100 10 0 10 20 30 100 40 60 80 90 70 50 figure 6. igbt capacitance versus collector ? emitter voltage showing voltage dependance of c oes and c res free datasheet http://
AND9068/d http://onsemi.com 6 figure 7. pin ? to ? pin capacitances of the igbt c ies c ge c gc with c ce shorted c oes c gc c ce c res c gc input capacitance, c ies the input capacitance is made up of the parallel combination of gate ? emitter and gate ? collector capacitances, when the collector and emitter are tied together. the gate ? emitter capacitance is constant, as it consists mainly of the metal ? oxide ? semiconductor capacitance. the gate ? collector capacitance is a combination of a fixed oxide capacitor and a p ? n junction capacitor. this results in a voltage dependence that is slightly more complex than that of a p ? n junction. output capacitance, c oes the output capacitance is formed by the parallel combination of the gate ? collector and collector ? emitter capacitances. as mentioned above, the gate ? collector capacitance is voltage dependant. this is also true for the collector ? emitter capacitance. the voltage dependence of the collector ? emitter junction is that of a p ? n junction. transfer capacitance, c res the transfer capacitance is composed only of the gate ? collector capacitance. its role in the device operation is critical, as it provides negative feedback between the collector and the gate. this capacitance is responsible for the plateau on the gate charge curve. the change in collector ? emitter voltage forces a current through c res which reduces the gate drive current while the collector voltage is changing. gate charge, total, q g input capacitance is useful, but in terms of gate drive design, the more important figure of merit is the gate charge. it is used to size the gate drive components and predict switching losses in the driver. to measure gate charge the igbt gate is driven with a current and the gate voltage change is monitored versus time. the resulting gate voltage versus gate charge curve is shown in figure 8 for a constant current gate drive signal. q g is the total charge required on the gate to raise v ge to a specified gate voltage. on semiconductor devices are specified at v ge _ = _ 15 _ v. figure 8. theoretical gate charge curve showing v gp , q g , q ge , and q gc gate to emitter charge, q ge q ge is the amount of charge required to reach the plateau voltage v gp . this charge contributes to turning on the mos channel, at which time the collector ? emitter voltage begins to transition from high to low voltage. the level of v gp is dependent on the load current being switched and can be approximated by determining the v gs that corresponds to the switching current level from the transconductance curves in figure 5. gate to collector charge, q gc q gc is the amount of char ge required to charge the junction capacitor while the voltage from collector to emitter is decreasing in the transition between the off ? state and on ? state. this plateau corresponds to the charging of what is also known as the miller capacitance. switching characteristics the igbt switching characteristics are of great importance because they relate directly to the switching energy losses of the device. switching losses can be substantial, especially at higher frequencies and increasing temperature, where the switching losses increase. when voltage is applied to the gate, the input capacitance must first be charged to the threshold voltage, v ge(th) . this leads to a delay (t d(on) ) before the igbt collector current begins to flow. once the collector current begins to flow, the depletion layer that blocks the voltage during the off ? state begins to collapse. the voltage drops to the on ? state voltage drop, v ce(sat) . this is illustrated in figure 9. during turn ? off, the gate voltage is reduced to zero and the opposite occurs. the channel for the mosfet current is closed and the current begins to drop abruptly. the voltage free datasheet http://
AND9068/d http://onsemi.com 7 begins to rise from v ce(sat) as the charge due to current flow is removed. the voltage across the device reaches the supply voltage, and minority carriers that remain in the device after turn ? off cause a tail current that continues to flow. this is illustrated in figure 10. the switching characteristics are given in the electrical parametric table for t j = 25 and 150 c. these are shown in table 5. table 5. inductive switching electrical characteristics of the igbt parameter test conditions symbol min typ max unit switching characteristic , inductive load turn ? on delay time t j = 25 c v cc = 400 v, i c = 15 a r g = 22 v ge = 0 v / 15 v t d(on) 78 ns rise time t r 30 turn ? off delay time t d(off) 130 fall time t f 120 turn ? on switching loss e on 0.900 mj turn ? off switching loss e off 0.300 total switching loss e ts 1.200 turn ? on delay time t j = 150 c v cc = 400 v, i c = 15 a r g = 22 v ge = 0 v / 15 v t d(on) 76 ns rise time t r 33 turn ? off delay time t d(off) 133 fall time t f 223 turn ? on switching loss e on 1.10 mj turn ? off switching loss e off 0.510 total switching loss e ts 1.610 figure 9. turn ? on switching illustration showing the definitions of the turn ? on switching characteristics turn ? on delay time, t d(on) t d(on) is the time delay between the rising edge of the gate pulse and the rising edge of the igbt collector current. the measurement considers the point at which both the gate voltage and collector current reach 10% of their final specified value. rise time, t r the interval between the time the collector reaches 10% of its specified current value and the time it reaches 90% of its final value is defined as the rise time. turn ? on switching loss, e on the turn ? on switching losses are calculated by integrating the power dissipation (i c x v ce ) over the time interval starting when the collector current reaches 10% of its final value and ending when the collector ? emitter voltage reaches 5% of its peak value. turn ? off delay time, t d(off) t d(off) is the time delay between the falling edge of the gate pulse and the falling edge of the collector current. the measurement is the time between the point at which the gate voltage falls to 90% of its maximum value and the collector current reaches 10% of its final specified value. fall time, t f the fall time is defined as the time required for the collector current to drop from 90% to 10% of its initial value. turn ? off switching loss, e off the turn ? off switching energy losses are calculated to include the overlap of the rising collector ? emitter voltage free datasheet http://
AND9068/d http://onsemi.com 8 and the falling collector current. because the igbt is a minority carrier device, the collector current continues to flow after the time where the collector voltage has fully risen. this residual current, called tail current, eventually decays to zero. it is customary to add a fixed length of time to the end of the turn ? off time to capture the energy lost during the entire tail current. this added time is denoted as x s in figure 10. figure 10. turn ? off switching illustration showing the definitions of the turn ? off switching characteristics total switching loss, e ts the total switching losses comprise the sum of the turn ? on and turn ? off switching losses. typical switching time and switching energy loss graphs are given that describe the dependence of the switching characteristics on a variety of system variables. the dependence on junction temperature, collector current, collector ? emitter voltage, and gate resistance are all provided to aid in the design process. diode characteristics figure 11. copackaged igbt and freewheeling diode igbts are frequently used in applications where the load is inductive, such as motor control. these applications are hard switching and require that the igbt be in parallel with a freewheeling diode. on semiconductor offers copackaged igbt and diode devices. the diode cathode and igbt collector are connected together and the diode anode and igbt emitter are also connected, as shown in figure 11. the freewheeling diode takes the place of the body diode that otherwise exists in a power mosfet. for igbts that are copackaged with a freewheeling rectifier diode, the datasheet will also include electrical specifications for the diode, as shown in table 6. table 6. electrical characteristics of the diode parameter test conditions symbol min typ max unit diode characteristic forward voltage v ge = 0 v, i f = 15 a v ge = 0 v, i f = 15 a, t j = 150 c v f 1.6 1.6 1.85 v reverse recovery time t j = 25 c i f = 15 a, v r = 200 v di f /dt = 200 a/ s t rr 270 ns reverse recovery charge q rr 350 nc reverse recovery current i rrm 5 a reverse recovery time t j = 125 c i f = 15 a , v r = 200 v di f /dt = 200 a/ s t rr 350 ns reverse recovery charge q rr 1000 nc reverse recovery current i rrm 7.5 a forward voltage, v f the forward voltage of the rectifier is measured while the igbt gate and emitter terminals are tied together, ensuring the igbt is in its off ? state. a forcing current enters the emitter terminal and the emitter ? collector (anode ? cathode) voltage is measured. forward voltage is an important parameter in hard switching applications. v f is specified in the electrical table free datasheet http://
AND9068/d http://onsemi.com 9 for a given current and is specified at t j = 25 and 150 c. the datasheet also includes a graph showing the i f ? v f relationship for a typical part at t j = ? 40, 25, and 150 c, as shown in figure 12. v f , forward voltage (v) i f , forward current (a) ? 40 c 25 c 150 c 0 0.5 1 1.5 2 2.5 35 30 25 20 15 10 5 0 figure 12. diode forward characteristic curves for t j _ = _ ? 40, 25, and 150 c reverse recovery time, t rr the reverse recovery time, t rr , defines the time the diode takes to enter the reverse blocking state after conducting in the forward direction. it is defined as the length of time required for the reverse current to return to 10% of its peak reverse value (i rrm ). it is measured from the point in time where the diode current crosses zero. the time period is labeled in figure 13. figure 13. diode reverse recovery illustration showing the definitions of the reverse recovery characteristics reverse recovery charge, q rr the amount of charge that is recovered from the diode during turn ? off is referred to as reverse recovery charge, q rr . it is calculated by taking the integral of the reverse recovery current over the time period, t rr . reverse recovery current, i rrm i rrm is the peak current reached during diode turn off. i rrm depends on the initial forward diode current and the rate of change of the diode current, di/dt, used to turn the diode off. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 AND9068/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative free datasheet http://
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