r07ds1147ej0100 rev.1.00 page 1 of 7 jan 21, 2014 preliminary datasheet RJE0618JSP ?60v, ?10a, p channel thermal fet power switching description this fet has the over temperature shut-down capability sensin g to the junction temperature. this fet has the built-in over temperature shut-down circuit in the gate area. and this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. features ? for automotive applications ? built-in the over temperature shut-down circuit. ? high endurance capability against to the short circuit. ? latch type shut down operation (need 0 voltage recovery). ? built-in the current limitation circuit. ? high density mounting ? aec-q101 compliant outline 1 2 3 4 5 6 7 8 1, 2, 3 source 4gate 5, 6, 7, 8 drain renesas package code: prsp0008dd-d (package name: sop-8) d s g 4 1 58 d 6 d 7 d gate resistor temperature sensing circuit latch circuit gate shut-down circuit current limitation circuit s 3 s 2 absolute maximum ratings (ta = 25c) item symbol ratings unit drain to source voltage v dss ?60 v gate to source voltage v gss ?16 v v gss 2.5 v drain current i d note3 ?10 a body-drain diode reverse drain current i dr ?10 a avalanche current i ap note 2 ?5.4 a avalanche energy e ar note 2 125 mj channel dissipation pch note 1 2.5 w channel temperature tch 150 c storage temperature tstg ?55 to +150 c notes: 1 when using the glass epoxy board (fr4 40 40 1.6 mm), pw 10 s 2. tch = 25 c, rg 50 3. it provides by the current limitation lower bound value. r07ds1147ej0100 rev.1.00 jan 21, 2014
RJE0618JSP preliminary r07ds1147ej0100 rev.1.00 page 2 of 7 jan 21, 2014 typical operation characteristics (ta = 25c) item symbol min typ max unit test conditions input voltage v ih ?3.5 ? ? v v il ? ? ?1.2 v input current (gate non shut down) i ih1 ? ? ?100 a vi = ?8 v, v ds = 0 i ih2 ? ? ?50 a vi = ?3.5 v, v ds = 0 i il ? ? ?10 a vi = ?1.2 v, v ds = 0 input current (gate shut down) i ih(sd)1 ? ?0.8 ? ma vi = ?8 v, v ds = 0 i ih(sd)2 ? ?0.35 ? ma vi = ?3.5 v, v ds = 0 shut down temperature tsd ? 175 ? c channel temperature gate operation voltage vop ?3.5 ? ?12 v drain current (current limitation value) i d limt ?10 ? ? a v gs = ?12 v, v ds = ?10 v note 4 notes; 4. pulse test electrical characteristics (ta = 25c) item symbol min typ max unit test conditions drain current i d1 ? ? ?16 a v gs = ?3.5 v, v ds = ?10 v i d2 ? ? ?10 ma v gs = ?1.2 v, v ds = ?10 v i d3 ?10 ? ? a v gs = ?12 v, v ds = ?10 v note 5 drain to source breakdown voltage v (br)dss ?60 ? ? v i d = ?10 ma, v gs = 0 gate to source breakdown voltage v (br)gss ?16 ? ? v i g = ?800 a, v ds = 0 v (br)gss 2.5 ? ? v i g = 100 a, v ds = 0 gate to source leak current i gss1 ? ? ?100 a v gs = ?8 v, v ds = 0 i gss2 ? ? ?50 a v gs = ?3.5 v, v ds = 0 i gss3 ? ? ?10 a v gs = ?1.2 v, v ds = 0 i gss4 ? ? 100 a v gs = 2.4 v, v ds = 0 input current (shut down) i gs(op)1 ? ?0.8 ? ma v gs = ?8 v, v ds = 0 i gs(op)2 ? ?0.35 ? ma v gs = ?3.5 v, v ds = 0 zero gate voltage drain current i dss1 ? ? ?10 a v ds = ?60 v, v gs = 0 zero gate voltage drain current i dss2 ? ? ?10 a v ds = ?48 v, v gs = 0, ta = 125 c gate to source cutoff voltage v gs(off) ?1.0 ? ?2.1 v v ds = ?10 v, i d = ?1 ma forward transfer admittance |y fs | 5 8.4 ? s i d = ?5 ma, v ds = ?10 v note 5 static drain to source on state resistance r ds(on) ? 134 180 m i d = ?5 a, v gs = ?6 v note 5 r ds(on) ? 98 120 m i d = ?5 a, v gs = ?10 v note 5 output capacitance coss ? 444 ? pf v ds = ?10 v, v gs = 0, f = 1mhz turn-on delay time t d(on) ? 2.6 ? s v gs = ?10 v, i d = ?5 a, rise time t r ? 10.9 ? s r l = 6 turn-off delay time t d(off) ? 2.2 ? s fall time t f ? 3.4 ? s body-drain diode forward voltage v df ? ?0.92 ? v i f = ?10 a, v gs = 0 note 5 body-drain diode reverse recovery time t rr ? 100 ? ns i f = ?10 a, v gs = 0 di f /dt = 50 a/ s over load shut down operation time note 6 t os1 ? 2.54 ? ms v gs = ?5 v, v dd = ?16 v t os2 ? 1.35 ? ms v gs = ?5 v, v dd = ?24 v notes: 5. pulse test 6. including the junction temperature rise of the over loaded condition.
RJE0618JSP preliminary r07ds1147ej0100 rev.1.00 page 3 of 7 jan 21, 2014 main characteristics drain to source voltage v ds (v) drain current i d (a) maximum safe operation area drain to source voltage v ds (v) drain current i d (a) typical output characteristics gate to source voltage v gs (v) drain current i d (a) typical transfer characteristics gate to source voltage v gs (v) drain source saturation voltage vs. gate to source voltage drain current i d (a) static drain to source on state resistance vs. drain current channel dissipation pch (w) ambient temperature ta ( c) power vs. temperature derating 4.0 3.0 2.0 1.0 0 0 50 100 150 200 test condition. when using the glass epoxy board. (fr4 40 x 40 x 1.6 mm), (pw 10s) note 7: when using the glass epoxy board. (fr4 40 x 40 x 1.6 mm) drain to source saturation voltage v ds(on) (mv) static drain to source on state resistance r ds(on) (m) ? 100 ? 10 ? 1 ? 0.1 ? 0.01 ? 0.1 ? 0.01 ? 1 ? 10 ? 100 1 ms pw = 10 ms ta = 25 c operation in this area is limited r ds(on) note 7 dc operation (pw 10s) 0 ? 2 ? 4 ? 6 ? 8 ? 10 ? 2 ? 4 ? 6 ? 8 ? 10 ? 4.0 v ? 5.0 v v gs = ? 3.5 v ? 8.0 v ? 10.0 v pulse test ? 0 ? 1 ? 2 ? 3 ? 5 ? 4 25 c ? 40 c tc = 150 c ? 2 ? 4 ? 6 ? 8 ? 10 v ds = ? 10 v pulse test ? 2000 ? 800 ? 1200 ? 1600 ? 400 ? 0 ? 0 ? 2 ? 4 ? 6 ? 14 ? 16 ? 12 ? 8 ? 10 i d = ? 5 a ? 1 a ? 2 a pulse test ? 0.1 ? 1 ? 10 1000 100 10 v gs = ? 4 v ? 10 v pulse test thermal shut down operation area
RJE0618JSP preliminary r07ds1147ej0100 rev.1.00 page 4 of 7 jan 21, 2014 case temperature tc ( c) static drain to source on state resistance vs. temperature reverse drain current i dr (a) reverse recovery time t rr (ns) body-drain diode reverse recovery time drain current i d (a) switching time t ( s) switching characteristics source to drain voltage v sd (v) reverse drain current i dr (a) reverse drain current vs. source to drain voltage capacitance c (pf) drain to source voltage v ds (v) typical capacitance vs. drain to source voltage static drain to source on state resistance r ds(on) (m ) 200 250 100 150 50 ? 50 ? 25 0 25 50 75 100 125 150 0 v gs = ? 10 v v gs = ? 4 v i d = ? 5 a ? 5 a ? 2 a i d = ? 1 a, ? 2 a ? 1 a pulse test ? 0.1 ? 1 ? 10 100 1000 10 di / dt = 50 a / s v gs = 0, ta = 25 c ? 0.1 ? 1 ? 10 0.1 100 10 1 t r t f v gs = ? 10 v, v dd = ? 30 v pw = 300 s, duty 1 % t d(on) t d(off) ? 4 ? 3 ? 2 ? 1 0 ? 0.4 ? 0.8 ? 1.2 ? 1.6 ? 2.0 v gs = 0 v, 5 v v gs = ? 5 v pulse test ? 10 ? 30 ? 20 ? 50 ? 40 ? 60 10000 1000 100 10 ? 0 v gs = 0 f = 1 mhz forward transfer admittance vs. drain current forward transfer admittance |y fs | (s) drain current i d (a) C0.1 C1 C10 100 10 1 0.1 25c ta = C40c 150c v ds = C10 v pulse test
RJE0618JSP preliminary r07ds1147ej0100 rev.1.00 page 5 of 7 jan 21, 2014 gate to source voltage v gs (v) shutdown case temperature tc ( c) shutdown case temperature vs. gate to source voltage gate to source voltage v gs (v) gate to source voltage vs. shutdown time of load-short test shutdown time of load-short test pw (ms) ? 16 ? 4 ? 6 ? 8 ? 10 ? 12 ? 14 ? 2 ? 0 10 0.1 1 v dd = ? 16 v ? 24 v 200 180 160 140 120 0 100 ? 2 ? 4 ? 6 ? 8 ? 10 i d = ? 0.5 a pulse width pw (s) normalized transient thermal impedance s (t) normalized transient thermal impedance vs. pulse width 10 100 1 m 10 m 100 m 1 10 100 1000 10000 10 1 0.1 0.01 0.001 0.0001 d = 1 0.5 0 . 2 0 . 1 0 . 0 5 0 . 0 2 0 . 0 1 1 s h o t p u l s e dm p pw t d = pw t ch ? f(t) = s (t) ? ch ? f ch ? f = 83.3 c/w, ta = 25 c when using the glass epoxy board (fr4 40 40 1.6 mm)
RJE0618JSP preliminary r07ds1147ej0100 rev.1.00 page 6 of 7 jan 21, 2014 rg vin monitor d.u.t. vin ?10 v r l v dd = ?30 v t r t d(on) vin 90% 90% 10% 10% vout t d(off) vout monitor 90% 10% t f d. u. t rg i ap monitor v ds monitor v dd vin ?10 v 0 i d v ds i ap v (br)dss l v dd e ar =l i ap 2 2 1 v dss v dss ? v dd avalanche test circuit avalanche waveform switching tim e test circuit wavefor m
RJE0618JSP preliminary r07ds1147ej0100 rev.1.00 page 7 of 7 jan 21, 2014 package dimensions p-sop8-3.95 4.9-1.27 0.085g mass[typ.] fp-8dav prsp0008dd-d renesas code jeita package code previous code a 8 5 1 4 f b p c detail f terminal cross section 1.27 1.08 0.40 l 1 0.60 0.25 x 0.46 0.40 0.34 0.10 b p b 1 c 1 0.25 0.20 0.15 max nom min dimension in millimeters symbol reference 5.3 4.90 d 3.95 e 0.14 a 2 6.20 6.10 5.80 0.25 1.75 a 0.75 z l 8 0 c 1.27 e 0.1 y h e a 1 d * 1 * 2 e h e * 3 x m b p e z (ni/pd/au plating) 2. 1. dimensions "*1(nom)" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. index mark a 1 l 1 l detail f y package name sop-8 ordering information part no. quantity shipping container RJE0618JSP-00-j0 2500 pcs taping
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