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technical data 1 april 20 12 ver. 0 1 l ed driver ic description the ik 6028 are a n ode - grid led display drives 5 .0 v~18.0v with output size C 8 digit s x 9 segments and addition key scan function. serial interface (uart) provide s connection with microprocessor. pwm for buzzer driving. features ? o peration v oltage for digital part : 3.0v ~ 3.6 v ? o peration v oltage for output leds: 5 .0 v ~ 18.0v ? 7 - s tep i ndividual dimming control for each grid ? osc: built in (with external resistor) 500khz @ r=12.1k ? pulse segment c urrent: 27 ma - 39ma @ 8 digits x 9 segments ? key scanning: 7 x2 matrix ? serial interface (uart) . up to 57 , 600 bps ? 2 channel pwm ? operation temperature : - 40 ~ 85 c application lqfp - 32 ik 62 0 8 ? home appliance : washing machine, r efregerator, bidet , air c onditioner ordering information device operating temperature range package ik 6208lq t a = - 40 ? to 85 ? c lqfp - 32
i k 6208 a 2 april 20 12 ver. 0 1 p in description ik 6208 pin name i/ o description pin rcur i/ o a resistor is connected to this pin to determine the output currents and oscillation frequency. 4 tx o data output pin this pin output serial data by uart 6 rx i data input pin this pin receive serial data b y uart. 5 pwm 1/ 2 o 8 /16 bit pwm out put. 8/9 k1 /k2 i key data input pins the data sent to these pins are latched at the end of the d isplay cycle. (internal pull - up resistor) 14 /15 vdd 1/2 - power supply for digital part 11/1 6 vcc - power supply for output part 27 sg1/ ks1 to sg 9 o segment output pins (n - channel open drain) also acts as the key source 1 8 - 26 gr 1 to gr 8 o grid output pins (p - channel, open drain) 1 - 3, 2 8 - 3 2 gnd 1/2 - ground . 10/1 7 t1 - reserved. 7 block diagram s e r i a l d a t a i n t e r f a c e o s c d i s p l a y m e m o r y t i m i n g g e n e r a t o r k e y m a t r i x m e m o r y c u r r e n t r e f e r e n c e v o l t a g e r e f e r e n c e d i m m i n g c i r c u i t s e g m e n t d r i v e r / k e y s c a n o u t p u t / g r i d d r i v e r g r 1 g r 2 g r 3 g r 4 g r 5 g r 6 g r 7 g r 8 s g 1 / k s 1 s g 2 / k s 2 s g 3 / k s 3 s g 4 / k s 4 s g 5 / k s 5 s g 6 / k s 6 s g 7 / k s 7 s g 8 g n d v c c v d d k 1 r r g n d r c u r t x r x p w m p w m 1 s g 9 p w m 2 k 2
i k 6208 a 3 april 20 12 ver. 0 1 input / output configurations the schematic diagrams of the input and output circuits of the logic section are shown below. input pins: k1 /k2 output pins: gr 1 to gr 8 output pins: sg 1 /ks1 to sg 9 g n d
i k 6208 a 4 april 20 12 ver. 0 1 uart uart uses a total o f eleven bits per data byte: a start bit, 8 data bits (lsb first), a parity bit, and a stop bit. functional description commands a command is the first byte (b0 to b7) inputted to IK6208 via di/o pin after stb pin has changed f rom high to low sta te. if for some reason the stb pin is set high while data or commands a re being transmitted, the serial communicati on is initialized, and the data commands being transmitted are considered invalid. command 1: display mode setting commands IK6208 provid es 5 display modes settin g as shown in the diagram below. as stated earlier a command is the first one byte (b0 to b7) transmitted to IK6208 via the di/o pin when stb is low. however, for these commands, bit 5 to bit 8 (b4 to b7) are given a value of 0 . the display mode setting commands determine the number of segments and grids are used ( 9 segments, 8 grids). a display commands on must be executed in order to resume display. if the same mode setting is selected, no command execution is take place, t herefore, nothing happens. the display mode setting commands are also used to turn on or off the display. please refer to the diagram below. whe n the power is turned on, the display is turned off (b3 is 0) and the mode 111 is selected (b2 to b0 are 1 ) . display mode settings 111 : 8 grids ( 9 segments )
i k 6208 a 5 april 20 12 ver. 0 1 command 2 : data setting commands the data setting commands executes the data write mode for IK6208 . the data setting command, the bits5 and 6 (b4, b5) are given the value of 0. , bit7 (b6) is given the value of 1 while bit8 (b7) is given the value of 0. please refer to the diagram below. when power is turned on, bit 4 to bit 1 (b3 to b0) are given the value of 0. read data from command register: dout 1 st byte 2 nd byte b0 b1 b2 b3 b 4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 - b3 of command1 b0 - b3 of command2 b0 - b5 of command3 dont care command 3 : address setting commands address setting commands are used to set the address of the display memory. the address is considered valid if it has a value of 00h to 2f h. if the address is set to 3 0 h or higher, the data is ignored until a valid address is set. when power is turned on, the address is set at 00h. please refer to the diagram below.
i k 6208 a 6 april 20 12 ver. 0 1 display mode and ram address data transmit ted from an external device to IK6208 via the serial interface are stored in the display ram and are assigned addresses. when the power is turned on, the memory is set at 0. the ram addresses of IK6208 are given below i n 8 bit unit. dimming sg 1 sg 2 sg 5 sg 6 sg 9 gr 1 00h l 00h u 01h l 01h u 02h m 03 gr 2 04h l 04h u 05h l 05h u 06h m 07 gr3 08h l 08h u 09h l 09h u 0ah m 0b gr4 0ch l 0ch u 0dh l 0dh u 0eh m 0f gr5 10h l 10h u 11h l 11h u 12h m 13 gr6 14h l 14h u 15h l 15h u 16h m 17 gr7 18h l 18h u 19h l 19h u 1ah m 1b gr8 1ch l 1ch u 1dh l 1dh u 1eh m 1f b0 b3 b4 b7 b0 b3 b4 b7 b0 b 3 b4 b7 b0 b7 xxh l xxh u xxh l xxh u xxh m xx lower 4 bits higher 4 bits lower 4 bits higher 4 bits lower 4 higher 4 b its bits 8 bits 1st byte 2nd byte 3rd byte 4th byte din b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 dimming dont care data for sg1 ~ 5 data for sg 6~ 9 dont care d imming quantity settings: b2 b1 b0 pulse width 0 0 0 1/16 0 0 1 2/16 0 1 0 3/16 0 1 1 5/16 1 0 0 7/16 1 0 1 10/16 1 1 0 14/16 1 1 1 reserved
i k 6208 a 7 april 20 12 ver. 0 1 k ey matrix & key input data stor a ge ram key mat rix consists of 7 x 2 array as shown below: each data entered by each key (or any combination of keys) is stored as follows and read by a read command, starting from the last significant bit. when the most significant bit of the data (b0) has been read, the least significant bit of the next data (b7) is read. k1 k2 k1 k2 sg 1/ks1 sg 2/ks2 x 1st byte read sg 3/ks3 sg 4/ks4 x 2nd byte read sg 5/ks5 sg 6/ks6 x 3rd byte read sg 7/ks7 x 4th byte read b0 b1 b2 b3 b4 b5 b6 b7 key press=1, key no press=0 read. k 1 s g 1 / k s 1 s g 2 / k s 2 s g 3 / k s 3 s g 4 / k s 4 s g 5 / k s 5 s g 6 / k s 6 s g 7 / k s 7 k 2
i k 6208 a 8 april 20 12 ver. 0 1 scanning and display timing
i k 6208 a 9 april 20 12 ver. 0 1 serial commun ication format the following diagram shows the serial communication format. reception (data/comman d write) transmission (data read) stb di/o clk 1 2 3 7 8 if data continues b0 b1 b2 b6 b7
i k 6208 a 10 april 20 12 ver. 0 1 switching characteristic waveform switching characteristics waveform is given below.
i k 6208 a 11 april 20 12 ver. 0 1 ap p lications display memory is updated by incrementing addresses. please refer to the following diagram. where: command 1: display mode setting command 2: data setting command command 3: address setting command data 1 to n : transfer display data (48 bytes max.) the following diagram shows the waveforms when updating specific addresses. where: command 2 -- data setting command command 3 -- address setting command data -- display data
i k 6208 a 12 april 20 12 ver. 0 1 recommended software programming f lowchart note: 1. command 1 : display mode setting 2. command 2 : data setting commands 3. command 3 : address setting commands 4 . when ic power is applied for the first time, the contents of the display ram are not defin ed: thus, it is strongly suggested that the contents of the display ram must be cleared during the initial setting.
i k 6208 a 13 april 20 12 ver. 0 1 absolute maximum ratings (unless otherwise stated, ta=25 c , gnd=0v) parameter symbol rating units supply voltage vcc - 0.5 to +18 .0 v sup ply voltage v dd - 0.5 to + 4.0 v logic input voltage v i - 0.5 to v dd +0.5 v driver output current/pin i o hgr - 4 68 ma i olsg 46.8 ma maximum driver output current/total i total 4 70 ma operation temperature topr - 40 ~ +85 storage temperature tstg - 65 ~ 150 recommended operating range (unless otherwise stated, ta= - 40 to +85 c , gnd=0v) parameter symbol min typ max unit supply voltage vcc 5 .0 1 2 .0 1 5 .0 v logic supply voltage v dd 3.0 3.3 3.6 v high - level input volta ge v ih 0.7v dd . v dd v low - level input voltage v il 0 . 0.3 v dd v electrical characteristics (uart)
i k 6208 a 14 april 20 12 ver. 0 1 electrical characteristics (unless otherwise stated, vcc= 5 .0 ~ 18.0 v, v dd =3.3~ 3.6 v, gnd=0v, ta= - 40 ~ 85c) parameter symbol test condition min typ max uni t low - level output current i olsg vo=1.0v sg1/ks1 to sg 9 /ks 9 display 8digitsx 9 segments 21.6 27 32.4 ma vo=0.9v sg1/ks1 to sg 9 /ks 9 display 8digitsx 9 segments 31.2 39 46.8 high - level output current i ohgr vo=vcc - 1.0v r = 12.1kohm gr1 to gr8 display 8digi tsx 9 segments - 302.4 - 378 - 453.6 ma vo=vcc - 1.1v r = 12.1kohm gr1 to gr8 display 8digitsx 9 segments - 312 - 390 - 468 dynamic current i dddyn - - - 1.2 ma digital input current i dg - - 1 - + 1 ua low - level digital output current i o l dout v o = 0.4v dout 4 - - ma segment low - level output current tolerance i tolsg vo=1.0v sg1/ks1 to sg 9 /ks 9 display 8digitsx 9s egments - - 5 % vo= 0.9 v sg1/ks1 to sg 9 /ks 9 display 8digitsx 9s egments - - 5 high - level input voltage for di/o v ih - 0.7v dd - v dd v low - level input v oltage for di/o v il - 0 - 0.3v dd v oscillation frequency f osc ( v dd = 3.3 v ) r = 12.1 k ohm 400 500 600 khz k1 to k 2 pull up resistor r pu k1 to k 2 v dd = 3.3 v 22.5 30.0 37.5 k?
i k 6208 a 15 april 20 12 ver. 0 1 application note 1. the graph of i olsg vs. r cur is given for the case when only one segment is turn on . choosing the external resistor r cur for the setting i olsg , make sure , that current i ohgr = (number of segments)*i olsg 390ma iolseg vs. rcur 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 5 7 9 11 13 15 17 19 rcur, (kohm) iolseg, (ma) 12grx10seg 11grx11seg 10grx12seg 9grx13seg 8grx14seg fosc vs. rcur 200 300 400 500 600 700 800 900 1000 1100 1200 1300 5 7 9 11 13 15 17 19 rcur (kohm) fosc (khz)
i k 6208 a 16 april 20 12 ver. 0 1 2. the cell of display memory has a dead time zone. if the software program is not correct, it is possible the blinking of display. the blinking frequency for the single segment is: , (less value is better), where C frequency of the use of the command2 (write data to display memory); g C number of g rids in used mode ; C frequency of internal osc ; C c lock frequency. so, main rule for update the display memory is do it if it really need. dont do it continually with high sp eed, but if it something like movie you can . o r another way is turn off the display while the co mmand of w rit e data to display memory is executed. ) * 5 . 0 1 ( * 256 2 clk osc command max blink f f g f f ? ? 2 command f osc f clk f
i k 6208 a 17 april 20 12 ver. 0 1 application circuit (for 8grid x 9 segment display) recommend value: c1&c 2 0.1uf - ceramics r 160ohm 0.5w (if one diode is connected) 110ohm 0.25w (if two diodes are connected)
i k 6208 a 18 april 20 12 ver. 0 1 common anode type led panel c o m / d i g i t a l ( g r i d ) s e g 1 s e g 2 s e g 3 s e g 4 s e g 5 s e g 6 s e g 7 s e g 8 a b c d e f g h a b c d e f g h
i k 6208 a 19 april 20 12 ver. 0 1 lqfp - 32

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