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12/08/08 www.irf.com 1 hexfet power mosfet s d g 97358 irls3036pbf IRLSL3036pbf gds gate drain source applications dc motor drive high efficiency synchronous rectification in smps uninterruptible power supply high speed power switching hard switched and high frequency circuits benefits optimized for logic level drive very low r ds(on) at 4.5v v gs superior r*q at 4.5v v gs improved gate, avalanche and dynamic dv/dt ruggedness fully characterized capacitance and avalanche soa enhanced body diode dv/dt and di/dt capability lead-free v dss 60v r ds ( on ) typ. 1.9m ? max. 2.4m ? i d ( silicon limited ) 270a i d (package limited) 195a d 2 pak irls3036pbf to-262 IRLSL3036pbf g d s g d s absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (package limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery v/ns t j operating junction and t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) avalanche characteristics e as (thermally limited) sin g le pulse avalanche ener g y mj i ar avalanche current a e ar repetitive avalanche ener g y mj thermal resistance symbol parameter typ. max. units r jc junction-to-case CCC 0.40 c/w r ja junction-to-ambient (pcb mount, steady state) CCC 40 see fig. 14, 15, 22a, 22b a c 290 380 8.0 16 2.5 -55 to + 175 300 max. 270 190 1100 195 11 downloaded from: http:///
2 www.irf.com s d g c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1" square pcb (fr-4 or g-10 material). forrecommended footprint and soldering techniquea refer to applocation note # an- 994 echniques refer to application note #an-994. ! " # #$"% ! $" #%&$' calcuted continuous current based on maximum allowable junctiontemperature bond wire current limit is 195a. note that current limitation arising from heating of the device leds may occur with some lead mounting arrangements. repetitive rating; pulse width limited by max. junctiontemperature. limited by t jmax , starting t j = 25c, l = 0.021mh r g = 25 ? , i as = 165a, v gs =10v. part not recommended for use above this value . i sd 165a, di/dt 430a/s, v dd v (br)dss , t j 175c. pulse width 400s; duty cycle 2%. 11 static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. unit s v (br)dss drain-to-source breakdown volta g e 60 CCC CCC v ? v (br)dss / ? t j breakdown volta g e temp. coefficient CCC 0.061 CCC v/c CCC 1.9 2.4 CCC 2.2 2.8 v gs(th) gate threshold volta g e 1.0 CCC 2.5 v i dss drain-to-source leaka g e current CCC CCC 20 CCC CCC 250 i gss gate-to-source forward leaka g e CCC CCC 100 gate-to-source reverse leaka g e CCC CCC -100 r g ( int ) internal gate resistance CCC 2.0 CCC ? dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. unit s g fs forward transconductance 340 CCC CCC s q g total gate char g e CCC 91 140 q gs gate-to-source char g e CCC 31 CCC q gd gate-to-drain ("miller") char g e CCC 51 CCC q sync total gate char g e sync. (q g - q gd ) CCC 40 CCC t d(on) turn-on delay time CCC 66 CCC t r rise time CCC 220 CCC t d(off) turn-off delay time CCC 110 CCC t f fall time CCC 110 CCC c iss input capacitance CCC 11210 CCC c oss output capacitance CCC 1020 CCC c rss reverse transfer capacitance CCC 500 CCC c oss eff. (er) effective output capacitance (energy related) CCC 1430 CCC c oss eff. (tr) effective output capacitance (time related) CCC 1880 CCC diode characteristics symbol parameter min. typ. max. unit s i s continuous source current CCC CCC (body diode) i sm pulsed source current CCC CCC (body diode) v sd diode forward volta g e CCC CCC 1.3 v t rr reverse recovery time CCC 62 CCC t j = 25c v r = 51v, CCC 66 CCC t j = 125c i f = 165a q rr reverse recovery char g e CCC 310 CCC t j = 25c di/d t = 100a/ s CCC 360 CCC t j = 125c i rrm reverse recovery current CCC 4.4 CCC a t j = 25c t on forward turn-on time intrinsic turn-on time is ne g li g ible (turn-on is dominated by ls+ld) v gs = -16v showing the v ds = 30v conditions v gs = 4.5v v gs = 0v v ds = 50v ? = 1.0mhz v gs = 0v, v ds = 0v to 48v conditions v gs = 0v, i d = 250a reference to 25c, i d = 5ma v gs = 10v, i d = 165a v ds = v gs , i d = 250a v ds = 60v, v gs = 0v v ds = 60v, v gs = 0v, t j = 125c ns v gs = 0v, v ds = 0v to 48v mosfet symbol t j = 25c, i s = 165a, v gs = 0v integral reverse p-n junction diode. v gs = 16v nc ana nc ns r ds(on) static drain-to-source on-resistance pf a 270 1100 v gs = 4.5v, i d = 140a m ? i d = 165a r g = 2.1 ? v gs = 4.5v v dd = 39v i d = 165a, v ds =0v, v gs = 4.5v conditions v ds = 10v, i d = 165a i d = 165a downloaded from: http:/// www.irf.com 3 fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 1 2 3 4 5 6 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v 60s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 165a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 4.5v 4.0v 3.5v 3.3v 3.0v bottom 2.7v 60s pulse width tj = 25c 2.7v 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.7v 60s pulse width tj = 175c vgs top 15v 10v 4.5v 4.0v 3.5v 3.3v 3.0v bottom 2.7v 0 20 40 60 80 100 120 q g , total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 48v v ds = 30v i d = 165a downloaded from: http:/// 4 www.irf.com fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 55 60 65 70 75 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5ma -10 0 10 20 30 40 50 60 70 v ds, drain-to-source voltage (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 e n e r g y ( j ) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 27a 50a bottom 165a 25 50 75 100 125 150 175 t c , case temperature (c) 0 50 100 150 200 250 300 i d , d r a i n c u r r e n t ( a ) limited by package 0 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100sec 1msec 10msec dc limited by package downloaded from: http:/// www.irf.com 5 fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far inexcess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b.4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15).t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci i / ri ci= i / ri c 4 4 r 4 r 4 ri (c/w) i (sec) 0.01115 0.0000090.08360 0.000080 0.18950 0.001295 0.11519 0.006726 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 165a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 150c and tstart =25c (single pulse) downloaded from: http:/// 6 www.irf.com fig 16. threshold voltage vs. temperature -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 3.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a i d = 1.0ma i d = 1.0a 0 100 200 300 400 500 di f /dt (a/s) 100 200 300 400 500 600 700 800 900 q r r ( a ) i f = 110a v r = 51v t j = 25c t j = 125c 0 100 200 300 400 500 di f /dt (a/s) 200 300 400 500 600 q r r ( a ) i f = 165a v r = 51v t j = 25c t j = 125c 0 100 200 300 400 500 di f /dt (a/s) 2 4 6 8 10 12 14 i r r m ( a ) i f = 110a v r = 51v t j = 25c t j = 125c 0 100 200 300 400 500 di f /dt (a/s) 2 4 6 8 10 12 i r r m ( a ) i f = 165a v r = 51v t j = 25c t j = 125c downloaded from: http:/// www.irf.com 7 fig 23a. switching time test circuit fig 23b. switching time waveforms fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 21. for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period ( )(! "#*#" + - + + + - - - ( ? ? ! "#"" ? $ %% ? "#""&# d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - v ds 90%10% v gs t d(on) t r t d(off) t f ( '( 1 ) $ 0.1 % ( *+ ( + - ( ( downloaded from: http:/// 8 www.irf.com dimensions are shown in millimeters (inches) ! downloaded from: http:/// www.irf.com 9 to-262 part marking information to-262 package outline dimensions are shown in millimeters (inches) |