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unisonic technologies co., ltd tea1062n/tea1062an linear integrated circuit www.unisonic.com.tw 1 of 14 copyright ? 2015 unisonic technologies co., ltd qw-r108-0 1 1.d low voltage telephone transmission circuit with dialler interface ? description the utc tea1062n/tea1062an is a bipolar integrated circuit performing all speech and line interface function, required in the fully electronic telephone sets. it performs electronic switching between dialing speech. the circuit is able to operate down to d.c. line voltage of 1.6v (with reduced performance) to facilitate the use of more telephone sets in parallel. ? features * low d.c. line voltage; operates down to 1.6v (excluding polarity guard). * voltage regulator with adju stment static resistance. * provides supply with limited current for external circuitry. * symmetrical high-impedance inputs (64k ? ) for dynamic, magnetic or piezoelectric microphones. * asymmetrical high-impedance inputs (32k ? ) for electrets microphones. * dtmf signal input with confidence tone. * mute input for pulse or dtmf dialing. * receivering amplifier for several types of earphones. * large amplification setting range on microphone and earpiece amplifiers. * line loss compensation facility, line current depedant (microphone and earpiece amplifiers). * gain control adaptable to exchange supply. * possibility to adjust the d.c. line voltage dip-16 sop-16 ? ordering information order number package packing lead free halogen free TEA1062NL-D16-T tea1062ng-d16-t dip-16 tube - tea1062ng-s16-r sop-16 tape reel tea1062anl-d16-t tea1062ang-d16-t dip-16 tube - tea1062ang-s16-r sop-16 tape reel
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 2 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? marking dip-16 tea1062n tea1062an sop-16 tea1062n tea1062na
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 3 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? pin configurations fig. 1 pin configurations ? pin descriptions pin no pin name i/o description 1 ln i positive line terminal 2 gas1 i gain adjustmen t; transmitting amplifier 3 gas2 i gain adjustmen t; transmitting amplifier 4 qr o non-inverting output, receiving amplifier 5 gar i gain adjustment; receiving amplifier 6 mic- i inverting microphone input 7 mic+ i on-inverting microphone input 8 stab i current stabilizer 9 v ee negative line terminal 10 ir i receiving amplifier input 11 dtmf i dual-tone multi-frequency input 12 mute/mute i mute input; tea1062n high actived tea1062an low actived 13 vcc positive supply decoupling 14 reg i voltage regulator decoupling 15 agc i automatic gain control input 16 slpe i slope (dc resistance) adjustment
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 4 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? block diagram db supply and reference control current current reference low voltage circuit 2 3 16 8 15 14 9 12 11 6 7 10 13 1 5 4 reg agc mute/mute dtmf mic- mic+ ir ln gar qr gas1 gas2 slpe stab v cc v ee fig. 2 block diagram
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 5 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? absolute maximum ratings parameter symbol ratings unit positive continuous line voltage v ln 12 v repetitive line voltage during switch-on or line interruption v ln(rl) 13.2 v repetitive peak line voltage for a 1 ms pulse/5s(r10=13 ? , r9=20 ? (see fig.15)) v ln(rpl) 28 v line current (note1) (r9=20 ? ) i line 140 ma voltage on all other pins v i (+) v cc +0.7 v v i (-) -0.7 v total power dissipation (note2) (r9=20 ? ) p d 640 mw junction temperature t j +125 ? c operating ambient temperature range t opr -25 ~ +75 ? c storage temperature range t stg -40 ~ +125 ? c note: 1. mostly dependent on the maximum required ta and the voltage between ln and slpe (see figs 6 ). 2. calculated for the maximum ambi ent temperature specified ta=75 ? c and a maximum junction temperature of 125 ? c. 3. absolute maximum ratings are those val ues beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? thermal data parameter symbol rating unit thermal resistance from junction to ambient in free air ja 75 c/w ? electrical characteristics (i line =11~140ma; v ee =0v; f=800hz; ta=25 ? c; unless otherwise specified) parameter symbol test conditions min typ max unit supply; ln and vcc(pins 1 and 13) voltage drop over circuit, between ln and v ee v ln mic inputs open i line =1ma 1.6 v i line =4ma 1.9 v i line =15ma 3.55 4.0 4.25 v i line =100ma 4.9 5.7 6.5 v i line =140ma 7.5 v variation with temperature ? v ln / ? t i line =15ma -0.3 mv/k voltage drop over circuit, between ln and v ee with external resistor r va i line =15ma, r va (ln to reg) =68k ? 3.5 v i line =15ma, r va (reg to slpe) =39k ? 4.5 v supply current i cc v cc =2.8v 0.9 1.35 ma supply voltage available for peripheral circuitry tea1062n v cc i line =15ma ip=1.2ma; mute=high 2.2 2.7 v lp=0ma; mute=high 3.4 v tea1062an i line =15ma ip=1.2ma; mute=low 2.2 2.7 v lp=0ma; mute=low 3.4 v microphone inputs mic+ and mic- (pins 6 and 7) input impedance (differential) between mic- and mic+ O zi O 64 k ? input impedance (sigle-ended) mic- or mic+ to v ee 32 k ? common mode rejection ratio cmrr 82 db voltage gain mic+ or mic- to ln gv i line =15ma, r7=68k ? 50.5 52.0 53.5 db gain variation with frequency at f=300hz and f=3400hz ? gvf w.r.t.800hz 0.2 db gain variation with temperature at -25 ? c and +75 ? c ? gvt w.r.t.25 ? c, without r6; i line =50ma 0.2 db
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 6 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? electrical characteristics(cont.) parameter symbol test conditions min typ max unit dual-tone multi-frequency input dtmf (pin 11) input impedance O zi O 20.7 k ? voltage gain from dtmf to ln gv i line =15ma, r7=68k ? 24 25.5 27 db gain variation with frequency at f=300hz and f=3400hz ? gvf w.r.t.800hz 0.2 db gain variation with temperature at -25 ? c and +75 ? c ? gvt w.r.t.25 ? c, i line =50ma 0.2 db gain adjustment gas1 and gas2 (pins 2 and 3) gain variation of the ransmitting amplifier by varying r7 between gas1 and gas2 ? gv -8 0 db sending amplifier output ln (pin 1) output voltage v ln (rms) i line =15ma, thd=10% 1.7 2.3 v i line =4ma, thd=10% 0.8 v noise output voltage v no (rms) i line =15ma; r7=68k ? ; 200 ? between mic- and mic+; psophometrically weighted -69 dbmp receiving amplifier input ir (pin 10) input impedance O zi O 21 k ? receiving amplifier output qr (pin 4) output impedance voltage gain from ir to qr O z o O i line =15ma; rl(from pin 9 to pin 4 )=300 ? 4 ? gv 29.5 31 32.5 db gain variation with frequency at f=300hz and f=3400hz ? gvf w.r.t.800hz 0.2 db gain variation with temperature at-25 ? c and +75 ? c ? gvt w.r.t.25 ? c without r6 i line =50ma 0.2 db output voltage thd=2% v o (rms) sinwave drive, ip=0ma, r4=100k ? ; i line =15ma rl=150 ? 0.22 0.33 v rl=450 ? 0.3 0.48 v thd=10% r4=100k ? i line =4ma rl=150 ? 15 mv noise output voltage v no (rms) i line =15ma, r4=100k ? , ir open ? circuit psophometrically weighted rl=300 ? 50 v gain adjustment gar (pin 5) gain variation of receiving amplifier achievable by varying r4 between gar and qr ? gv -11 0 db mute input (pin 12) input voltage(high) v ih 1.5 v cc v input voltage(low) v il 0.3 v input current i mute 8 15 a reduction of gain mic+ or mic- to ln tea1062n ? gv mute=high 70 db tea1062an mute=low voltage gain from dtmf to qr gv r4=100k ? , rl=300 ? -19 db
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 7 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? electrical characteristics(cont.) parameter symbol test conditions min typ max unit automatic gain control input agc ( pin 15) controlling the gain from lr to qr and the gain from mic+/mic- to ln; r6 between agc and v ee gain control range ? gv r6=110k ? , i line =70ma -5.8 db highest line curr ent for maximum gain i line 23 ma lowest line current for minimum gain 61 ma
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 8 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? functional description supply: v cc , ln, slpe, reg and stab power for the utc tea1062n/tea1062an and its peripheral circuits is usually obtained from the telephone line. the ic supply voltage is derived from the line via a dropping resistor and regulated by the utc tea1062n/tea1062an. the supply voltage vcc may also be us ed to supply external circuits e.g. dialling and control circuits. decoupling of the supply volt age is performed by a capacitor between vcc and v ee while the internal voltage regulator is decoupled by a capacitor between reg and v ee . the dc current drawn by the device will vary in accordance with varying values of the exchange voltage (v exch), the feeding bridge resistance (rexch) and the dc resistance of the telephone line (r line ). the utc tea1062n/tea1062an has an in ternal current stabilizer operating at a level determined by a 3.6k ? resistor connected between stab and v ee (see fig.8). when the line current(i line ) is more than 0.5ma greater than the sum of the ic supply current (icc) and the current drawn by the peripheral circuitry connected to v cc (lp) the excess current is shunted to v ee via ln. the regulated voltage on the line terminal(v ln ) can be calculated as: v ln =vref+i slpe *r9 or; v ln =vref+[( i line ? i cc - 0.5*10 - 3 a) i p ]*r9 where: vref is an internally generated temperature compensated reference volt age of 3.7v and r9 is an external resistor connected between slpe and v ee . in normal use the value of r9 would be 20 ? . changing the value of r9 will also affect microphone gain, dtmf gain, gain control c haracteristics, side tone level, maximum output swing on ln and the dc characteristics (es pecially at the lower voltages). under normal conditions, when i slpe R i cc +0.5ma + i p , the static behavior of the circui t is that of a 3.7v regulator diode with an internal resistance equal to that of r9. in the audio frequency range the dynamic impedance is la rgely determined by r1. fig.3 shows the equivalent impedance of the circuit. at line currents below 9ma the internal reference voltage is automatically adjusted to a lower value(typically 1.6v at 1ma) this means that more sets can be operated in parallel with dc line vo ltages (excluding the polarity guard) down to an absolute minimum voltage of 1.6v. with li ne currents below 9ma the circuit has limited sending and receiving levels. the internal reference voltage c an be adjusted by means of an external resistor(r va ). this resistor when connected between ln and reg will decrease the internal reference voltage and when connected between reg and slpe will increase the internal reference voltage. current(i p ) available from v cc for peripheral circuits depends on the external components used. fig.9 shows this current for v cc > 2.2v. if mute of tea1062n is low (tea1062an is high) when the receiving amplifier is driv en the available current is further reduced. current availability can be increased by connecting the supply ic(1081) in parallel with r1, as shown in fig.16, or, by increasing the dc line voltage by means of an external resistor(r va ) connected between reg and slpe. microphone inputs(mic+ and mic-) and gain pins (gas1 and gas2) the utc tea1062n/tea1062an has symmetrical inputs. its input impedance is 64k ? (2*32k ? ) and its voltage gain is typically 52 db (when r7=68k ? . see fig.13). dynamic, magnetic, piezoele ctric or electret (with built-in fet source followers) can be used. microphone arrangements ar e illustrated in fig.10. t he gain of the microphone amplifier can be adjusted between 44db and 52db to suit the sensitivity of the trans ducer in use. the gain is proportional to the value of r7 which is connected bet ween gas1 and gas2. stability is ensured by the external capacitors, c6 connected between gas1 and slpe and c8 connected between gas1 and v ee . the value of c6 is 100pf but this may be increased to obtain a first-order low-pa ss filter. the value of c8 is 10 times the value of c6. the cut-off frequency corresponds to the time constant r7*c6. mute input (mute/mute) a low (utc tea1062n is high) level at utc tea 1062an mute enables dtmf input and inhibited the microphone inputs and the receiving amplifier inputs; a high (utc tea1062n is low) level or an open circuit does the reverse. switching the mute input will cause negligible clicks at the tel ephone outputs and on the line. in case the line current drops below 6ma (parallal opr ation of more sets) the circuit is al ways in speech condition independant of the dc level applied to the mute/mute input. dual-tone multi-frequency input (dtmf) when the dtmf input is enabled dialling tones may be sent onto the line. the voltage gai n from dtmf to ln is typically 25.5db(when r7=68k ? ) and varies with r7 in the same way as the microphone gain. the signalling tones can be heard in the earpiece at a low level (confidence tone).
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 9 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ? functional description(cont.) receiving amplifier (ir,qr and gar) the receiving amplifier has one input (ir) and a non-invert ing output (qr). earpiece a rrangements are illustrated in fig.11. the ir to qr gain is typically 31db (when r4=100k ? ). it can be adjusted between 20 and 31db to match the sensitivity of the transducer in use. the gain is set with the va lue of r4 which is connected between gar and qr. the overall receive gain, between ln and qr, is calc ulated by subtracting the ant i-sidetone network attenuation (32db) from the amplifier gain. two external capacitors, c4 and c7, ensure stability. c4 is normally 100pf and c7 is 10 times the value of c4. the value of c4 may be increas ed to obtain a first-order low-pass filter. the cut-off frequency will depend on the time constant r4*c4. the output voltage of the receiving amplifier is specified for continuous-wave drive. the maximum out put voltage will be higher under speech conditions where the peak to rms ratio is higher. automatic gain control input (agc) automatic line loss compensation is achieved by connecting a resistor(r6) between agc and v ee . the automatic gain control varies the gain of the mi crophone amplifier and the receiving amp lifier in accordance with the dc line current. the control range is 5.8db which corresponds to a line length of 5km for a 0.5mm diameter twisted pair copper cable with a dc resistance of 176 ? /km and average attenuation of 1.2db/k m. resistor r6 should be chosen in accordance with the exchange supply voltage and its fe eding bridge resistance(see fig.12 and table 1). the ratio of start and stop currents of the agc curve is independent of the value of r6. if no automatic line loss compensation is required the agc may be left open-circuit. the amplifier, in this condition, will give their maximum specified gain. side-tone suppression the anti-sidetone network, r1//z line , r2, r3, r8, r9 and z bal , (see fig.4) suppresses the transmitted signal in the earpiece. compensation is maximum when the following conditions are fulfilled: if fixed values are chosen for r1, r2, r3 and r9 then condition(a) will always be fulfilled when r8//z bal << r3. to obtain optimum side-tone suppression conditi on(b) has to be fulfilled which results in: z bal =(r8/r1) z line =k*z line where k is a scale factor; k=(r8/r1). the scale factor (k), dependent on the value of r8, is chosen to meet following criteria: (a) compatibility with a sta ndard capacitor from the e6 or e12 range for z bal , (b) z bal //r8 <>r9 to avoid influencing the trans-mitter gain. in practice z line varies considerably with the type and length. the value chosen for z bal should therefore be for an average line length thus giving optim um setting for short or long lines. example: the balance impedance z bal at which the optimum suppression is present can be calculated by: suppose zi line = 210 ? +(1265 ? //140nf) representing a 5km line of 0.5 mm diamet er, copper, twisted pair cable matched to 600 ? (176 ? /km;38nf/km). when k=0.64 then r8=390 ? , z bal =130 ? +(820 ? //220nf).
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 10 of 14 www.unisonic.com.tw qw-r108-0 1 1.d ln v ee leq vref rp r1 c3 c1 100 ? f 4.7 ? f reg v cc r9 20 ? rp=16.2k ? leq=c3*r9*rp fig.3 equivalent impedance circuit the anti-sidetone network for the utctea1062n/tea1062an fa mily shown in fig.4 attenuates the signl received from the line by 32 db befor e it enters the receiving amplifier. the att enuation is almost cons tant over the whole audio frequency range. fig.5 shows a convertional wheatst one bridge anti-sidetone circ uit that can be used as an alternative. both bridge types can be used with either resistive or complex set impedances. fig. 4 equivalent circuit of utc tea1062n/tea1062an anti-sidetone bridge fig. 5 equivalent circuit of an anti-sidetone network in a wheatstone bridge configuration 150 130 110 90 70 50 30 24681012 (1) (2) (3) (4) v ln -v slpe (v) i line (ma) (1) 45c 1068mw (2) 55c 934mw (3) 65c 800mw (4) 75c 666mw tamb ptot fig.6 utc tea1062n/tea1062an safe operating area
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 11 of 14 www.unisonic.com.tw qw-r108-0 1 1.d fig.8 supply arrangement fig.9 typical current ip available from vcc peripheral circuitry with vcc R 2.2v. curve (a) is valid when the receiving amplifier is not dr iven or when mute =low (utc tea1062n is high) .curve(b) is valid when mute=high(utc tea1062n is lo w) and the receiving amplifier is driven; vo(rms)=150mv,rl=150 ? .the supply possibilities can be increased simply by setting the voltage drop over the circuit vln to a high value by means of resistor rva connected between reg and slpe. 7 6 mic+ mic- (1) 7 6 mic+ mic- v ee v cc 13 9 7 6 mic- mic+ (a) (b) (c) fig. 10 alternative microphone arrangement (a) magnetic or dynamic microphone. the resistor ma rked(1) may be connected to decrease the terminating impedance. (b) electret microphone. (c) piezoelectric microphone.
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 12 of 14 www.unisonic.com.tw qw-r108-0 1 1.d 4 9 qr v ee 9 4 qr v ee 4 9 qr v ee (2) (1) (a) (b) (c) fig.11 alternative receiver arrangement (a) dynamic earpiece. (b) magnetic earpiece. the resistor marked(1) may be connected to prevent distortion(inductive load) (c) piezoelectric earpiece. the earpiece marked(2) is re quired to increase the phase margin (capacitive load) -6 -4 -2 0 0 20406080100120140 iline (ma) r9=20 78.7k 110k 140k (1) (2) (3) (3) (1) (2) r6= r6= r6= fig. 12 variation of gain with line current, with r6 as a parameter. gv (db) r6= rexch( ? ) 400 600 800 1000 r6(k ? ) 36 100 78.7 vexch(v) 48 140 110 93.1 82 60 120 102 table 1 values of resistor r6 for optimum line lo ss compensation for various usual values of exchange supply voltage (vexch) an d exchange feeding bridge resistance(rexch);r9=20 ? . 10 6 11 7 12 13 1 4 5 2 3 16 8 15 14 9 mic- mic+ reg agc stab slpe gas2 gas1 gar qr ln vcc vee ir dtmf mute r1 620 ? 100 ? f c4 100pf c7 1nf c6 100pf r4 100k ? r7 68k ? r9 20 ? r5 3.6k ? r6 c3 4.7 ? f 10 ? f c1 100 ? f vi vi r l 600 ? c8 1nf 10 to 140 ma vo fig.13 test circuit defining voltage ga in of mic+, mic- and dtmf inputs.
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 13 of 14 www.unisonic.com.tw qw-r108-0 1 1.d voltage gain is defined as: g v =20*log(|v o /v i |). for measuring the gain from mic+ and mic- the mute input should be high(utc tea1062n is low) or open-circui t, for measuring the dtmf input mute should be low(utc tea1062n is high) .inputs not under test should be open-circuit. 10 6 11 7 12 13 1 4 5 2 3 16 8 15 14 9 mic- mic+ reg agc stab slpe gas2 gas1 gar qr ln vcc vee ir dtmf mute r1=620 ? 100 ? f c4 100pf c7 1nf c6 100pf r4 100k ? r7 68k ? r9 20 ? r5 3.6k ? r6 c3 4.7 ? f 10 ?? f c1 100 ? f vi 600 ? c8 1nf 10 to 140 ma vo z l c2 fig.14 test circuit for defining voltage gain of the receiving amplifier. voltage gain is defined as: g v =20*log(|v o /v i |). slpe gas1 gas2 reg agc stab v ee dtmf v cc ln ir qr gar mic- mic+ mute telephone line from dial and control circuits c1 100 ? f 13 11 12 10 9 8 7 6 5 4 3 2 1 16 14 15 r1 620 ? r2 132k ? bzx79 c12 r10 130 ? bas11 (x2) bzw14 (x2) c5 100nf c2 r4 r3 3.92k ? c4 100pf c7 1nf r8 390 ? zbal r9 20 ? c6 100pf r7 c8 1nf r va (r16.r14) c3 4.7 ? f r6 r5 3.6k ? utc teai062n utc tea1062an fig.15 typical application of the utc t ea1062an, shown here with a piezoelectric earpiece and dtmf dialling. the bridge to the left, the zener diode and r 10 limit the current into the circuit and the voltage across the circuit during line transients. pulse dialling or register reca ll required a different protection arrangement. the dc line voltage can be set to a higher value by resistor r va (reg to slpe). fig.16 typical applications of t he utc tea1062n/tea1062an (simplified) the dashed lines show an optional flash (register recall by timed loop break).
tea1062n/tea1062an linear integrated circuit unisonic technologies co., ltd 14 of 14 www.unisonic.com.tw qw-r108-0 1 1.d utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.

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