AON6224 general description product summary v ds i d (at v gs =10v) 34a r ds(on) (at v gs =10v) < 12m r ds(on) (at v gs =4.5v) < 15.5m applications 100% uis tested 100% rg tested 100v n-channel mosfet orderable part number package type form minimum order q uantity 100v ? trench power mv mosfet technology ? low r ds(on) ? low gate charge ? optimized for fast-switching applications absolute maximum ratings t a =25c unless otherwise noted AON6224 dfn 5x6 tape & reel 3000 ? synchronus rectification in dc/dc and ac/dc co nverters ? industrial and motor drive applications g d s top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view pin1 symbol v ds v gs i dm i as avalanche energy l=0.1mh c e as v ds spike v spike t j , t stg symbol t 10s steady-state steady-state r q jc t a =25c t a =70c t c =25c t c =100c t c =25c avalanche current c continuous drain current thermal characteristics parameter max t a =70c 4.0 c units junction and storage temperature range -55 to 150 typ p dsm w t a =25c 6.2 power dissipation a maximum junction-to-ambient a c/w r q ja 15 40 20 w i d v a 20 a 104 i dsm 13 mj 20 16 34 va absolute maximum ratings t a =25c unless otherwise noted 20 v maximum units maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1.8 50 2.2 power dissipation b 22.5 t c =100c 10 s p d 100 120 56.5 gate-source voltage pulsed drain current c 31 parameter drain-source voltage continuous drain current g rev.1.0: july 2015 www.aosmd.com page 1 of 6
symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.4 1.9 2.4 v 10 12 t j =125c 17.5 21 12.5 15.5 m g fs 60 s v sd 0.71 1 v i s 34 a c iss 2420 pf c oss 170 pf c rss 11 pf r g 0.2 0.55 0.9 q g (10v) 33 50 nc q g (4.5v) 15 25 nc q gs 7 nc q gd 4 nc t d(on) 8 ns t r 3 ns t d(off) 25 ns t f 4 ns t rr 27 ns m v gs =10v, v ds =50v, i d =20a total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate resistance f=1mhz i dss a zero gate voltage drain current drain-source breakdown voltage i d =250 a, vgs=0v r ds(on) static drain-source on-resistance gate source charge gate drain charge total gate charge switching parameters turn-on delaytime v ds =0v, v gs =20v maximum body-diode continuous current g input capacitance gate-body leakage current body diode reverse recovery time m turn-off delaytime turn-off fall time v gs =10v, v ds =50v, r l =2.5 w , r gen =3 w diode forward voltage dynamic parameters v gs =4.5v, i d =20a i f =20a, di/dt=500a/ m s turn-on rise time reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz v ds =v gs, i d =250 m a output capacitance forward transconductance i s =1a, v gs =0v v ds =5v, i d =20a v gs =10v, i d =20a q rr 128 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =20a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environm ent with t a =25 c. the power dissipation p dsm is based on r q ja t 10s and the maximum allowed junction temperature of 1 50 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and is more u seful in setting the upper dissipation limit for cases where additional heatsinking is used. c. single pulse width limited by junction temperature t j(max) =150 c. d. the r q ja is the sum of the thermal impedance from junction to case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtaine d using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environm ent with t a =25 c. rev.1.0: july 2015 www.aosmd.com page 2 of 6
typical electrical and thermal characteristics 0 20 40 60 80 100 1 2 3 4 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 5 10 15 20 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e+02 0.8 1 1.2 1.4 1.6 1.8 2 2.2 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =20a v gs =10v i d =20a 30 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =20a 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) 3.5v 4.5v 6v 4v 3v 10v 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0 5 10 15 20 25 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c rev.1.0: july 2015 www.aosmd.com page 3 of 6
typical electrical and thermal characteristics 0 100 200 300 400 500 0.0001 0.001 0.01 0.1 1 10 100 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0 2 4 6 8 10 0 5 10 15 20 25 30 35 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 3000 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 10 c oss c rss v ds =50v i d =20a d=t /t t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) v gs > or equal to 4.5v figure 9: maximum forward biased safe operating area (note f) 10 m s 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 10ms 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal impe dance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q jc =2.2 c/w rev.1.0: july 2015 www.aosmd.com page 4 of 6
typical electrical and thermal characteristics 10 0 10 20 30 40 50 60 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 12: power de-rating (note f) 0 10 20 30 40 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 13: current de-rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) figure 14: single pulse power rating junction-to-am bient (note h) t a =25 c 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 15: normalized maximum transient thermal impe dance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =50 c/w rev.1.0: july 2015 www.aosmd.com page 5 of 6
- + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id + vdc l vgs vds bv i unclamped inductive switching (uis) test circuit & waveforms vds ar dss 2 e = 1/2 li ar ar figure a: gate charge test circuit & waveforms figure b: resistive switching test circuit & wavefor ms figure c: unclamped inductive switching (uis) test c ircuit & waveforms vdd vgs vgs rg dut - vdc id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr figure d: diode recovery test circuit & waveforms rev.1.0: july 2015 www.aosmd.com page 6 of 6
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