p p js 6801 may 6,2015 - rev.0 3 page 1 3 0 v p - c hannel enhancement mode mosfet voltage - 3 0 v current - 3.2 a sot - 23 6l - 1 unit : inch(mm) f eatures ? r ds(on) , v gs @ - 10 v , i d @ - 3.2 a< 74 m ? ? r ds(on) , v gs @ - 4 .5 v , i d @ - 2 .3 a< 83 m ? ? r ds(on) , v gs @ - 2 .5 v , i d @ - 1 .4 a< 115 m ? ? advanced trench process technology ? specially designed for switch load, pwm application, etc. ? lead free in compliance with eu rohs 2011/65/eu directive. ? green molding compound as per iec61249 std. (halogen free) mechanical data ? case: sot - 23 6l - 1 package ? terminals: solderable per mil - std - 750, method 2026 ? approx. weight: 0.0005 ounces, 0.014 grams parameter symbol limit units drain - source voltage v ds - 3 0 v gate - source voltage v gs + 12 v continuous drain curr ent i d - 3.2 a pulsed drain current i dm - 1 3 a power dissipation t a =25 o c p d 1.25 w derate above 25 o c 10 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient (note 3 ) r ja 10 0 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p js 6801 may 6,2015 - rev.0 3 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source breakdown voltage bv dss v gs = 0 v, i d = - 25 0ua - 3 0 - - v gate threshold voltage v gs(th) v ds = v gs , i d = - 250 ua - 0. 5 - 0.96 - 1. 3 v drain - source on - state resistance r ds(on) v gs = - 10 v, i d = - 3.2 a - 60 74 m v gs = - 4.5 v, i d = - 2.3 a - 67 83 v gs = - 2.5 v, i d = - 1.4 a - 84 11 5 zero gate volta ge drain current i dss v ds = - 3 0 v, v gs =0v - - 0.01 - 1 u a gate - source leakage current i gss v gs = + 12 v, v ds =0v - + 10 + 10 0 n a dynamic total gate charge q g v ds = - 15 v, i d = - 3.2 a, v gs = - 10v (note 1 , 2 ) - 15 - nc gate - source charge q gs - 1.3 - gate - drain charge q gd - 2 - input capacitance ciss v ds = - 1 5v, v gs = 0 v, f=1.0mhz - 633 - pf output capacitance coss - 50 - reverse transfer capacitance crss - 35 - switching turn - on delay time t d (on) v dd = - 15 v, i d = - 3.2 a, v g s = - 10v, r g = 6 (note 1 , 2 ) - 3 - ns turn - on rise time tr - 4 3 - turn - o ff delay time t d (off) - 223 - turn - o ff fall time tf - 100 - drain - source diode maximum continuous drain - source diode forward current i s --- - - - 1. 5 a diode forward voltage v sd i s = - 1.0 a, v gs = 0 v - - 0. 77 - 1. 2 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is de fined as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper 4. the maximum current rating is package limited
p p js 6801 may 6,2015 - rev.0 3 page 3 t ypical characteristic curves fig.1 on - region characteristics fig. 2 transfer charac teristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characteristics
p p js 6801 may 6,2015 - rev.0 3 page 4 t ypical characteristic curves fig. 7 gate - charge characteri stics fig. 8 threshold voltage variation with temperature . fig. 9 capacitance vs. drain - source voltage .
p p js 6801 may 6,2015 - rev.0 3 page 5 part no packing code version mounting pad layout part no packing code package type packing type marking ver sion PJS6801_ s 1_00001 sot - 23 6l - 1 3k p cs / 7
p p js 6801 may 6,2015 - rev.0 3 page 6 disclaimer
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