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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. unless otherwise noted, this document contains production data. opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 opax187 0.001- v/ c drift, low power, rail-to-rail output 36-v operational amplifiers zero-drift series 1 1 features 1 ? low offset voltage: 10 v (maximum) ? zero drift: 0.001 v/ c ? low noise: 20 nv/ hz ? psrr: 160 db ? cmrr: 140 db ? aol: 160 db ? quiescent current: 100 a ? wide supply voltage: 2.25 v to 18 v ? rail-to-rail output operation ? input includes negative rail ? low bias current: 100 pa (typical) ? emi filtered inputs ? microsize packages 2 applications ? bridge amplifier ? strain gauge ? test and measurement equipment ? transducer application ? temperature measurement ? electronic scales ? medical instrumentation ? rtd amplifier ? precision active filters ? low-side current monitoring 3 description the opax187 series operational amplifiers use auto- zeroing techniques to simultaneously provide low- offset voltage (1 v), and near zero drift over time and temperature. these miniature, high-precision, low-quiescent current amplifiers offer high-input impedance and rail-to-rail output swing within 5 mv of the rails into high-impedance loads. the input common-mode range includes the negative rail. either single or dual supplies can be used in the range of 4.5 v to 36 v ( 2.25 v to 18 v). the single version of the opax187 device is available in microsize 8-pin vssop, 5-pin sot-23, and 8-pin soic packages. the dual version is offered in 8-pin vssop and 8-pin soic packages. the quad version is offered in 14-pin soic, 14-pin tssop, and 16-pin wqfn packages. all versions are specified for operation from ? 40 c to +125 c. device information (1) part number package body size (nom) opa187 soic (8) (preview) 4.90 mm 3.91 mm sot-23 (5) 2.90 mm 1.60 mm vssop (8) 3.00 mm 3.00 mm opa2187 soic (8) 4.90 mm 3.91 mm vssop (8) 3.00 mm 3.00 mm opa4187 soic (14) (preview) 8.70 mm 3.90 mm tssop (14) (preview) 5.00 mm 4.40 mm wqfn (16) (preview) 4.00 mm 4.00 mm (1) for all available packages, see the orderable addendum at the end of the data sheet. opax187 offers precision low-side current measurement capability productfolder r shunt + gnd v supply 100 100 opa187 gnd v supply i i load g = 1000 ?5 shunt ?, 100 k v out 100 k gnd + support &community tools & software technical documents ordernow referencedesign
2 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 5 6.1 absolute maximum ratings ...................................... 5 6.2 esd ratings .............................................................. 5 6.3 recommended operating conditions ....................... 5 6.4 thermal information: opa187 .................................. 6 6.5 thermal information: opa2187 ................................ 6 6.6 thermal information: opa4187 ................................ 6 6.7 electrical characteristics: high-voltage operation .. 7 6.8 electrical characteristics: low-voltage operation ... 8 6.9 typical characteristics .............................................. 9 7 detailed description ............................................ 16 7.1 overview ................................................................. 16 7.2 functional block diagram ....................................... 16 7.3 feature description ................................................. 17 7.4 device functional modes ........................................ 20 8 application and implementation ........................ 21 8.1 application information ............................................ 21 8.2 typical applications ................................................ 21 9 power supply recommendations ...................... 25 10 layout ................................................................... 26 10.1 layout guidelines ................................................. 26 10.2 layout example .................................................... 26 11 device and documentation support ................. 27 11.1 device support .................................................... 27 11.2 documentation support ....................................... 27 11.3 related links ........................................................ 28 11.4 receiving notification of documentation updates 28 11.5 community resources .......................................... 28 11.6 trademarks ........................................................... 28 11.7 electrostatic discharge caution ............................ 28 11.8 glossary ................................................................ 28 12 mechanical, packaging, and orderable information ........................................................... 28 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision a (july 2017) to revision b page ? changed opa187 soic status to preview ............................................................................................................................ 1 ? changed opa4187 soic, tssop and wqfn status to preview ......................................................................................... 1 ? changed offset drift (high supply) typical from 5 nv/ to 1 nv/ and max from 50 nv/ to 20 nv/ ...................... 7 ? changed input bias current max (high supply) from 5 na to 7.5 na .................................................................................. 7 ? changed input offset current max (high supply) from 5 na to 14.5 na .............................................................................. 7 ? changed offset drift (low supply) typical from 5 nv/ to 1 nv/ and max from 50 nv/ to 20 nv/ ........................ 8 ? changed offset voltage production distribution figure ........................................................................................................ 10 changes from original (december 2016) to revision a page ? deleted vson package option from the description ............................................................................................................. 1 ? deleted vson package option from the device information table ........................................................................................ 1 ? added wqfn package option to the device information table .............................................................................................. 1 ? deleted opa187 drg package option from pin configuration and functions ..................................................................... 3 ? added wqfn package to pin configuration and functions .................................................................................................. 4
3 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 5 pin configuration and functions opa187: dbv package 5-pin sot-23 top view opa187: d (preview) and dgk packages 8-pin soic and 8-pin vssop top view (1) nc denotes no internal connection. pin functions: opa187 pin i/o description name dbv d (preview) and dgk +in 3 3 i non-inverting input ? in 4 2 i inverting input nc ? 1, 5, 8 ? no connection (can be left floating) out 1 6 o output signal v+ 5 7 ? positive (highest) supply voltage v ? 2 4 ? negative (lowest) supply voltage opa2187: d and dgk packages 8-pin soic and 8-pin vssop top view pin functions: opa2187 pin i/o description name d and dgk +in a 3 i non-inverting input, channel a ? in a 2 i inverting input, channel a +in b 5 i non-inverting input, channel b ? in b 6 i inverting input, channel b out a 1 o output, channel a out b 7 o output, channel b v+ 8 ? positive (highest) supply voltage v ? 4 ? negative (lowest) supply voltage 1 out a 8 v+ 2 in a 7 out b 3 +in a 6 in b 4 v 5 +in b not to scale + 1 out 2 v 3 +in 4 in 5 v+ not to scale + 1 nc 8 nc 2 in 7 v+ 3 +in 6 out 4 v 5 nc not to scale
4 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated opa4187: d and pw packages (both preview) 14-pin soic and 14-pin tssop top view opa4187: rum package (preview) 16-pin wqfn top view pin functions: opa4187 pin i/o description name d and pw rum +in a 3 2 i non-inverting input, channel a ? in a 2 1 i inverting input, channel a +in b 5 4 i non-inverting input, channel b ? in b 6 5 i inverting input, channel b +in c 10 9 i non-inverting input, channel c ? in c 9 8 i inverting input, channel c +in d 12 11 i non-inverting input, channel d ? in d 13 12 i inverting input, channel d out a 1 15 o output, channel a out b 7 6 o output, channel b out c 8 7 o output, channel c out d 14 14 o output, channel d v+ 4 3 ? positive (highest) supply voltage v ? 11 10 ? negative (lowest) supply voltage nc ? 13, 16 ? no internal connection (can be left floating) 1 out a 14 out d 2 in a 13 in d 3 +in a 12 +in d 4 v+ 11 v 5 +in b 10 +in c 6 in b 9 in c 7 out b 8 out c not to scale
5 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) input terminals are diode-clamped to the power-supply rails. input signals that can swing more than 0.5 v beyond the supply rails should be current limited to 10 ma or less. (3) output terminals are diode-clamped to the power-supply rails. output signals that can swing more than 0.5 v beyond the supply rails should be current limited to 55 ma or less. (4) short-circuit to ground, one amplifier per package. 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit voltage supply, v s = (v + ) ? (v ? ) 40 v signal input pin (2) (v ? ) ? 0.5 (v + ) + 0.5 signal output pin (3) (v ? ) ? 0.5 (v + ) + 0.5 current signal input pin (2) ? 10 10 ma signal output pin (3) ? 55 55 ma output short-circuit (4) continuous continuous continuous temperature operating range, t a ? 55 150 c junction, t j 150 storage, t stg ? 65 150 (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human-body model (hbm), per ansi/esda/jedec js-001 (1) 4000 v charged-device model (cdm), per jedec specification jesd22- c101 (2) 1500 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit (v + ) ? (v ? ) supply voltage 4.5 ( 2.25) 36 ( 18) v t a operating temperature ? 40 150 c
6 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information: opa187 thermal metric (1) opa187 unit 5 pins 8 pins dbv (sot-23) dgk (vssop) d (soic) r ja junction-to-ambient thermal resistance 273.8 159 100.1 c/w r jc(top) junction-to-case (top) thermal resistance 126.8 37 42.4 c/w r jb junction-to-board thermal resistance 85.9 49 41.0 c/w jt junction-to-top characterization parameter 10.9 1.2 4.8 c/w jb junction-to-board characterization parameter 84.9 77.1 40.3 c/w r jc(bot) junction-to-case (bottom) thermal resistance n/a n/a n/a c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.5 thermal information: opa2187 thermal metric (1) opa2187 unit 8 pins dgk (vssop) d (soic) r ja junction-to-ambient thermal resistance 159 100.1 c/w r jc(top) junction-to-case (top) thermal resistance 37 42.4 c/w r jb junction-to-board thermal resistance 49 41.0 c/w jt junction-to-top characterization parameter 1.2 4.8 c/w jb junction-to-board characterization parameter 77.1 40.3 c/w r jc(bot) junction-to-case (bottom) thermal resistance n/a n/a c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.6 thermal information: opa4187 thermal metric (1) opa4187 unit 14 pins 16 pins pw (tssop) d (soic) rum (wqfn) r ja junction-to-ambient thermal resistance 107.8 83.8 35.3 c/w r jc(top) junction-to-case (top) thermal resistance 29.6 70.7 32.7 c/w r jb junction-to-board thermal resistance 52.6 59.5 12.9 c/w jt junction-to-top characterization parameter 1.5 11.6 0.3 c/w jb junction-to-board characterization parameter 51.6 37.7 12.9 c/w r jc(bot) junction-to-case (bottom) thermal resistance n/a n/a 3.3 c/w
7 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) v s / 2 = midsupply. 6.7 electrical characteristics: high-voltage operation at t a = +25 c, v s = 4 v to 18 v (v s = +8 v to +36 v), r l = 10 k connected to v s / 2 (1) , and v cm = v out = v s / 2 (1) (unless otherwise noted) parameter conditions min typ max unit offset voltage v os input offset voltage 1 10 v t a = ? 40 c to +125 c 0.001 0.02 v/ c psrr power-supply rejection ratio v s = 4.5 v to 36 v, t a = ? 40 c to +125 c 0.01 1 v/v input bias current i b input bias current v cm = v s / 2 100 350 pa t a = ? 40 c to +125 c 7.5 na i os input offset current 100 500 pa t a = ? 40 c to +125 c 14.5 na noise e n input voltage noise f = 0.1 hz to 10 hz 0.4 v pp f = 0.1 hz to 10 hz 60 nvrms input voltage noise density f = 1 khz 20 nv/ hz i n input current noise density f = 1 khz 160 fa/ hz input voltage range v cm common-mode voltage range (v ? ) ? 0.1 (v+) ? 2 v cmrr common-mode rejection ratio (v ? ) ? 0.1 v < v cm < (v+) ? 2 v, v s = 18 v 126 140 db (v ? ) < v cm < (v+) ? 2 v, v s = 18 v, t a = ? 40 c to +125 c 130 145 db input impedance z id differential 100 || 6 m || pf z ic common-mode 6 || 4.2 10 12 || pf open-loop gain a ol open-loop voltage gain t a = ? 40 c to +125 c, v s = 4 v to 18 v, (v ? ) + 0.3 v < v o < (v+) ? 0.3 v, r l = 10 k ? 132 160 db frequency response gbw gain-bandwidth product 550 khz sr slew rate v o = 10-v step, g = +1 0.2 v/ s t s settling time 0.1% v s = 18 v, g = 1, 10-v step 46 s 0.01% v s = 18 v, g = 1, 10-v step 48 s t or overload recovery time v in g = v s 8 s thd+n total harmonic distortion + noise 1 khz, g = +1, v out = 3.5 v rms , no load 0.035% output voltage output swing from rail v s = 4 v to 18 v, no load 5 15 mv v s = 4 v to 18 v, r l = 10 k ? 75 100 v s = 4 v to 18 v, r l = 10 k ? , t a = ? 40 c to +125 c 100 125 i sc short-circuit current v s = 18 v, sinking ? 30 ma v s = 18 v, sourcing +30 ma r o open-loop output resistance f = 550 khz, i o = 0, see figure 21 1.4 k c load capacitive load drive see typical characteristics power supply i q quiescent current (per amplifier) v s = 4 v to v s = 18 v 100 145 a i o = 0 ma, t a = ? 40 c to +125 c 150 a
8 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) v s / 2 = midsupply. 6.8 electrical characteristics: low-voltage operation at t a = +25 c, v s = 2.25 v to < 4 v (v s = +4.5 v to < +8 v), r l = 10 k connected to v s / 2 (1) , and v cm = v out = v s / 2 (1) (unless otherwise noted) parameter conditions min typ max unit offset voltage v os input offset voltage 1 15 v t a = ? 40 c to +125 c 0.001 0.02 v/ c psrr power-supply rejection ratio v s = 4.5 v to 36 v, t a = ? 40 c to +125 c 0.01 1 v/v input bias current i b input bias current v cm = v s / 2 100 350 pa t a = ? 40 c to +125 c 5 na i os input offset current 100 500 pa t a = ? 40 c to +125 c 5 na noise e n input voltage noise f = 0.1 hz to 10 hz 0.4 v pp f = 0.1 hz to 10 hz 60 nvrms input voltage noise density f = 1 khz 20 nv/ hz i n input current noise density f = 1 khz 160 fa/ hz input voltage range v cm common-mode voltage range (v ? ) ? 0.1 (v+) ? 2 v cmrr common-mode rejection ratio (v ? ) ? 0.1 v < v cm < (v+) ? 2 v, v s = 2.25 v 114 130 db (v ? ) < v cm < (v+) ? 2 v, v s = 2.25 v, t a = ? 40 c to +125 c 120 137 db input impedance z id differential 100 || 6 m || pf z ic common-mode 6 || 4.2 10 12 || pf open-loop gain a ol open-loop voltage gain t a = ? 40 c to +125 c, v s = 2.25 v to 4 v, (v ? ) + 0.3 v < v o < (v+) ? 0.3 v, r l = 10 k ? 120 140 db frequency response gbw gain-bandwidth product 550 khz sr slew rate v o = 1-v step, g = +1 0.2 v/ s t or overload recovery time v in g = v s 8 s thd+n total harmonic distortion + noise 1 khz, g = +1, v out = 1 vrms, no load 0.05% output voltage output swing from rail v s = 2.25 v to 4 v, no load 5 15 mv v s = 2.25 v to 4 v, r l = 10 k 15 25 v s = 2.25 v to 4 v, r l = 10 k , t a = ? 40 c to +125 c 15 30 i sc short-circuit current v s = 2.25, sinking ? 20 ma v s = 2.25, sourcing +20 ma r o open-loop output resistance f = 550 khz, i o = 0, see figure 21 1.4 k c load capacitive load drive see typical characteristics power supply i q quiescent current (per amplifier) v s = 2.25 v to v s = 4 v 100 145 a i o = 0 ma, t a = ? 40 c to +125 c 150 a
9 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 6.9 typical characteristics table 1. typical characteristic graphs description figure offset voltage production distribution figure 1 offset voltage drift distribution figure 2 offset voltage vs temperature figure 3 offset voltage vs common-mode voltage figure 4 offset voltage vs power supply figure 5 open-loop gain and phase vs frequency figure 6 closed-loop gain vs frequency figure 7 i b vs common-mode voltage figure 8 input bias current vs temperature figure 9 output voltage swing vs output current figure 10 cmrr and psrr vs frequency (referred-to-input) figure 11 cmrr vs temperature figure 12 psrr vs temperature figure 13 0.1-hz to 10-hz noise figure 14 input voltage noise spectral density vs frequency figure 15 thd+n ratio vs frequency figure 16 thd+n vs output amplitude figure 17 quiescent current vs supply voltage figure 18 quiescent current vs temperature figure 19 open-loop gain vs temperature figure 20 open-loop output impedance vs frequency figure 21 small-signal overshoot vs capacitive load (g = 1) (10-mv output step) figure 22 no phase reversal figure 23 positive overload recovery figure 24 negative overload recovery figure 25 small-signal step response (10 mv) figure 26 , figure 27 large-signal step response figure 28 , figure 29 large-signal settling time (10-v positive step) figure 30 large-signal settling time (10-v negative step) figure 31 short-circuit current vs temperature figure 32 maximum output voltage vs frequency figure 33 crosstalk vs frequency figure 34 emirr in+ vs frequency figure 35
10 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) figure 1. offset voltage production distribution figure 2. offset voltage drift distribution figure 3. offset voltage vs temperature figure 4. offset voltage vs common-mode voltage figure 5. offset voltage vs power supply figure 6. open-loop gain and phase vs frequency 10 8 6 4 2 0 2 4 6 8 10 20 15 10 5 0 5 10 15 20 v os ( v) v cm (v) c003 v cm = 18.1 v v cm = 16 v 10 8 6 4 2 0 2 4 6 8 10 75 50 25 0 25 50 75 100 125 150 v os ( v) temperature ( ? c) c001 5 4 3 2 1 0 1 2 3 4 5 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 v os ( v) v supply (v) c001 v s = 2.25 v -45 0 45 90 135 40 20 0 20 40 60 80 100 120 140 1 10 100 1k 10k 100k 1m 10m open-loop phase ( ? ) open-loop gain (db) frequency (hz) c001 open-loop gain phase offset voltage drift ( p v/ q c) total amplifiers (%) -0.015 -0.01 -0.005 0 0.005 0.01 0.015 0 5% 10% 15% 0 2 4 6 8 10 12 14 16 18 20 -10 -8 -5 -3 03 5 8 10 amplifiers (%) offset voltage (v) c002
11 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) figure 7. closed-loop gain vs frequency figure 8. i b vs common-mode voltage figure 9. input bias current vs temperature figure 10. output voltage swing vs output current figure 11. cmrr and psrr vs frequency (referred-to-input) figure 12. cmrr vs temperature -40 -20 0 20 40 100 1k 10k 100k 1m 10m closed-loop gain (db) frequency (hz) g = +1 g= +10 g= -1 c004 -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 3 0 10 20 30 40 50 60 v o (v) i o (ma) c001 125c 25c 40c 125c 25c 40c 0.0 2.5 5.0 7.5 10.0 12.5 15.0 75 50 25 0 25 50 75 100 125 150 input bias current (na) temperature ( ? c) c001 ios 0 20 40 60 80 100 120 140 160 180 1 10 100 1k 10k 100k 1m 10m common-mode rejection ratio (db) frequency (hz) cmrr +psrr psrr c004 0.001 0.01 0.1 1 120 130 140 150 160 170 180 75 50 25 0 25 50 75 100 125 150 common-mode rejection ratio ( v/v) common-mode rejection ratio (db) temperature ( ? c) c001 350 250 150 50 50 150 250 350 20 15 10 5 0 5 10 15 20 input bias current (pa) v cm (v) c001
12 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) figure 13. psrr vs temperature figure 14. 0.1-hz to 10-hz noise figure 15. input-referred voltage noise spectral density vs frequency (g = +101) figure 16. thd+n ratio vs frequency figure 17. thd+n vs output amplitude figure 18. quiescent current vs supply voltage 1 10 100 1000 1 10 100 1k 10k 100k voltage noise spectral density (nv/ hz) frequency (hz) c002 -140 -120 -100 -80 -60 -40 0.001 0.01 0.1 1 10 20 200 2k 20k total harmonic distortion + noise (db) total harmonic distortion + noise (%) frequency (hz) g = -1, 10k- load g = -1, 2k- load g = -1, 600- load g = +1, 10k- load g = +1, 2k- load g = +1, 600- load c004 0.001 0.01 0.1 1 120 130 140 150 160 170 180 75 50 25 0 25 50 75 100 125 150 power-supply rejection ratio (v/v) power-supply rejection ratio (db) temperature ( ? c) c001 voltage (100 nv/div) time (1 s/div) c017 0 20 40 60 80 100 120 140 0 2 4 6 8 10 12 14 16 18 20 i q (a) supply voltage (v) c001 -120 -100 -80 -60 0.0001 0.001 0.01 0.1 1 0.001 0.01 0.1 1 10 total harmonic distortion + noise (db) total harmonic distortion + noise (%) output amplitude (v rms ) g = -1, 10k- load g = -1, 2k- load g = -1, 600- load g = +1, 10k- load g = +1, 2k- load g = +1, 600- load c004
13 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) figure 19. quiescent current vs temperature figure 20. open-loop gain vs temperature figure 21. open-loop output impedance vs frequency figure 22. small-signal overshoot vs capacitive load (g = +1) (10-mv output step) figure 23. no phase reversal figure 24. positive overload recovery voltage (5 v/div) time (40 ms/div) c017 v out v in 1 v/div time (2 s/div) c017 v in v out 0.0001 0.001 0.01 0.1 140 150 160 170 180 190 200 75 50 25 0 25 50 75 100 125 150 dc open-loop gain (v/v) dc open-loop gain (db) temperature ( ? c) c001 v s = 18 v v s = 2.25 v 0 30 60 90 120 150 75 50 25 0 25 50 75 100 125 150 i q (a) temperature ( ? c) c001 10 20 30 40 50 60 70 10 100 overshoot (%) capacitive load (pf) riso = 0 ? riso = 25 ? riso = 50 ? c004 0.1 1 10 100 1000 10000 10 100 1k 10k 100k 1m 10m 100m open-loop output impedance ( ? ) frequency (hz) c001
14 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) figure 25. negative overload recovery figure 26. small-signal step response (100 mv) figure 27. small-signal step response (100 mv) figure 28. large-signal step response figure 29. large-signal step response figure 30. large-signal settling time (10-v positive step) 45 50 55 60 65 output voltage (1 mv/div) time (5 s/div) c017 0.01% settling = ? 1mv t 0 = 45 s 2 mv/div time (2.5 s/div) vout vin c017 2.5 v/div time (25 s/div) vout vin c017 2 mv/div time (1 s/div) vout vin c017 2.5 v/div time (25 s/div) vout vin c017 5 v/div time (2 s/div) c017 v out v in
15 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) figure 31. large-signal settling time (10-v negative step) figure 32. short-circuit current vs temperature figure 33. maximum output voltage vs frequency figure 34. crosstalk vs frequency figure 35. emirr in+ vs frequency 0 10 20 30 40 50 60 75 50 25 0 25 50 75 100 125 150 i sc (ma) temperature ( ? c) c001 i sc , source i sc , sink 0 20 40 60 80 100 120 140 160 180 10m 100m 1000m emirr in+ (db) frequency (hz) c004 -160 -140 -120 -100 -80 -60 1k 10k 100k 1m crosstalk (db) frequency (hz) c004 0 5 10 15 20 25 30 35 40 100 1k 10k 100k 1m output voltage (v pp ) frequency (hz) c001 maximum output voltage without slew-rate induced distortion. v s = 18v v s = 4v v s = 2.25v 45 50 55 60 65 output voltage (1 mv/div) time (5 s/div) c017 0.01% settling = ? 1 m v t 0 = 45 s
16 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 7 detailed description 7.1 overview the opax187 operational amplifier combines precision offset and drift with excellent overall performance, making the device ideal for many precision applications. the precision offset drift of only 0.001 v/ c provides stability over the entire temperature range. in addition, this device offers excellent overall performance with high cmrr, psrr, and a ol . as with all amplifiers, applications with noisy or high-impedance power supplies require decoupling capacitors close to the device pins. in most cases, 0.1- f capacitors are adequate. the opax187 device is part of a family of zero-drift, low-power, rail-to-rail output operational amplifiers. these devices operate from 4.5 v to 36 v, are unity-gain stable, and are suitable for a wide range of general-purpose applications. the zero-drift architecture provides ultra-low input offset voltage and near-zero input offset voltage drift over temperature and time. this choice of architecture also offers outstanding ac performance, such as ultra- low broadband noise and zero flicker noise. 7.2 functional block diagram figure 36 shows a representation of the proprietary opax187 architecture. functional blocks chop1 and chop2 operate such that the non-idealities of gm1 are cancelled while the input signal is left in-phase. the integrated notch filter of the opax187 family suppresses most of the auto-zero amplifier carrier. figure 36. functional block diagram gm1 +in -in chop1 chop2 notch filter gm_ff gm2 gm3 c2 c1 out v+ v- copyright ? 2016, texas instruments incorporated
17 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 7.3 feature description the opax187 is unity-gain stable and free from unexpected output phase reversal. this device uses a proprietary, periodic autocalibration technique to provide ultra-low input offset voltage and near zero input offset voltage drift over temp and temperature. for lowest offset voltage and precision performance, optimize circuit layout and mechanical conditions. avoid temperature gradients that create thermoelectric (seebeck) effects in the thermocouple junctions formed from connecting dissimilar conductors. cancel these thermally-generated potentials by making sure they are equal on both input pins. other layout and design considerations include: use low thermoelectric-coefficient conditions (avoid dissimilar metals). thermally isolate components from power supplies or other heat sources. shield operational amplifier and input circuitry from air currents, such as cooling fans. follow these guidelines to reduce the likelihood of junctions being at different temperatures, which may cause thermoelectric voltages of 0.1 v/ c or higher, depending on the materials used. 7.3.1 operating characteristics the opax187 device is specified for operation from 4.5 v to 36 v ( 2.25 v to 18 v). many specifications apply from ? 40 c to +125 c. parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the typical characteristics section. 7.3.2 phase-reversal protection the opax187 device has an internal phase-reversal protection. many op amps exhibit a phase reversal when the input is driven beyond its linear common-mode range. this condition is most often encountered in non- inverting circuits when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into the opposite rail. the opax187 input prevents phase reversal with excessive common-mode voltage. instead, the output limits into the appropriate rail. figure 37 shows this performance. figure 37. no phase reversal 7.3.3 input bias current clock feedthrough zero-drift amplifiers, such as the opax187, use switching on their inputs to correct for the intrinsic offset and drift of the amplifier. charge injection from the integrated switches on the inputs can introduce very short transients in the input bias current of the amplifier. the extremely short duration of these pulses prevents them from being amplified, however they may be coupled to the output of the amplifier through the feedback network. the most effective method to prevent transients in the input bias current from producing additional noise at the amplifier output is to use a low-pass filter such as an rc network. 7.3.4 internal offset correction the opax187 op amp uses an auto-calibration technique with a time-continuous 125-khz op amp in the signal path. this amplifier is zero-corrected every 22 s using a proprietary technique. upon power-up, the amplifier requires approximately 100 s to achieve the specified v os accuracy. this design has no aliasing or flicker noise. voltage (5 v/div) time (40 ms/div) c017 v out v in
18 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated feature description (continued) 7.3.5 emi rejection the opax187 device uses integrated electromagnetic interference (emi) filtering to reduce the effects of emi interference from sources such as wireless communications and densely-populated boards with a mix of analog signal chain and digital components. emi immunity can be improved with circuit design techniques; the opax187 benefits from these design improvements. texas instruments has developed the ability to accurately measure and quantify the immunity of an operational amplifier over a broad frequency spectrum extending from 10 mhz to 6 ghz. figure 38 shows the results of this testing on the opax187. table 2 lists the emirr in+ values for the opax187 at particular frequencies commonly encountered in real-world applications. applications listed in table 2 may be centered on or operated near the particular frequency shown. detailed information can also be found in emi rejection ratio of operational amplifiers , available for download from www.ti.com . figure 38. emirr testing table 2. opax187 emirr in+ for frequencies of interest frequency application/allocation emirr in+ 400 mhz mobile radio, mobile satellite, space operation, weather, radar, ultra-high frequency (uhf) applications 81.8 db 900 mhz global system for mobile communications (gsm) applications, radio communication, navigation, gps (to 1.6 ghz), gsm, aeronautical mobile, uhf applications 102.7 db 1.8 ghz gsm applications, mobile personal communications, broadband, satellite, l-band (1 ghz to 2 ghz) 115.4 db 2.4 ghz 802.11b, 802.11g, 802.11n, bluetooth ? , mobile personal communications, industrial, scientific and medical (ism) radio band, amateur radio and satellite, s- band (2 ghz to 4 ghz) 150.7 db 3.6 ghz radiolocation, aero communication and navigation, satellite, mobile, s-band 142.0 db 5 ghz 802.11a, 802.11n, aero communication and navigation, mobile communication, space and satellite operation, c-band (4 ghz to 8 ghz) 173.8 db 7.3.6 capacitive load and stability the device dynamic characteristics are optimized for a range of common operating conditions. the combination of low closed-loop gain and high capacitive loads decreases the amplifier phase margin and can lead to gain peaking or oscillations. as a result, larger capacitive loads must be isolated from the output. the simplest way to achieve this isolation is to add a small resistor (for example, r out equal to 50 ) in series with the output. figure 39 illustrates small-signal overshoot versus capacitive load for several values of r out . also, for details of analysis techniques and application circuits, refer to feedback plots define op amp ac performance , available for download from www.ti.com . 0 20 40 60 80 100 120 140 160 180 10m 100m 1000m emirr in+ (db) frequency (hz) c004
19 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated g = 1, r l = 10 k , 10-mv output step figure 39. small-signal overshoot versus capacitive load 7.3.7 electrical overstress designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. these questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output pin. each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. additionally, internal electrostatic discharge (esd) protection is built into these circuits to protect them from accidental esd events both before and during product assembly. having a good understanding of this basic esd circuitry and its relevance to an electrical overstress event is helpful. see figure 40 for an illustration of the esd circuits contained in the opax187 (indicated by the dashed line area). the esd protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where the diodes meet at an absorption device internal to the operational amplifier. this protection circuitry is intended to remain inactive during normal circuit operation. an esd event produces a short-duration, high-voltage pulse that is transformed into a short-duration, high- current pulse while discharging through a semiconductor device. the esd protection circuits are designed to provide a current path around the operational amplifier core to prevent damage. the energy absorbed by the protection circuitry is then dissipated as heat. when an esd voltage develops across two or more amplifier device pins, current flows through one or more steering diodes. depending on the path that the current takes, the absorption device may activate. the absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the opax187 but below the device breakdown voltage level. when this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level. when the operational amplifier connects into a circuit (as shown in figure 40 ), the esd protection components are intended to remain inactive and do not become involved in the application circuit operation. however, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. should this condition occur, there is a risk that some internal esd protection circuits may be biased on, and conduct current. any such current flow occurs through steering-diode paths and rarely involves the absorption device. figure 40 shows a specific example where the input voltage, v in , exceeds the positive supply voltage (+v s ) by 500 mv or more. much of what happens in the circuit depends on the supply characteristics. if +v s can sink the current, one of the upper input steering diodes conducts and directs current to +v s . excessively high current levels can flow with increasingly higher v in . as a result, the data sheet specifications recommend that applications limit the input current to 10 ma. if the supply is not capable of sinking the current, v in may begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. the danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. 10 20 30 40 50 60 70 10 100 overshoot (%) capacitive load (pf) riso = 0 ? riso = 25 ? riso = 50 ? c004
20 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated another common question involves what happens to the amplifier if an input signal is applied to the input while the power supplies +v s or ? v s are at 0 v. again, this question depends on the supply characteristic while at 0 v, or at a level below the input signal amplitude. if the supplies appear as high impedance, then the operational amplifier supply current may be supplied by the input source via the current-steering diodes. this state is not a normal bias condition; the amplifier most likely will not operate normally. if the supplies are low impedance, then the current through the steering diodes can become quite high. the current level depends on the ability of the input source to deliver current, and any resistance in the input path. if there is any uncertainty about the ability of the supply to absorb this current, external tvs (transient voltage suppressor) diodes may be added to the supply pins, as shown in figure 40 . the tvs voltage must be selected such that the diode does not turn on during normal operation. however, the tvs voltage should be low enough so that the tvs diode conducts if the supply pin begins to rise above the safe operating supply voltage level. note 1: v in = +v s + 500 mv. note 2: tvs: +v s(max) > v tvsbr (min) > +v s . note 3: suggested value is approximately 1 k . figure 40. equivalent internal esd circuitry relative to a typical circuit application the opax187 input terminals are protected from excessive differential voltage with back-to-back diodes, as shown in figure 40 . in most circuit applications, the input protection circuitry has no consequence. however, in low-gain or g = 1 circuits, fast-ramping input signals can forward-bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. if the input signal is fast enough to create this forward-bias condition, the input signal current must be limited to 10 ma or less. if the input signal current is not inherently limited, an input series resistor can be used to limit the signal input current. this input series resistor degrades the low-noise performance of the opax187. figure 40 shows an example configuration that implements a current-limiting feedback resistor. 7.4 device functional modes the opax187 has a single functional mode and is operational when the power-supply voltage is greater than 4.5 v ( 2.25 v). the maximum power supply voltage for the opax187 is 36 v ( 18 v). op amp core r f r i r l v in (see note 1) i d in out +in esd current- steering diodes +v s v+ r s (see note 3) tvs (see note 2) edge-triggered esd absorption circuit v v s tvs (see note 2) copyright ? 2016, texas instruments incorporated
21 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information the opax187 operational amplifier combines precision offset and drift with excellent overall performance, making it ideal for many precision applications. the precision offset drift of only 0.001 v/ c provides stability over the entire temperature range. in addition, the device pairs excellent cmrr, psrr, and a ol dc performance with outstanding low-noise operation. as with all amplifiers, applications with noisy or high-impedance power supplies require decoupling capacitors close to the device pins. in most cases, 0.1- f capacitors are adequate. the following application examples highlight only a few of the circuits where the opax187 can be used. 8.2 typical applications 8.2.1 high-side voltage-to-current (v-i) converter the circuit shown in figure 41 is a high-side voltage-to-current (v-i) converter. the converter translates an input voltage of 0 v to 2 v into an output current of 0 ma to 100 ma. figure 42 shows the measured transfer function for this circuit. the low offset voltage and offset drift of the opa2187 facilitate excellent dc accuracy for the circuit. figure 41. high-side voltage-to-current (v-i) converter v+ i load q 1 q 2 + + v in r load r s1 2 k r s2 470 r s3 4.7 i rs1 i rs2 i rs3 v rs2 v rs3 v rs1 v load r 3 200 r 4 10 k copyright ? 2016, texas instruments incorporated c 7 2200 pf r 5 330 c 6 1000 pf r 2 10 +
22 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated typical applications (continued) 8.2.1.1 design requirements the design requirements are: ? supply voltage: 5 v dc ? input: 0 v to 2 v dc ? output: 0 ma to 100 ma dc 8.2.1.2 detailed design procedure the v-i transfer function of the circuit is based on the relationship between the input voltage, v in , and the three current sensing resistors, r s1 , r s2 , and r s3 . the relationship between v in and r s1 determines the current that flows through the first stage of the design. the current gain from the first stage to the second stage is based on the relationship between r s2 and r s3 . this application benefits from an operational amplifier with low offset voltage, low temperature drift, and rail-to- rail output. the opax187 cmos operational amplifier is a high-precision, ultra-low offset, ultra-low drift amplifier, optimized for wide-voltage, single-supply operation, with an output swing to within 5 mv of the positive rail. the opax187 family uses chopping techniques to provide low initial offset voltage and near-zero drift over time and temperature. low offset voltage and low drift reduce the offset error in the system, making this device appropriate for precise dc control. the rail-to-rail output stage of the opax187 makes sure that the output swing of the operational amplifier is able to fully control the gate of the mosfet devices within the supply rails. a detailed error analysis, design procedure, and additional measured results are given in reference design tipd102, a step-by-step process to design a high-side voltage-to-current (v-i) converter . for step-by-step design procedure, circuit schematics, bill of materials, pcb files, simulation results, and test results, refer to ti precision design tipd102, high-side voltage-to-current (v-i) converter (slau502). 8.2.1.3 application curve figure 42 shows the measured transfer function for the high-side voltage-to-current converter shown in figure 41 . figure 42. measured transfer function for high-side v-i converter input voltage (v) output current (a) 0 0.5 1 1.5 0 0.025 0.05 0.1 load 0.075 2 d001
23 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8.2.2 discrete ina + attenuation for adc with 3.3-v supply note the tina-ti files shown in the following sections require that either the tina software (from designsoft ? ) or tina-ti software be installed. download the free tina-ti software from the tina-ti folder . figure 43 shows an example of how the opax187 is used as a high-voltage, high-impedance front-end for a precision, discreet instrumentation amplifier with attenuation. the ina159 provides the attenuation that allows this circuit to easily interface with 3.3-v or 5-v analog-to-digital converters (adcs). click the following link download the tina-ti file: discrete ina . (1) v out = v diff (41 / 5) + (ref 1) / 2. figure 43. discrete ina + attenuation for adc with 3.3-v supply 8.2.3 bridge amplifier figure 44 shows the basic configuration for a bridge amplifier. click the following link to download the tina-ti file: bridge amplifier circuit . figure 44. bridge amplifier opa187 + 15 v 15 v v out r r r r r v ref r copyright ? 2016, texas instruments incorporated opa187 opa187 15 v - 15 v + 5 v v cm 10v v diff / 2 v diff / 2 15 v 15 v v out p v out n ref 1 ref 2 ina159 sense r g 500 ? r p 10 n? r n 10 n? v out (1) copyright ? 2016, texas instruments incorporated
24 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8.2.4 low-side current monitor figure 45 shows the opax187 configured in a low-side current-sensing application. the load current (i load ) creates a voltage drop across the shunt resistor (r shunt ). this voltage is amplified by the opax187, with a gain of 201. the load current is set from 0 a to 500 ma, which corresponds to an output voltage range from 0 v to 10 v. the output range can be adjusted by changing the shunt resistor or gain of the configuration. click the following link to download the tina-ti file: current-sensing circuit . figure 45. low-side current monitor 8.2.5 programmable power supply figure 46 shows the opax187 configured as a precision programmable power supply using the 16-bit, voltage output dac8581 and the opa548 high-current amplifier. this application amplifies the digital-to-analog converter (dac) voltage by a value of five, and handles a large variety of capacitive and current loads. the opax187 in the front-end provides precision and low drift across a wide range of inputs and conditions. click the following link to download the tina-ti file: programmable power-supply circuit . figure 46. programmable power supply 15 v r in r f r shunt 100 m load i load v v out v out = i load * r shunt (1 + r f / r in ) v out / i load = 1 v / 49.75 ma 100 20 k c f 150 pf copyright ? 2016, texas instruments incorporated opa187 + dac8581 input = 5v c 2 500 nf opa187 15v + +15v r 2 1 k r 1 10 k gnd r 3 10 k opa548 30v + +30v r 4 40 k c 1 500 nf v out output = 25v copyright ? 2016, texas instruments incorporated
25 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8.2.6 rtd amplifier with linearization see analog linearization of resistance temperature detectors , for an in-depth analysis of figure 47 . click the following link to download the tina-ti file: rtd amplifier with linearization . (1) r 5 provides positive-varying excitation to linearize output. figure 47. rtd amplifier with linearization 9 power supply recommendations the opax187 is specified for operation from 4.5 v to 36 v ( 2.25 v to 18 v); many specifications apply from ? 40 c to +125 c. the typical characteristics presents parameters that can exhibit significant variance with regard to operating voltage or temperature. caution supply voltages larger than 40 v can permanently damage the device (see the absolute maximum ratings ). place 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedance power supplies. for more detailed information on bypass capacitor placement, see the layout section. opa187 rtd pt100 r 5 105.8 k ? (1) v out r 3 60.4 k ? r 1 4.99 k ? r 2 49.1 k ? r 4 1 k ? 1 f 1 f ref5050 15 v in out (5 v) 0c = 0 v 200c = 5 v copyright ? 2016, texas instruments incorporated
26 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 10 layout 10.1 layout guidelines for best operational performance of the device, use good printed circuit board (pcb) layout practices, including: ? low-esr, 0.1- f ceramic bypass capacitors must be connected between each supply pin and ground; place the capacitors as close to the device as possible. a single bypass capacitor from v+ to ground is applicable to single-supply applications. ? to reduce parasitic coupling, run the input traces as far away from the supply lines as possible. ? a ground plane helps distribute heat and reduces emi noise pickup. ? place the external components as close to the device as possible. this configuration prevents parasitic errors (such as the seebeck effect) from occurring. ? consider a driven, low-impedance guard ring around the critical traces. a guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 10.2 layout example figure 48. layout example n/c in +in v v+ out n/c n/c vs+ gnd vs gnd ground (gnd) plane on another layer vout vin gnd run the input traces as far away from the supply lines as possible use low-esr, ceramic bypass capacitor rf rg place components close to device and to each other to reduce parasitic errors + vin vout rg rf (schematic representation) use low-esr, ceramic bypass capacitor copyright ? 2017, texas instruments incorporated vout
27 opa187 , opa2187 , opa4187 www.ti.com sbos807b ? december 2016 ? revised october 2018 product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 11 device and documentation support 11.1 device support 11.1.1 development support 11.1.1.1 tina-ti ? (free software download) tina ? is a simple, powerful, and easy-to-use circuit simulation program based on a spice engine. tina-ti ? is a free, fully-functional version of the tina software, preloaded with a library of macro models, in addition to a range of both passive and active models. tina-ti provides all the conventional dc, transient, and frequency domain analysis of spice, as well as additional design capabilities. available as a free download from the analog elab design center, tina-ti offers extensive post-processing capability that lets users format results various ways. virtual instruments offer users the ability to select input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic quick-start tool. note these files require that either the tina software (from designsoft ? ) or tina-ti software be installed. download the free tina-ti software from the tina-ti folder . 11.1.1.2 ti precision designs ti precision designs are analog solutions created by ti ? s precision analog applications experts which offer the theory of operation, component selection, simulation, complete pcb schematic and layout, bill of materials, and measured performance of many useful circuits. ti precision designs are available online at http://www.ti.com/ww/en/analog/precision-designs/ . 11.1.1.3 webench ? filter designer webench ? filter designer is a simple, powerful, and easy-to-use active filter design program. the webench filter designer lets users create optimized filter designs using a selection of ti operational amplifiers and passive components from ti's vendor partners. available as a web-based tool from the webench design center, webench ? filter designer lets users design, optimize, and simulate complete multistage active filter solutions within minutes. 11.2 documentation support 11.2.1 related documentation for related documentation, see the following: ? operational amplifier gain stability, part 3: ac gain-error analysis ? operational amplifier gain stability, part 2: dc gain-error analysis ? using infinite-gain, mfb filter topology in fully differential active filters ? op amp performance analysis ? single-supply operation of operational amplifiers ? tuning in amplifiers ? shelf-life evaluation of lead-free component finishes
28 opa187 , opa2187 , opa4187 sbos807b ? december 2016 ? revised october 2018 www.ti.com product folder links: opa187 opa2187 opa4187 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 11.3 related links table 3 lists quick access links. categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. table 3. related links parts product folder sample and buy technical documents tools and software support and community opa187 click here click here click here click here click here opa2187 click here click here click here click here click here opa4187 click here click here click here click here click here 11.4 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com . in the upper right corner, click on the alert me button to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document 11.5 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.6 trademarks tina-ti, e2e are trademarks of texas instruments. webench is a registered trademark of texas instruments. bluetooth is a registered trademark of bluetooth sig, inc. designsoft, tina are trademarks of designsoft, inc. all other trademarks are the property of their respective owners. 11.7 electrostatic discharge caution this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.8 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 26-oct-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples opa187idbvr active sot-23 dbv 5 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 1cuv opa187idbvt active sot-23 dbv 5 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 1cuv opa187idgkr preview vssop dgk 8 2500 tbd call ti call ti -40 to 125 opa2187id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 op2187 opa2187idgkr active vssop dgk 8 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 16tv opa2187idgkt active vssop dgk 8 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 16tv opa2187idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 op2187 POPA187IDBVR active sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 popa187idgkr active vssop dgk 8 2500 tbd call ti call ti -40 to 125 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
package option addendum www.ti.com 26-oct-2018 addendum-page 2 (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant opa187idbvr sot-23 dbv 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 q3 opa187idbvt sot-23 dbv 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 q3 opa2187idgkr vssop dgk 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 q1 opa2187idgkt vssop dgk 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 q1 opa2187idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 package materials information www.ti.com 19-oct-2018 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) opa187idbvr sot-23 dbv 5 3000 213.0 191.0 35.0 opa187idbvt sot-23 dbv 5 250 213.0 191.0 35.0 opa2187idgkr vssop dgk 8 2500 367.0 367.0 35.0 opa2187idgkt vssop dgk 8 250 210.0 185.0 35.0 opa2187idr soic d 8 2500 367.0 367.0 35.0 package materials information www.ti.com 19-oct-2018 pack materials-page 2

www.ti.com package outline c typ 0.22 0.08 0.25 3.0 2.6 2x 0.95 1.9 1.45 max typ 0.15 0.00 5x 0.5 0.3 typ 0.6 0.3 typ 8 0 1.9 a 3.05 2.75 b 1.75 1.45 (1.1) sot-23 - 1.45 mm max height dbv0005a small outline transistor 4214839/c 04/2017 notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. refernce jedec mo-178. 0.2 c a b 1 3 4 5 2 index area pin 1 gage plane seating plane 0.1 c scale 4.000
www.ti.com example board layout 0.07 max arround 0.07 min arround 5x (1.1) 5x (0.6) (2.6) (1.9) 2x (0.95) (r0.05) typ 4214839/c 04/2017 sot-23 - 1.45 mm max height dbv0005a small outline transistor notes: (continued) 4. publication ipc-7351 may have alternate designs. 5. solder mask tolerances between and around signal pads can vary based on board fabrication site. symm land pattern example exposed metal shown scale:15x pkg 1 3 4 5 2 solder mask opening metal under solder mask solder mask defined exposed metal metal solder mask opening non solder mask defined (preferred) solder mask details exposed metal
www.ti.com example stencil design (2.6) (1.9) 2x(0.95) 5x (1.1) 5x (0.6) (r0.05) typ sot-23 - 1.45 mm max height dbv0005a small outline transistor 4214839/c 04/2017 notes: (continued) 6. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. 7. board assembly site may have different recommendations for stencil design. solder paste example based on 0.125 mm thick stencil scale:15x symm pkg 1 3 4 5 2
www.ti.com package outline c typ 0.22 0.08 0.25 3.0 2.6 2x 0.95 1.9 1.45 max typ 0.15 0.00 5x 0.5 0.3 typ 0.6 0.3 typ 8 0 1.9 a 3.05 2.75 b 1.75 1.45 (1.1) sot-23 - 1.45 mm max height dbv0005a small outline transistor 4214839/c 04/2017 notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. refernce jedec mo-178. 0.2 c a b 1 3 4 5 2 index area pin 1 gage plane seating plane 0.1 c scale 4.000
www.ti.com example board layout 0.07 max arround 0.07 min arround 5x (1.1) 5x (0.6) (2.6) (1.9) 2x (0.95) (r0.05) typ 4214839/c 04/2017 sot-23 - 1.45 mm max height dbv0005a small outline transistor notes: (continued) 4. publication ipc-7351 may have alternate designs. 5. solder mask tolerances between and around signal pads can vary based on board fabrication site. symm land pattern example exposed metal shown scale:15x pkg 1 3 4 5 2 solder mask opening metal under solder mask solder mask defined exposed metal metal solder mask opening non solder mask defined (preferred) solder mask details exposed metal
www.ti.com example stencil design (2.6) (1.9) 2x(0.95) 5x (1.1) 5x (0.6) (r0.05) typ sot-23 - 1.45 mm max height dbv0005a small outline transistor 4214839/c 04/2017 notes: (continued) 6. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. 7. board assembly site may have different recommendations for stencil design. solder paste example based on 0.125 mm thick stencil scale:15x symm pkg 1 3 4 5 2

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